Abstract: Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

Abstract: According to one embodiment, a pattern formation method includes forming a structure body on a first surface of a patterning member, the structure body having protrusions and a recess. The protrusions are arranged at a first pitch along a first direction. The first direction is aligned with the first surface. The recess is between the protrusions. The method further includes forming a resin film of a block copolymer on the structure body. The block copolymer includes first portions and second portions. The first and second portions are arranged alternately at a second pitch along the first direction. The structure body includes first and second regions. The first portions are on the first regions. The second portions on the second regions. The method further includes removing the second portions and the second regions, introducing a metal to the first regions, and etching the patterning member using the first regions.

Abstract: The present disclosure provides a method in accordance with some embodiments. The method includes forming a material layer that includes an array of fin features, wherein at least one fin feature has a first material on a first sidewall and a second material on a second sidewall that is opposite to the first sidewall, wherein the first material is different from the second material. The method further includes exposing the second sidewall of the at least one fin feature and removing the at least one fin feature.

Abstract: A method for producing a bonded functionally graded Material (FGM) structure, includes the steps of providing a plurality of dissimilar material layers; forming a first group and a second group of through holes alternately on a plurality of intermediate dissimilar material layers and on a bottom dissimilar material layer, wherein the first group of through holes has a diameter larger than a diameter of the second group of through holes; stacking the plurality of dissimilar material layers on top of one another. A first group of through holes on any dissimilar material layer is arranged corresponding to a second group of through holes on a dissimilar material layer stacked above, and a second group of through holes on any dissimilar material layer is arranged corresponding to a first group of through holes on a dissimilar material stacked right below; and bonding the plurality of dissimilar material layers.

Abstract: Techniques are provided to remove the growth of colloidal silica deposits on surfaces of high aspect ratio structures during silicon nitride etch steps. A high selectivity overetch step is used to remove the deposited colloidal silica. The disclosed techniques include the use of phosphoric acid to remove silicon nitride from structures having silicon nitride formed in narrow gap or trench structures having high aspect ratios in which formation of colloidal silica deposits on a surface of the narrow gap or trench through a hydrolysis reaction occurs. A second etch step is used in which the hydrolysis reaction which formed the colloidal silica deposits is reversible, and with the now lower concentration of silica in the nearby phosphoric acid due to the depletion of the silicon nitride, the equilibrium drives the reaction in the reverse direction, dissolving the deposited silica back into solution.

Abstract: A polishing composition used in an application to polish silicon nitride is characterized by containing colloidal silica in which an organic acid, such as a sulfonic acid or a carboxylic acid, is immobilized, and having a pH of 6 or less.

Abstract: Techniques relate to forming a sorting device. A mesh is formed on top of a substrate. Metal assisted chemical etching is performed to remove substrate material of the substrate at locations of the mesh. Pillars are formed in the substrate by removal of the substrate material. The mesh is removed to leave the pillars in a nanopillar array. The pillars in the nanopillar array are designed with a spacing to sort particles of different sizes such that the particles at or above a predetermined dimension are sorted in a first direction and the particles below the predetermined dimension are sorted in a second direction.

Abstract: Methods for etching a bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) to form high aspect ratio features using an etch process are provided. The methods described herein advantageously facilitate profile and dimension control of features with high aspect ratios through a proper sidewall and bottom management scheme during the bottom anti-reflective coating (BARC) and/or an anti-reflective coating (ARC) and/or a dielectric anti-reflective coating (DARC) open process.

Abstract: Exemplary cleaning or etching methods may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. Methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may also include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a region of exposed oxide and a region of exposed metal. Methods may also include providing a hydrogen-containing precursor to the processing region. The methods may further include removing at least a portion of the exposed oxide.

Abstract: Exemplary cleaning or etching methods may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. Methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may also include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a region of exposed oxide and a region of exposed metal. Methods may also include providing a hydrogen-containing precursor to the processing region. The methods may further include removing at least a portion of the exposed oxide.

Abstract: What is disclosed is a dry etching gas containing 1,3,3,3-tetrafluoropropene, wherein 1,3,3,3-tetrafluoropropene has purity of 99.5 mass % or more, and a total of concentration of each mixed metal component of Fe, Ni, Cr, Al, and Mo is 500 mass ppb or less. Furthermore, regarding to the dry etching gas, it is preferable that a content of nitrogen is 0.5 volume % or less, and that a content of water is 0.05 mass % or less. In a dry etching with a plasma gas obtained by making a dry etching gas into plasma, the dry etching gas of the present invention can improve etching selectivity of silicon-based material with respect to a mask.

Abstract: Described herein are architectures, platforms and methods for determining endpoints of an optical emission spectroscopy (OES) data acquired from a plasma processing system. The OES data, for example, includes an absorption—step process, a desorption—step process, or a combination thereof. In this example, the OES data undergoes signal synchronization and transient signal filtering prior to endpoint determination, which may be implemented through an application of a moving average filter.

Abstract: A plasma processing apparatus processes a film layer to be processed disposed in advance on a surface of a wafer by using a plasma being switched on and off in a processing chamber in predetermined cycles and periods and includes a detection control unit for detecting a processing amount of the film layer on the surface of the wafer. The detection control unit includes a light source unit, a detection unit, and a film thickness/depth calculation unit. This detection control unit detects a plurality of times an amount indicating the intensity of light on a sample surface at predetermined cycles during a period in which the plasma is switched off while the wafer is being processed and detects a processing amount of the film layer on the sample surface by using the detected amount indicating the light intensity.

Abstract: Embodiments of the present invention provide a method of processing a surface of a polysilicon and a method of processing a surface of a substrate assembly. The method of processing a surface of a polysilicon includes forming a material film on the surface of the polysilicon; and processing, by using a chemico-mechanical polishing technology, the surface of the polysilicon on which the material film is formed. The material film is selected such that the polysilicon is preferentially removed in a polishing process.

Abstract: An etching method is provided for processing a substrate that includes a first region having an insulating film arranged on a silicon layer and a second region having the insulating film arranged on a metal layer. The etching method includes a first step of etching the insulating film into a predetermined pattern using a plasma generated from a first gas until the silicon layer and the metal layer are exposed, and a second step of further etching the silicon layer after the first step using a plasma generated from a second gas including a bromide-containing gas.

Abstract: The present invention discloses a method of manufacturing a shadow mask, wherein hybrid processing is used to form a mask pattern on the shadow mask, the method includes: forming a wet-etched pattern by performing wet etching from above a base; and forming a laser-processed pattern that continues from the wet-etched pattern, by performing laser processing from above the base or from below the base on which the wet-etched pattern is formed. The present invention uses hybrid processing including wet etching and laser processing for manufacturing a shadow mask. The method has an effect on solving the productivity degradation of the conventional laser processing and provides a shadow mask with high quality using wet etching.

Abstract: A manufacturing process of an elemental chip comprises steps of preparing a substrate held on the holding tape, the substrate including first and second sides opposite each other and the second side thereof being held on the holding tape, and the substrate further including a plurality of element regions and a plurality of segmentation regions defining each of the element regions; spraying a resist solution to form droplets of the resist solution, the resist solution containing a resist constituent and a solvent; forming a resist layer by vaporizing the solvent from the droplets and depositing the resist constituent on the first side of the substrate that is held on the holding tape; patterning the resist layer to expose the first side of the substrate in the segmentation regions; and plasma-etching the first side of the substrate exposed in the segmentation regions thereof.

Abstract: An abrasive particle-dispersion layer composite and a polishing slurry composition including the abrasive particle-dispersion layer composite are provided. The abrasive particle-dispersion layer composite includes abrasive particles, a first dispersant that is at least one cationic compound among an amino acid, an organic acid, polyalkylene glycol and a high-molecular polysaccharide coupled to a glucosamine compound, and a second dispersant that is a cationic polymer including at least two ionized cations in a molecular formula.

Abstract: A method for manufacturing a semiconductor device includes forming a plurality of amorphous silicon germanium (a-SiGe) structures having a first percentage of germanium on a substrate, forming a plurality of spacers on sides of the plurality of a-SiGe structures, performing an annealing to convert a portion of each of the a-SiGe structures into respective portions comprising a-SiGe having a second percentage of germanium higher than the first percentage of germanium, and to convert each of the spacers into respective silicon oxide portions, removing from the substrate at least one of: one or more unconverted portions of the a-SiGe structures having the first percentage of germanium, one or more of the converted portions of a-SiGe structures, and one or more of the silicon oxide portions, and transferring a pattern to the substrate to form a plurality of patterned substrate portions, wherein the pattern includes the portions remaining after the removing.

Abstract: Method for manufacturing a bonded SOI wafer by bonding a bond wafer and base wafer, each composed of a silicon single crystal, via an insulator film, including the steps: depositing a polycrystalline silicon layer on the base wafer bonding surface side, polishing the polycrystalline silicon layer surface, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the base wafer polycrystalline silicon layer and bond wafer via the insulator film; thinning the bonded bond wafer to form an SOI layer; wherein, in the step of depositing the polycrystalline silicon layer, a wafer having a chemically etched surface as base wafer; chemically etched surface is subjected to primary polishing followed by depositing the polycrystalline silicon layer on surface subjected to the primary polishing, and in the step polishing the polycrystalline silicon layer surface, which is subjected to secondary polishing or secondary and finish polishing.