Abstract: Exemplary etching methods may include flowing a hydrogen-containing precursor into a semiconductor processing chamber. The methods may include flowing a fluorine-containing precursor into a remote plasma region of the semiconductor processing chamber. The methods may include forming a plasma of the fluorine-containing precursor in the remote plasma region. The methods may include etching a pre-determined amount of a silicon-containing material from a substrate in a processing region of the semiconductor processing chamber. The methods may include measuring a radical density within the remote plasma region during the etching. The methods may also include halting the flow of the hydrogen-containing precursor into the semiconductor processing chamber when the radical density measured over time correlates to a produced amount of etchant to remove the pre-determined amount of the silicon-containing material.

Abstract: Exemplary etching methods may include flowing a hydrogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a fluorine-containing precursor into the substrate processing region. The methods may include contacting a substrate housed in the substrate processing region with the hydrogen-containing precursor and the fluorine-containing precursor. The substrate may define a trench. A spacer may be formed along a sidewall of the trench, and the spacer may include a plurality of layers including a first layer of a carbon-containing material, a second layer of an oxygen-containing material, and a third layer of a carbon-containing material. The second layer of the spacer may be disposed between the first layer and third layer of the spacer. The methods may also include removing the oxygen-containing material.

Abstract: A method of manufacturing a semiconductor device includes exposing a material to a semi-aqueous etching solution. The semi-aqueous etching solution comprises a solvent which chelates with the material and acts as a catalyst between the etching driving force and the material. As such, the etching driving force may be used to remove the material.

Abstract: A body of a superstrate can be used to form an adaptive planarization layer over a substrate that has a non-uniform topography. A body of a superstrate can have bending characteristics that are well suited to achieve both conformal and planarization behavior. The body can have a surface and a thickness in a range of t1 to t2, t1=(Pd4/2Eh)1/3; t2=(5Pd4/2Eh)1/3; P is a pressure corresponding to a capillary force between the body and a planarization precursor material; d is a bending distance; E is Young's modulus for the body; and h is a step height difference between two adjacent regions of a substrate. In an embodiment, a thickness can be selected and used to determine the maximum out-of-plane displacement, wmax, for conformal behavior is sufficient and that wmax for planarization behavior is below a predetermined threshold.

Abstract: A manufacturing process of an elemental chip includes steps of preparing a substrate held on the holding tape, the substrate including first and second sides opposite each other and the second side thereof being held on the holding tape, and the substrate further including a plurality of element regions and a plurality of segmentation regions defining each of the element regions; setting a nozzle to have a length between a lower most edge of the nozzle and the first side of the substrate in a range between 20 mm and 150 mm, spraying a resist solution to form droplets of the resist solution, the resist solution containing a resist constituent and a solvent; forming a resist layer by vaporizing the solvent from the droplets and depositing the resist constituent on the first side of the substrate that is held on the holding tape such that an amount of the solvent remained in the resist layer to be in a range between 5 wt. % and 20 wt.

Abstract: A method for producing a security element formed as a lenticular flip, including a micro-optical layer, a carrier substrate and an image layer, wherein the image layer includes n images for n=1 to i which are visible from an n-th observation angle allocated to the n-th image, and wherein n is at least 1. The images are imaged on a photoresist with parallel light in contact print or by means of projection. After the photoresist is developed, an image layer which includes the i images is present.

Abstract: Methods and systems for using a time-series of spectra to identify endpoint of an etch process. One method includes accessing a virtual carpet that is generated from a time-series of spectra for an etch process. A polynomial with coefficients represents the virtual carpet. The method includes processing a fabrication etch process on a fabrication wafer and generating a carpet defined from a time-series of spectra while processing the fabrication etch process. While the processing the fabrication etch process and generating the carpet, comparing portions of the carpet and the virtual carpet to identify an endpoint metric of the fabrication etch process.

Abstract: Provided is a method of modifying a surface of a substrate for improved etch selectivity of nitride etching. In an embodiment, the method includes providing a substrate with a nitride-containing structure, the nitride-containing structure having an oxygen-nitrogen layer. The method may also include performing a surface modification process on the nitride-containing structure with the oxygen-nitrogen layer using one or more gases, the surface modification process generating a cleaned nitride-containing structure. Additionally, the method may include performing a nitride etch process using the cleaned nitride-containing structure, wherein the etched nitride-containing structure are included in 5 nm or lower technology nodes, and the nitride etch process meets target etch rate and target etch selectivity, and the cleaned nitride-containing structure meet target residue cleaning objectives.

Abstract: A method for performing atomic layer etching (ALE) on a substrate, including the following method operations: performing a surface modification operation on a surface of the substrate, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer; performing a removal operation on the substrate surface, to remove the modified layer from the substrate surface, wherein removing the modified layer includes exposing the substrate surface to a metal complex, such that a ligand exchange reaction occurs between the metal complex and converted species of the modified layer; performing, following the removal operation, a plasma treatment on the substrate surface, the plasma treatment configured to remove residues formed from the exposure of the substrate surface to the metal complex, wherein the residues are volatilized by the plasma treatment; repeating the foregoing operations until a predefined thickness has been etched from the substrate surface.

Abstract: An etchant composition includes phosphoric acid and a silane compound represented by the following Chemical Formula 1: wherein A is an n-valent radical, L is C1-C5 hydrocarbylene, R1 to R3 are independently hydrogen, hydroxy, hydrocarbyl, or alkoxy, in which R1 to R3 exist respectively or are connected to each other by a heteroelement, and n is an integer of 2 to 5.

Abstract: A slurry solution for a Chemical Mechanical Polishing (CMP) process includes a wetting agent, a stripper additive that comprises at least one of: N-methyl-2-pyrrolidone (NMP), dimethyl sulfoxide (DMSO), sulfolane, and dimethylformamide (DMF), and an oxidizer additive comprising at least one of: hydrogen peroxide (H2O2), ammonium persulfate ((NH4)2S2O8), peroxymonosulfuric acid (H2SO5), ozone (O3) in de-ionized water, and sulfuric acid (H2SO4).

Abstract: A chemical mechanical polishing slurry composition for polishing a polycrystalline silicon film is presented, comprising: a solvent; a polishing agent; a pH adjuster; and at least one additive selected from the group consisting of a compound represented by Chemical Formula 1 below, a compound represented by Chemical Formula 2 below, and a tautomer thereof. The chemical mechanical polishing slurry composition for polishing a polycrystalline silicon film exhibits a high polishing speed and has various polishing selectivities when employed in a process for polishing a polycrystalline silicon film of a semiconductor wafer, and thus the composition may be effectively used as a composition for a process for polishing a polycrystalline silicon surface for the formation of highly integrated multilayer structured devices.

Abstract: A substrate processing apparatus includes a substrate holding unit 31 configured to hold a substrate W; an outer nozzle 45 configured to discharge a processing liquid toward a surface of the substrate from a position at an outside of an outer edge of the substrate held by the substrate holding unit such that at least a central portion of the surface of the substrate is covered with a liquid film of the discharged processing liquid; and an actuator 46 (90) configured to change a height position or a discharge angle of the outer nozzle.

Abstract: Exemplary etching methods may include flowing a hydrogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a fluorine-containing precursor into the substrate processing region. The methods may include contacting a substrate housed in the substrate processing region with the hydrogen-containing precursor and the fluorine-containing precursor. The substrate may define a trench, and a layer of an oxygen-containing material may be disposed within the trench and exposed on the substrate. The methods may include halting delivery of the hydrogen-containing precursor. The methods may also include removing the oxygen-containing material.

Abstract: [Object] Provided are a laminate film and an electrode substrate film with excellent etching quality, in which a circuit pattern formed by etching processing is less visible under highly bright illumination, and a method of manufacturing the same. [Solving Means] A laminate film includes a transparent substrate 60 formed of a resin film and a layered film provided on at least one surface of the transparent substrate. The layered film includes metal absorption layers 61 and 63 as a first layer and metal layers (62, 65), (64, 66) as a second layer, counted from the transparent substrate side. The metal absorption layers are formed by a reactive sputtering method which uses a metal target made of Ni alone or an alloy containing two or more elements selected from Ni, Ti, Al, V, W, Ta, Si, Cr, Ag, Mo, and Cu, and a reactive gas containing oxygen. The reactive gas contains hydrogen.

Abstract: Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.

Abstract: Use of a chemical mechanical polishing (CMP) composition for polishing of cobalt and/or co-balt alloy comprising substrates Abstract Use of a chemical mechanical polishing (CMP) composition (Q) for chemical mechanical polishing of a substrate (S) comprising (i) cobalt and/or (ii) a cobalt alloy, wherein the CMP composition (Q) comprises (A) Inorganic particles (B) a substituted tetrazole derivative of the general formula (I), wherein R1 is H, hydroxy, alkyl, aryl, alkylaryl, amino, carboxyl, alkylcarboxyl, thio or alkylthio. (C) at least one amino acid (D) at least one oxidizer, (E) an aqueous medium and wherein the CMP composition (Q) has a pH of from 7 to 10.

Abstract: The present disclosure provides a method for planarizing a metal-dielectric surface. The method includes: providing a slurry to a first metal-dielectric surface, wherein the first metal-dielectric surface comprises a silicon oxide portion and a metal portion, and wherein the slurry comprises a ceria compound; and performing a chemical mechanical polish (CMP) operation using the slurry to simultaneously remove the silicon oxide portion and the metal portion. The present disclosure also provides a method for planarizing a metal-dielectric surface and a method for manufacturing a semiconductor.

Abstract: A method for preventing the collapse of patterned, high aspect ratio features formed in semiconductor substrates upon removal of an initial fluid of the type used to clean etch residues from the spaces between the features. In the present method, the spaces are at least partially filled with a displacement solution, such as via spin coating, to substantially displace the initial fluid. The displacement solution includes at least one solvent and at least one, or combination of, a first fill material in the form of a phenol-formaldehyde polymer and/or a second fill material in the form of a polyalkene carbonate (PAC). The solvent is then volatized to deposit the fill materials in substantially solid form within the spaces. The fill materials may be removed by known plasma etch process via a high etch rate as compared to use of current fill materials, which prevents or mitigates silicon loss.

Abstract: Exemplary methods of patterning a device layer are described, including operations of patterning a protector layer and forming a first opening in a first patterning layer to expose a first portion of the protector layer and a first portion of the hard mask layer, which are then are exposed to a first etch to form a first opening in the first portion of the hard mask layer. A second opening is formed in a second patterning layer to expose a second portion of the protector layer and a second portion of the hard mask layer. The second portion of the protector layer and the second portion of the hard mask layer are exposed to an etch to form a second opening in the second portion of the hard mask layer. Exposed portions of the device layer are then etched through the first opening and the second opening.