Patents Examined by T. Dinh
  • Patent number: 12387894
    Abstract: The present invention detects contact bouncing in a contactor by measuring contact voltage fluctuations caused by the bouncing power delivery contacts controlled by the contactor. When these fluctuations are detected, a circuit causes a pull-in coil of the contactor to be temporarily re-energized to re-establish a higher magnetic field needed to pull and maintain the power delivery contacts into proper position, which eliminates the bouncing. Because of the high power required by the pull-in coil, the time that the pull-in coil is actuated is limited in order to avoid thermal damage to the coil or other electronic components. After the pull-in coil is activated to move the power delivery contacts into proper position, a lower magnetic field hold coil is instead energized to maintain the power delivery contacts in place.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: August 12, 2025
    Assignee: Astronics Advanced Electronic Systems Corp.
    Inventors: Frederick J. Potter, Patrick Mills
  • Patent number: 12389713
    Abstract: The improved solar panel includes a photovoltaic collection system, a lens structure and a calliport structure. The calliport structure is a photon manifold. The calliport structure is formed in the silicon crystalline structure of the NP junction of each individual photovoltaic cell contained within the photovoltaic collection structure. The calliport structure captures a proportion of the photons that are redirected by the lens structure. The calliport structure discharges the redirected photons into the N crystalline layer and the P crystalline layer through refraction and ejection processes. The calliport structure directly injects photons into the depletion zone of the P crystalline layer such that the net electric current production of the individual photovoltaic cell is increased relative to a standard photoelectric cell.
    Type: Grant
    Filed: September 12, 2023
    Date of Patent: August 12, 2025
    Inventor: Tilahun Anshu
  • Patent number: 12380929
    Abstract: Devices are disclosed. A device may include a command and address (CA) interface including a first pair of input circuits arranged in a first direction. The CA interface further including at least one additional pair of input circuits arranged in a second direction relative to the first pair of input circuits. Associated systems are also disclosed.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: August 5, 2025
    Assignee: Lodestar Licensing Group LLC
    Inventors: Kazuhiro Yoshida, Kumiko Ishii
  • Patent number: 12380955
    Abstract: A memory controller for controlling a flash memory is provided. The memory controller includes a control circuit and a voltage generator. The control circuit is configured to program one or more pages of the flash memory in sequence, wherein each page includes a plurality of bytes. The voltage generator is configured to adjust the output voltage according to the control signal from the control circuit. The control circuit performs a programming verification operation on each byte of a current page of the one or more pages in a page programming mode, and calculates the first number of bytes which fail the programming verification operation and performs a programming operation again. The control circuit determines the programming mode of the page after the current page as the page programming mode or the byte programming mode according to the first number.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: August 5, 2025
    Assignee: WINDBOND ELECTRONICS CORP.
    Inventor: Chung-Meng Huang
  • Patent number: 12375021
    Abstract: The present invention relates to a motor driving control system and a control method thereof. The purpose of the present invention is to provide a motor driving control system and a control method thereof, which may change electric current limiting logic, which is applied to a BLDC motor for a cooling fan, in response to an operating speed of the motor to stably protect the motor from an overload in a low-speed driving state as well as an overload in a high-speed driving state.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: July 29, 2025
    Assignee: HANON SYSTEMS
    Inventors: Kyung Won An, Min Sik Kim, Sang Hun Kim, Won Seok Kim, Tae Wan Kim, Pureunsam Park, Sung Joon Lee, Song Cheol Lee, Ho Bin Im, Eui Hyun Kim
  • Patent number: 12374403
    Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells disposed in memory holes connected to bit lines. The memory cells retain a threshold voltage corresponding to data states. A control means applies a bit line voltage to the bit lines while determining whether the memory cells have the threshold voltage above one or more read levels associated with each of the data states in a first portion of a read operation. The control means groups the memory cells targeted for ones of the data states into data state groups based on the first portion of the read operation. The control means also supplies a near zero voltage to the bit lines coupled to the memory cells targeted for ones of the data states associated with at least one of the data state groups while reading the memory cells in subsequent portions of the read operation.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: July 29, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Panni Wang, Xiaojia Jia, Swaroop Kaza
  • Patent number: 12375035
    Abstract: A method for controlling a cooling system for photovoltaic panels is provided. The cooling system has a water cooling assembly adapted to produce a cooling water flow wetting an upper surface of a photovoltaic panel exposed to solar light, an air cooling assembly adapted to produce an air flow directed against the upper surface of the photovoltaic panel, a set of sensors and electric power meters, and an electronic control unit configured to receive input information regarding values of a set of control parameters and to automatically control activation of the water cooling assembly and of the air cooling assembly according to predetermined modes of operation depending on values of the control parameters.
    Type: Grant
    Filed: September 21, 2023
    Date of Patent: July 29, 2025
    Inventor: Emanuele Giannetti
  • Patent number: 12369489
    Abstract: A semiconductor device includes a substrate, a first electrode located on the substrate, a metal halide perovskite layer located on the first electrode, a second electrode located on the metal halide perovskite layer, and passivation molecules that passivate the metal halide perovskite layer. The metal halide perovskite layer has (1) a top surface defect located in a top surface and (2) an inter-grain defect located at an interface between two adjacent grains, and the passivation molecules passivate at least one of the top surface defect and the inter-grain defect.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: July 22, 2025
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Furkan Halis Isikgor, Stefaan De Wolf
  • Patent number: 12369258
    Abstract: Disclosed herein is an electronic circuit module that includes a circuit board, an electronic component mounted on an upper surface of the circuit board, and a mold member that covers the upper and side surfaces of the circuit board. The lower area of the side surface of the circuit board is exposed so as not to be covered with the mold member.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: July 22, 2025
    Assignee: TDK Corporation
    Inventors: Shuichi Takizawa, Atsushi Yoshino, Yuki Okino, Hiromu Harada
  • Patent number: 12367925
    Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.
    Type: Grant
    Filed: January 22, 2024
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chuan Yang, Jui-Wen Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 12367937
    Abstract: A memory device includes a memory block comprising a plurality of memory cells and control circuitry configured to perform a read level acquisition operation to determine optimal read levels for reading a plurality of data states of the plurality of memory cells. To perform the read level acquisition operation, the control circuitry is configured to supply a read level acquisition waveform to the plurality of memory cells, obtain data miss compare (DMC) values for the plurality of memory cells based on the read level acquisition waveform, and identify the optimal read levels for the plurality of data states based on the DMC values. The control circuitry is further configured to perform a read operation on the plurality of memory cells in accordance with the optimal read levels as identified based on the DMC values.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: July 22, 2025
    Assignee: SANDISK TECHNOLOGIES, INC.
    Inventors: Zhenni Wan, Bo Lei
  • Patent number: 12362655
    Abstract: According to various embodiments, a power converter circuit is disclosed. The power converter circuit includes at least two vertically stacked printed circuit boards (PCBs) comprising a top PCB and a bottom PCB. The power converter circuit further includes at least one multiphase coupled inductor placed between the top PCB and the bottom PCB. The top PCB is coupled to the bottom PCB via at least one conductive winding of the multiphase coupled inductor. The power converter circuit further includes at least one circuit module placed above the top PCB and at least one power source placed below the bottom PCB. The multiphase coupled inductor is configured to deliver current vertically from the bottom PCB to the top PCB.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: July 15, 2025
    Assignees: THE TRUSTEES OF PRINCETON UNIVERSITY, THE TRUSTEES OF DARTMOUTH COLLEGE
    Inventors: Minjie Chen, Charles Sullivan, Youssef E. Elasser, Daniel Zhou, Jaeil Baek, Yenan Chen
  • Patent number: 12355382
    Abstract: The invention relates to a motor control processing unit for a motor control device which comprises a voltage source inverter unit, configured to control the voltage source inverter unit to provide a motor voltage following a pulse-width modulation, PWM, scheme, wherein the motor control processing unit is configured to control the voltage source inverter unit according to a flat PWM scheme, which comprises a flat-bottom or flat-top PWM scheme, at least at some times in order to provide a precise motor control with minimized losses. The invention also relates to a corresponding method.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: July 8, 2025
    Assignee: Synapticon GmbH
    Inventors: Florian Kock, Ramin Salehi Arashloo
  • Patent number: 12347485
    Abstract: Control logic in a memory device initiates a program operation including application of a set of programming pulses to a wordline associated with one or more memory cells of a memory array to be programmed to a set of programming levels, where each programming level of the set of programming levels is programmed by each programming pulse. The control logic determines that a program voltage of a programming pulse of the set of programming pulses reaches a maximum program voltage level. In response to the determining, during a subsequent programming pulse following the programming pulse, adjusting a first voltage associated with boosting a pillar voltage, a second voltage applied to a bitline, and a third voltage applied to the wordline to establish a subsequent program voltage of the subsequent programming pulse that is below the maximum program voltage level.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: July 1, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Sheyang Ning, Lawrence Celso Miranda, Jeffrey S. McNeil, Tomoko Ogura Iwasaki
  • Patent number: 12349299
    Abstract: An electric circuit board includes an insulating substrate, a metal plate, and a brazing material with which the insulating substrate and the metal plate are joined together. The metal plate has a side surface over which recessed portions are scattered. The side surface of the metal plate has lines in regions around the recessed portions. The metal plate is made of copper or a copper alloy. The brazing material has a side surface that is continuous with the side surface of the metal plate. The brazing material is a silver-copper brazing alloy. A ratio of copper on the side surface of the brazing material is higher than a copper component ratio of the silver-copper brazing alloy.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: July 1, 2025
    Assignee: KYOCERA Corporation
    Inventor: Yoshitada Konishi
  • Patent number: 12347501
    Abstract: A memory device includes a plurality of planes. A method of programming the memory device includes applying a first program pulse to one or more memory cells of a first plane of the plurality of planes, verifying whether each one of the memory cells reaches a predetermined program state, and in response to a preset number of the memory cells in the first plane failing to reach the predetermined program state after the memory cells being verified for a predetermined number of times, bypassing the first plane when applying a second program pulse after the first program pulse.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: July 1, 2025
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Jialiang Deng, Yu Wang
  • Patent number: 12343761
    Abstract: Aspects of the technology employ components to control and combine the vibration outputs of two vibration motors into essentially a pure vibration force, which can be controlled to output a given frequency and amplitude, produce beat frequencies, and produce brief impulses. For instance, identical attachment elements are affixed to a vibration device but do not contact each other during operation. Such attachment elements are able to cancel undesired torque vibrations to provide a combined pure force vibration output. The attachment elements may be secondary eccentric rotating masses affixed to the shaft of a vibration motor. Along with the vibration motor's primary eccentric rotating mass, these elements can cancel out unwanted parasitic torque vibrations by producing counter-torque vibrations.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: July 1, 2025
    Assignee: General Vibration Corporation
    Inventors: Michael G. Snow, Nikhil Bajaj, John Houston
  • Patent number: 12341450
    Abstract: An abnormality diagnosis device includes: a first interface to obtain a value of a driving current for driving a motor; and a processor to access a database including calculation data to be used to calculate a degree of abnormality of the motor, wherein the processor extracts a feature quantity for calculating the degree of abnormality from a current waveform specified by a value of the driving current, and calculates the degree of abnormality of the motor based on the extracted feature quantity and the calculation data.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: June 24, 2025
    Assignees: MITSUBISHI ELECTRIC CORPORATION, MITSUBISHI ELECTRIC RESEARCH LABORATORIES, INC.
    Inventors: Hiroshi Inoue, Bingnan Wang, Lei Zhou
  • Patent number: 12336156
    Abstract: The radio frequency module includes a mounting board, a first metal member, and a second metal member. The first metal member and the second metal member are disposed on the mounting board. The first metal member has a longitudinal direction along a first direction in plan view from a thickness direction of the mounting board. The second metal member has a longitudinal direction along a second direction in plan view from the thickness direction of the mounting board. The first or second metal member is placed between a first electronic component and a second electronic component. The first metal member has a first recessed portion. The second metal member has a through hole and a second recessed portion. The through hole passes through the second metal member in the direction intersecting with the second direction. The second recessed portion faces and is in contact with the first recessed portion.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: June 17, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kunitoshi Hanaoka
  • Patent number: 12334854
    Abstract: A power integrated module (PIM) and a motor control system are provided. The PIM is adapted to drive a motor. The PIM includes a first transformation circuit, a second transformation circuit, and a plurality of shunt units. The first transformation circuit includes a plurality of first half-bridge circuits, and a coupling relationship among the first half-bridge circuits is selected, so that the first transformation circuit is operated in a rectifier mode or an inverter mode. The second transformation circuit includes a plurality of second half-bridge circuits coupled to the motor. The shunt units are respectively coupled between the second half-bridge circuits and the motor and configured to sense a current between the second transformation circuit and the motor.
    Type: Grant
    Filed: April 26, 2023
    Date of Patent: June 17, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Shian-Chiau Chiou, Yu-Hua Cheng, Chih-Ming Tzeng