Abstract: Memory devices may include a substrate supporting at least one semiconductor device thereon. The substrate may include an interface located proximate to an end of the substrate and sized, shaped, and configured to provide external electrical connection to the at least one semiconductor device. Hook-shaped engagement structures may be located proximate to, and laterally outward from, the interface, the engagement structures extending laterally beyond a longitudinal remainder of a lateral periphery of the substrate trailing the engagement structures. The end of the substrate may lack screw keep-outs. A carrier may include posts shaped, positioned, and configured to be positioned in throats of the hook-shaped engagement structures to secure the end of the substrate to the carrier. Sidewalls may extend longitudinally from a crossbar for placement along the remainder of the lateral periphery of the substrate.

Abstract: A non-volatile memory device receives a read command and an address from a controller, and performs a data recovery read operation in response to the read command. In the data recovery read operation, an operation of obtaining aggressor group information from a memory cell connected to a word line adjacent to a word line selected according to the address, and an operation of recovering data corresponding to the obtained aggressor group information in a memory cell connected to the word line selected according to the address, are repeatedly performed on each of a plurality of aggressor groups.

Abstract: A method for manufacturing an electromagnetic shield housing for shielding an electronic component on a printed circuit board comprises providing a metallic lid with a shielding chamber at an underside for accommodating and covering the electronic component on the printed circuit board; filling the shielding chamber with an RF-absorber material; and removing RF-absorber material from the shielding chamber until the electronic component fits into the shielding chamber while a ceiling and lateral walls of the shielding chamber remain covered with RF-absorber material.

Abstract: A semiconductor device includes a chip selection signal receiver configured to receive, from an external memory controller, a chip selection signal activating to a state in which communication is possible with the external memory controller. The semiconductor device also includes a data signal receiver configured to receive a command and an address from the external memory controller. The semiconductor device further includes an operation controller configured to perform an internal operation according to the command and the address received through the data signal receiver while the chip selection signal is input. The semiconductor device additionally includes an internal signal generator configured to output an inactivated internal chip selection signal blocking transferal of the chip selection signal to the operation controller when a command other than a command requesting an output of data is received while the internal operation is performed.

Abstract: A semiconductor storage device such as an SSD includes a pliable printed circuit board (PCB) having semiconductor memory devices mounted by solder balls on first and second opposed major surfaces. The memory devices are mounted so as to be staggered and/or partially overlapping with each other on the first and second surfaces of the PCB in at least one direction. The staggered arrangement allows the PCB to flex upon warping of the memory devices mounted on the PCB.

Abstract: An electronic device having a frame for coupling a plurality of thermal management devices to the printed circuit board is provided. The electronic device includes a first chip package mounted to the PCB and a second chip package mounted to the PCB. The frame is secured to the PCB, and the frame has a first aperture disposed over the first chip package and a second aperture disposed over the second chip package. The plurality of thermal management devices coupled to the frame includes a first thermal management device contacting an IC die of the first chip package through the first aperture and a second thermal management device contacting an IC die of the second chip package through the second aperture.

Abstract: A high-frequency module includes a module substrate having main surfaces, one or more module components disposed on the main surface, a resin member covering the main surface, and a metal shield layer covering a top surface of each of the resin member and the one or more module components, and set to ground potential. A sub-module component, which is one of the one or more module components, has a sub-module substrate having main surfaces, a first circuit component disposed on the main surface, one or more second circuit components disposed on the main surface, a resin member covering the main surface, and a side surface shield layer covering a side surface of each of the resin member and the sub-module substrate, and set to the ground potential. An end surface on a top surface side of the side surface shield layer contacts the metal shield layer.

Abstract: A display device includes: a display module slid in a first direction; and a panel storage container including a guide rail guiding a sliding operation of the display module in the first direction. The display module is engaged with the guide rail in a second direction intersecting the first direction, and the guide rail includes: a first flat portion adjacent to an upper surface of the panel storage container; a second flat portion adjacent to a lower surface of the panel storage container; and a bent portion adjacent to a side surface of the panel storage container and connecting the first flat portion and the second flat portion to each other. The bent portion includes: a first bent portion bent at a first radius of curvature; and a second bent portion bent at a second radius of curvature greater than the first radius of curvature.

Abstract: Memory devices, systems, and associated methods with per die temperature-compensated refresh control, and associated methods, are disclosed herein. In one embodiment, a memory device includes a plurality of memory cells and a sensor configured to measure a temperature of the memory device. The memory device determines a frequency at which it is receiving refresh commands. The memory device is further configured to skip refresh operations of the memory cells based, at least in part, on the determination and on the temperature of the memory device.

Abstract: A motor control system operable to control a motor includes a motor control circuit and an inverter circuit connected to the motor control circuit and configured to connect to the motor at phase output terminals. The inverter circuit, in response to one or more output control signals indicating a deceleration instruction from the motor control circuit, implements a multi-state deceleration sequence for at least one commutation state of a commutation scheme of the motor.

Abstract: A memory device includes a memory array and control logic, operatively coupled to the memory array, to perform operations including causing a read operation to be initiated with respect to a set of target cells, obtaining cell state information for each respective group of adjacent cells, for each target cell of the set of target cells, determining a state information bin of a set of state information bins based on the cell state information for its respective group of adjacent cells, and assigning each target cell of the set of target cells to the respective state information bin. Each state information bin of the set of state information bins defines a respective boost voltage level offset to be applied to perform boost voltage modulation.

Abstract: A memory device includes a memory array and control logic, operatively coupled to the memory array, to perform operations including causing a read operation to be initiated with respect to a set of target cells, determining whether the read operation has failed, in response to determining that the read operation has failed, obtaining, for each group of adjacent cells, respective cell state information, assigning, based on the cell state information, each target cell of the set of target cells to a respective state information bin of a set of state information bins, determining whether to initiate auto-calibrated corrective read, in response to determining to initiate auto-calibrated corrective read, performing read level offset calibration to determine a set of calibrated read level offsets, and causing the set of target cells to be read using the set of calibrated read level offsets.

Abstract: A method of determining a position of a rotor of a brushless permanent magnet motor includes measuring a current value indicative of current flowing through a phase winding of the motor and providing a reference voltage value indicative of a voltage applied to the phase winding of the motor. The method includes calculating a phase of back EMF induced in the phase winding using the measured current value and the reference voltage value, and determining a zero-crossing point of the back EMF induced in the phase winding using the calculated phase of back EMF induced in the phase winding. The method includes generating a rotor position signal based on the determined zero-crossing point.

Abstract: A magnetic random access memory (MRAM) structure is provided. The MRAM structure includes a first write electrode, a first magnetic tunnel junction (MTJ) stack, a voltage control electrode, a second MTJ stack, and a second write electrode. The first MTJ stack includes a first free layer disposed on the first write electrode, a first tunnel barrier layer disposed on the first free layer, and a first fixed layer disposed on the first tunnel barrier layer. The voltage control electrode is disposed on the first MTJ stack. The second MTJ stack includes a second fixed layer disposed on the voltage control electrode, a second tunnel barrier layer disposed on the second fixed layer, and a second free layer disposed on the second tunnel barrier layer. The second write electrode is disposed on the second MTJ stack.

Abstract: An electronic device mountable in an electrical motor and a method for manufacturing an electronic device mountable in an electrical motor are provided. The electronic device includes a printed circuit board with a hole for mounting a semiconductor package which includes an integrated magnetic sensing device, the semiconductor package including leads and reinforcement material. The semiconductor package is mounted in the hole with the leads soldered to the printed circuit board. A gap is present between the semiconductor package and the printed circuit board. The reinforcement material is at least covering part of the leads and at least part of the printed circuit board.

Abstract: An energy harvesting system is provided. The energy harvesting system includes a waveguide, a luminophore embedded in the waveguide, and a solar photovoltaic array or a solar photovoltaic cell coupled to the waveguide. The energy harvesting system is visibly transparent, having an average visible transmittance of greater than about 50% and a color rendering index of greater than about 80 at normal incidence to the waveguide.

Abstract: Systems, apparatuses, and methods related to extended memory communication subsystems for performing extended memory operations are described. An example method can include receiving, at a processing unit that is coupled between a host device and a non-volatile memory device, signaling indicative of a plurality of operations to be performed on data written to or read from the non-volatile memory device. The method can further include performing, at the processing unit, at least one operation of the plurality of operations in response to the signaling. The method can further include accessing a portion of a memory array in the non-volatile memory device. The method can further include transmitting additional signaling indicative of a command to perform one or more additional operations of the plurality of operations on the data written to or read from the non-volatile memory device.

Abstract: A system for mounting one or more solar panels, the system comprising: a third sub-assembly comprising: angled posts arranged transverse to each other, each angled post including a penetrating end arranged to penetrate and engage a post-mounting surface; an engagement bracket arranged to engage the angled posts in use; and a second sub-assembly comprising: an elongated member adapted to be mounted to the engagement bracket at a distance from the post-mounting surface and to extend in a direction substantially perpendicular to the longitudinal direction of the post, the elongated member including at least one male portion that is elongated along a longitudinal axis of the elongated member; and a solar panel support member arranged to slidably receive an edge of a solar panel and including a female portion adapted to receive the at least one male portion of the elongated member, the solar panel support member adapted for pivotal movement about the longitudinal axis of the elongated member to provide a correspon

Abstract: A solar tracker, solar array, and method of designing a solar tracker or array including a plurality of piers, a torque tube supported by the piers, each pier having a common reveal from the earth and the torque tube has a relative angle from a first pier to a second pier of between 0.25 and about 0.75 degrees.

Abstract: A drive-sense circuit module includes at least one regulated source circuit coupled to a load, and to a loop correction circuit. The regulated source circuit generates a drive signal, which has a regulated characteristic and a controlled characteristic. At least one reference circuit applies a reference signal to the loop correction circuit that establishes a reference value of the controlled characteristic. The loop correction circuit senses an effect of one or more load characteristics on a sensed value of the controlled characteristic of the drive signal and generates a comparison signal based on the sensed value and the reference value of the controlled characteristic. A regulation signal is generated based on the comparison signal and used to regulate the regulated characteristic of the drive signal.