Abstract: A circuit board module includes a circuit board body, a connector, a press button, a bracket, and a linkage. The connector includes a base and a rotating button rotatably disposed on the base. The press button is located away from the connector. The bracket includes a first limiting portion. The linkage is located between the rotating button and the press button and includes a second limiting portion corresponding to the first limiting portion, a first segment, and a second segment linked to the first segment. The first segment extends along a first axis and is linked to the rotating button. The second segment extends along a second axis and is linked to the press button. One of the second limiting portion and the first limiting portion extends along the first axis. The first segment is movably disposed on the bracket along the first axis.

Abstract: In a half-bridge module for an inverter, semiconductor switches and signal and power connections are arranged on a first surface of a substrate and coated with a casting compound, and external connection contacts for the signal and power connections extend through the casting compound to the exterior. In various embodiments, the external connection contacts extend from the casting compound from four second surfaces that are orthogonal to the first surface, and have a first right angle bend outside the casting compound, such that the ends of the external connection contacts are perpendicular to the first surface. The invention also relates to a corresponding inverter.

Abstract: A device for determining a first angle between a rotor and a stator, having inputs for reading amplitudes of electrical signals detected via a sensor system and representing a first angle, wherein the device has an angle estimator for estimating a second angle, the device determines amplitudes representing the second, estimated angle, the device has at least one controller with which at least one difference between the first angle and the second, estimated angle can be minimized, and the second, estimated angle can be provided via an output.

Abstract: A data storage device includes a power supply circuit configured to supply power to the data storage device. The power supply circuit includes a voltage clamp configured to operate in a conduction state in response to an over-voltage condition of the power supply circuit. The power supply circuit also includes a fuse in series with the voltage clamp. The fuse is configured to open in response to a current flow through the fuse and the voltage clamp exceeding a threshold value. The power supply circuit also includes a switching device that is configured to latch in a forward conduction mode in response to the voltage clamp operating in the conduction state. The switching device couples power from a positive voltage bus to the voltage clamp when the switching device is in the forward conduction mode.

Abstract: A read-disturb-based physical storage read temperature information identification system includes a global read temperature identification subsystem coupled to at least one storage device. Each at least one storage device reads valid data and obsolete data from at least one physical block in that storage device and, based on the reading of the valid data and the obsolete data, generates read disturb information associated with each row provided by the at least one physical block in that storage device. Each at least one storage devices then uses the read disturb information associated with each row provided by the at least one physical block in that storage device to generate a local logical storage element read temperature map for that storage device that it provides to the global read temperature identification subsystem.

Abstract: A read operation on selected memory cells may be performed by a method of operating a semiconductor memory device. The method may include determining a read voltage to be used in the read operation among first to 2N?1-th read voltages, applying the determined read voltage to a selected word line connected to the selected memory cells, and applying a read pass voltage to unselected word lines based on whether the determined read voltage is a first read voltage. Here, N may be a natural number of 2 or more.

Abstract: For polyharmonic flux motor loss increase, a method offsets pulse width modulation (PWM) carriers to a motor to increase motor harmonics. The offset PWM carriers increase energy losses for the motor.

Abstract: In one embodiment of this disclosure, an integrated circuit includes at least one first memory block, at least one second memory block, and a pad disposing area. The first memory block and the second memory block are respectively disposed at two sides of the integrated circuit, wherein each of the first memory block and the second memory block includes a memory cell array having a three-dimension structure. The first memory block and the second memory block are symmetrically disposed about the pad disposing area. A plurality of pads are disposed in the pad disposing area. The pads are respectively electrically coupled to the first memory block and the second memory block.

Abstract: The present technology provides a method of operating a semiconductor memory device detecting a threshold voltage distribution for memory cells included in a page selected from among a plurality of memory cells. The method of operating the semiconductor memory device includes selecting a target state in which the threshold voltage distribution is to be detected, determining a plurality of read voltages for dividing a voltage range in which a threshold voltage of the selected target state is distributed, and performing a plurality of sensing operations using the plurality of read voltages on the selected page. Masking to the target state is applied in each of the plurality of sensing operations.

Abstract: A drive system for a BLDC motor having poles implemented by separate coils that are activated in corresponding phases, which comprises a controller for controlling the level and phase of input voltages supplied to the separate coils; a controlled inverter with outputs, for applying phase-separated input voltages to each of the separate coils at desired timing for each input voltage, determined by the controller; a power source for feeding power to the controlled inverter; an up/down DC-DC converter for converting the feeding power to the input voltages according to a command signal provided by the controller.

Abstract: A method and system of amplifying output power produced by a solar panel having a shadow cast upon a portion of a surface thereof are presented. The system and method utilize refractive-reflective sheets such as lenticular sheet, and/or diffraction grating sheets to diffuse sunlight to illuminate the shadow and thus amplify the output power of the solar panel. Alternatively, when no shadow is cast upon the panel, the sheets reflect additional sunlight onto the panel increasing its output power. The sheets may be used to refract, reflect, or both refract and reflect sunlight onto the panel. The sheets may be used in combination with bright or reflective panels to reflect additional sunlight onto said panels to further amplify the output. The system and method are applicable to various types of solar panels such as thin film, microcrystalline and polycrystalline solar panels as well as solar roof tiles or other solar radiation collectors.

Abstract: A semiconductor memory device according to an embodiment includes memory cell transistors, a word line, and a controller. A memory cell transistor whose threshold voltage is included in first and second states store first and second data, respectively. In a verify operation of the first data, during application of a verify high voltage of the first data to the word line, the controller is configured to determine whether or not a threshold voltage of a memory cell transistor to which the first data is to be written exceeds the verify high voltage of the first data, and also determine whether or not a threshold voltage of a memory cell transistor to which the second data is to be written exceeds a verify low voltage of the second data.

Abstract: Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second microfeature devices having corresponding first and second bond pad surfaces that face toward each other. First bond pads can be positioned at least proximate to the first bond pad surface and second bond pads can be positioned at least proximate to the second bond pad surface. A package connection site can provide electrical communication between the first microfeature device and components external to the package. A wirebond can be coupled between at least one of the first bond pads and the package connection site, and an electrically conductive link can be coupled between the first microfeature device and at least one of the second bond pads of the second microfeature device. Accordingly, the first microfeature device can form a portion of an electrical link to the second microfeature device.

Abstract: A display device includes a first substrate, a second substrate, a plurality of drive ICs and at least one flexible circuit board. The first substrate has a first region and a second region near to the first region. The second substrate is disposed on the first region and has a lateral side. The plurality of drive ICs are disposed on the second region and arranged along the lateral side. The at least one flexible circuit board is disposed on the second region and disposed correspondingly to the lateral side. Wherein in a top view of the display device, each of the plurality of drive ICs does not overlap with the at least one flexible circuit board in a direction perpendicular to an extending direction of the lateral side.

Abstract: A module includes: a wiring board as a ceramic board having a first main surface; a first component and a second component that are mounted on the first main surface; at least one conductive member disposed on the first main surface between the first component and the second component; a sealing resin that seals the first component, the second component, and the conductive member; and a shield film that covers an upper surface and a side surface of the sealing resin and a side surface of the wiring board. The shield film is electrically connected to a ground conductor. The conductive member is formed by firing simultaneously with the wiring board, and electrically connected to the ground conductor and electrically connected to the shield film.

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising determining a data validity metric value with respect to a source set of memory cells of the memory device; determining whether the data validity metric value satisfies a first threshold criterion; responsive to determining that the data validity metric value satisfies the first threshold criterion, performing a data integrity check on the source set of memory cells to obtain a data integrity metric value; determining whether the data integrity metric value satisfies a second threshold criterion; and responsive to determining that the data integrity metric value fails to satisfy the second threshold criterion, causing the memory device to copy data from the source set of memory cells to a destination set of memory cells of the memory device.

Abstract: A memory apparatus and method of operation is provided. The apparatus includes memory cells each connected to one of a plurality of word lines. The memory cells are disposed in strings coupled to one of a plurality of bit lines and are configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is configured to read each of the memory cells in a read operation. For each one of the memory cells, the control means is also configured to offset at least one of a bit line settling time and a kick voltage during the read operation based on a probability of at least one neighboring one of the plurality of bit lines being coupled to the memory cells retaining the threshold voltage corresponding to a different one of the plurality of data states than the one of the memory cells.

Abstract: Disclosed is a packaging solution, such as a lead frame for circuit board packaging, a packaged integrated circuit board, a power chip, and a circuit board packaging method. The lead frame includes a plurality of frame units disposed in parallel in a first direction. The frame unit includes a hollow bezel, and a plurality of pins and connecting ribs that are disposed in the bezel. Each pin includes a first pin part and a second pin part that extend in a second direction and are integrally formed. The first pin part is disposed in the bezel, the first pin part is configured to electrically connect to a circuit board, and the second pin part is connected and fastened to the bezel. The second direction is perpendicular to the first direction. The connecting ribs are connected among the plurality of pins and the bezel.

Abstract: A floating solar system, comprising a floating base having, a buoyance and a lower base frame coupled to the buoyance, a center frame coupled to the lower base frame, an anchor coupled to the lower base frame, a plurality of solar panels affixed to the lower base frame and the center frame to provide electrical power, a lightning rod coupled to the center frame and a lightning rod cap coupled to the lightning rod.

Abstract: The present invention relates to a composition for an encapsulant film including an ethylene/alpha-olefin copolymer having high volume resistance and light transmittance, and an encapsulant film using the same.