Abstract: A device includes a circuit carrier board and a conductor element that is configured to transfer an electric current from and/or to the circuit carrier board. The device includes an electrically conductive, elastically deformable, contoured, plate-like connection element that connects the circuit carrier board to the conductor element and is configured to create a local, dynamic resilience. As a result of this, a force transmission front the conductor element to the circuit carrier board may be reduced. A plate thickness of the connection element is at least 2 cm. A power converter and an aircraft having such a device are also provided.

Abstract: A semiconductor memory device includes a substrate, gate electrodes, a semiconductor layer opposed to gate electrodes, an electric charge accumulating layer disposed between gate electrodes and the semiconductor layer, a conductive layer connected to one end portion of the semiconductor layer, and a control circuit electrically connected to gate electrodes and the conductive layer. Gate electrodes include first gate electrodes, second gate electrodes, and third gate electrode. The control circuit is configured to perform an erase operation. The erase operation includes: at least one-time first operation that applies a first voltage to the conductive layer; a second operation performed after the first operation, the second operation applying a second voltage to the third gate electrode; and at least one-time third operation performed after the second operation, the third operation applying a third voltage same as or larger than the first voltage to the conductive layer.

Abstract: A module frame includes two longitudinal, and two transverse, frame elements. A longitudinal cover fold, with two longitudinal cover fold end areas, extends from the first longitudinal frame element. A transverse cover fold has two transverse cover fold end areas. The second longitudinal cover fold, and second transverse cover fold, end areas, form a cover fold end area. The bottom surface of the longitudinal cover fold is the height of the top surface of the second longitudinal frame element. The bottom surface of the transverse cover fold is the height of the top surface of the second transverse frame element. The bottom surface of the first transverse cover fold end area is the height of the top surface of the first longitudinal cover end area, and the bottom surface of the cover fold end area is the height of the top surface of the first transverse cover end area.

Abstract: A method for operating a memory device includes providing a memory block including at least one source select transistor coupled between a source line and a bit line, a plurality of memory cells, and a drain select transistor, controlling a source select line coupled to the at least one source select transistor and a plurality of word lines coupled to the plurality of memory cells to be in a floating state, and applying an erase voltage to the source line and the bit line.

Abstract: An electrical converter for conversion between a three-phase AC signal and a DC signal may include a phase selector for connecting the three phase terminals to a first, a second, and a third intermediate node, a first buck circuit having a first switch-node terminal connected to the first DC terminal, and a second buck circuit having a second switch-node terminal connected to the second DC terminal. The first and second buck circuits convert a voltage at the first, second, and third intermediate node to a voltage between the first and second DC terminal. The first and second buck circuits are connected in series between the first and second intermediate node, and include at least one actively switchable device connected between the common node and the third intermediate node.

Abstract: A layout structure of a ROM cell using a complementary FET (CFET) is provided. The ROM cell includes first and second three-dimensional transistors. The second transistor is formed above the first transistor, and the channel portions of the first and second transistors overlap each other. First data is stored in the ROM cell depending on the presence or absence of connection between a local interconnect connected to the source of the first transistor and a ground power supply line, and second data is stored in the ROM cell depending on the presence or absence of connection between a local interconnect connected to the source of the second transistor and a ground power supply line.

Abstract: A vertical field effect transistor (FET) includes a vertical semiconductor channel having a first end that contacts an upper surface of a substrate and an opposing second end that contacts a source/drain region. An electrically conductive gate encapsulates the vertical semiconductor channel. The vertical FET further includes a split-channel antifuse device between the source/drain region and the electrically conductive gate. The split-channel antifuse device includes a gate dielectric having a thickness that varies between the source/drain region and the electrically conductive gate.

Abstract: A control system for an electric motor powered by a battery can be configured to receive an input power or torque command corresponding to a commanded power or torque. The control system can be configured to determine if the battery is capable of supplying the commanded power or torque over a time period based on a state of charge of the battery. The control system can be configured such that if the battery is capable of supplying the commanded power or torque over the time period, the control system outputs the input power or torque command, and if the battery is not capable of supplying the commanded power or torque over the time period, the control system outputs an available maximum power or torque command corresponding to an available maximum power or torque over the time period that is less than the commanded power or torque.

Abstract: A motor drive apparatus includes a reactor, a converter connected to an alternating current power supply via the reactor, a smoothing capacitor connected between output terminals of the converter, and an inverter that converts a direct current voltage output from the smoothing capacitor into an alternating current voltage to be applied to a motor and outputs the alternating current voltage. The motor drive apparatus includes a plurality of operation modes for controlling conduction of switching elements of the converter and causing the converter to operate in different modes of operation, and changes operation of at least one of the switching elements of the converter and the inverter according to the operation mode when a bus voltage indicates an excessive value.

Abstract: Methods and systems are provided for adapting pulse width modulation with randomized zero-sequence components for control of an electrified powertrain of a vehicle. In one example, a method may include determining a zero-sequence voltage of an electric machine of the vehicle based on a random distribution, and adjusting a voltage reference signal of the electric machine based on the determined zero-sequence voltage to decrease ambient acoustic noise in the vehicle. In this way, spectral energy dispersion of pulse width modulated control of the electric machine may be increased without affecting torque production of the electric machine.

Abstract: An electronic component module includes a substrate, an electronic component, an insulating resin, and a shield film. The insulating resin covers a first main surface side of the substrate. The insulating resin exposes an opposite surface of the electronic component. The shield film covers the insulating resin and the opposite surface of the electronic component. The opposite surface has an uneven portion. A concave portion of the uneven portion has a smoother shape than a convex portion of the uneven portion.

Abstract: The invention relates to a new way of stabilizing and mounting solar panels in the form of conventional heat exchangers comprising a trough and a glass cover or of a photovoltaic panel on house walls with the aid of frames made of natural or artificial stones which are made break-resistant using fiber materials and are stabilized in such a way that the panels are also break-resistant on impact and can be mounted as self-supporting structures on a wall; furthermore, the panels in particular satisfy high standards in respect of esthetics and are low-maintenance and thus permanently appealing. Multiple solar panels comprising stone frames can form entire stone-solar panel facades.

Abstract: A semiconductor memory device comprises: a first pad receiving a first signal; a second pad receiving a second signal; a first memory cell array; a first sense amplifier connected to the first memory cell array; a first data register connected to the first sense amplifier and configured to store user data read from the first memory cell array; and a control circuit configured to execute an operation targeting the first memory cell array. The first memory cell array comprises a plurality of first memory strings. The first memory strings each comprise a plurality of first memory cell transistors. In a first mode of this semiconductor memory device, a command set instructing the operation is inputted via the first pad. In a second mode of this semiconductor memory device, the command set is inputted via the second pad.

Abstract: According to one embodiment, a semiconductor integrated circuit includes a first signal line including a first part and a second part, a second signal line including a third part and a fourth part, a first inverter, a second inverter, and a control circuit. A first signal is input to the first part in a first period. A second signal is input to the third part in a second period. The first inverter outputs, to the second part, a first inverted signal obtained such that a logic of the first signal is inverted. The second inverter outputs, to the fourth part, a second inverted signal obtained such that a logic of the second signal is inverted. The control circuit brings the second signal line into a floating state in the first period, and brings the first signal line into a floating state in the second period.

Abstract: A memory device and method of operation are described. The memory device may include memory cells of a first type that each store a single bit of information and memory cells of a second type that each store multiple bits of information. The memory cells of the first type may be more robust to extreme operating conditions than the second type but may have one or more drawbacks (e.g., lower density). The memory device may identify data to be written, and in response, may identify a temperature of the memory device. If the temperature is within a nominal operating range associated with a low risk of memory errors, the memory device may write the data to the memory cells of the second type. If the temperature is outside the nominal operating range, the memory device may write the data to the memory cells of the first type.

Abstract: Open block-based read offset compensation in read operation of memory device is disclosed. For example, a memory device includes an array of memory cells arranged in a plurality of blocks and a peripheral circuit coupled to the array of memory cells. The peripheral circuit is configured to, in response to a block of the plurality of blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage. The compensated read voltage has an offset from a default read voltage of the block.

Abstract: One embodiment provides an apparatus for a single axis tracker that includes a first strap component formed into a first portion of a bearing race. A second strap component is formed into a second portion of the bearing race. The first portion of the bearing race and the second portion of the bearing race removably interleave to hold a torque tube.

Abstract: Disclosed herein includes a solar panel angle adjustment system for actuation with a single hand. The solar panel adjustment system includes a tensioned variable ribbon configured to adjust the angular position of the mounting panel. The system includes a gear adapted to adjust the tensioned variable ribbon and configured to translate between a first position and a second position. Additionally, in some examples, the system includes a gear shaft mechanically coupled with the gear and configured to translate between the first and second position and actuate the gear, but the gear shaft is locked when disposed in the first position. The system may also include a spring adapted to bias the gear from the second position to the first position. Furthermore, the tensioned variable ribbon can adjust the angle of the mounting panel in response to the gear shaft actuating the gear in the second position.

Abstract: A boost circuit is arranged to reduce rise and fall times of pulsed power used for pulsed control operation of electric machines. Magnetic energy present in the electric machine at the end of a pulse is extracted by the boost circuit to reduce the pulse fall time. The energy is stored by the boost circuit and then applied at the beginning of a subsequent pulse to reduce the rise time. By reducing rise and fall times compared to not using such a boost circuit, machine efficiency is improved.

Abstract: A complex energy generation device using sunlight and solar heat includes: a heat storage tube having, at a first side portion thereof, an inlet portion into which heat medium oil flows, and having, at a second side portion thereof, an outlet portion from which the heat medium oil is discharged, the heat storage tube having a slit at a lower surface thereof along a longitudinal direction thereof; a solar panel having a plurality of solar cells on a front surface thereof; and a heat radiation panel having an upper portion inserted into the heat storage tube through the slit of the heat storage tube while sealing the slit, and a lower portion laminated on a rear surface of the solar panel.