Abstract: A module component includes a substrate having a first principal surface, a semiconductor substrate disposed on the first principal surface of the substrate, multiple terminals, and a resin layer. The terminals include multiple reference-potential terminals, which are electrically connected to the reference potential, and multiple signal terminals, which are disposed adjacent to at least one of the reference-potential terminals in the direction along an end portion of the substrate and which are supplied with a signal. In a plan view in the direction perpendicular to the first principal surface of the substrate, in at least one of the reference-potential terminals, the support portion is disposed between an end surface of the connection portion and the end portion of the substrate, and, in at least one of the signal terminals, the end surface of the connection portion is disposed between the support portion and the end portion of the substrate.

Abstract: Disclosed are a Pulse Width Modulation (PWM) generation circuit, a processing circuit and a chip. The PWM generation circuit is used for controlling a rotation speed of an external motor system. The PWM generation circuit includes a second clock prescaler and a PWM signal generator. A frequency division output end of the second clock prescaler is connected to a data input end of the PWM signal generator. The PWM signal generator includes an output frequency divider and a comparator. A clock output end of the output frequency divider is connected to a comparison input end of the comparator. By means of the technical solution, PWM signals with different duty ratios.

Abstract: A memory card includes a case and an integrated circuit package disposed in the case. The case includes a first case edge, a second case edge connected to the first case edge, a third case edge connected to the second case edge, a fourth case edge connected to the third case edge and the first case edge, and a first recessed groove formed in the second case edge, the first recessed groove being spaced apart from the first case edge and inwardly recessed. The integrated circuit package is disposed in an upper portion of the case between the first case edge and a first horizontal line that extends in a direction from a top end of the first recessed groove in the second case edge to the fourth case edge.

Abstract: The present invention relates to a photo-electrochemical device for production of a gas, liquid or solid using concentrated electromagnetic irradiation. The device comprises a photovoltaic component configured to generate charge carriers from the concentrated electromagnetic irradiation; and an electrochemical component configured to carry out electrolysis of a reactant. The photovoltaic component contacts the electrochemical component at a solid interface to form an integrated photo-electrochemical device; and further includes at least one reactant channel or a plurality of reactant channels extending between the photovoltaic component and the electrochemical component to transfer heat and the reactant from the photovoltaic component to the electrochemical component. The integrated photo-electrochemical device and auxiliary devices (such as concentrator, flow controllers) build a system which can flexibly react to changes in operating condition and guarantee best performance.

Abstract: According to one embodiment, a semiconductor storage device includes a board, a first electronic device mounted on the board, at least one second electronic device mounted on the board, and a heat dissipator. At least a portion of the second electronic device overlaps at least one of the board and the first electronic device in a first direction that is a thickness direction of the board. The heat dissipator includes a first member that includes a first portion located between the first electronic device and the second electronic device in the first direction, and a second member that includes a portion located between the first member and the second electronic device in the first direction. The second member is smaller in coefficient of thermal conductivity than the first member.

Abstract: Methods, systems, and devices for memory cells for storing operational data are described. A memory device may include an array of memory cells with different sets of cells for storing data. A first set of memory cells may store data for operating the memory device, and the associated memory cells may each contain a chalcogenide storage element. A second set of memory cells may store host data. Some memory cells included in the first set may be programmed to store a first logic state and other memory cells in the first set may be left unprogrammed (and may represent a second logic state). Sense circuitry may be coupled with the array and may determine a value of data stored by the first set of memory cells.

Abstract: A variety of applications can include devices or methods that provide read processing of data in memory cells of a memory device without predetermined read levels for the memory cells identified. A read process is provided to vary a selected access line gate voltage over time, creating a time-variate sequence where memory cell turn-on correlates with programmed threshold voltage. Total string current of data lines of a group of strings of memory cells of the memory device can be monitored during a read operation of selected memory cells of the strings to which a ramp voltage with positive slope is applied to an access line coupled to the selected memory cells. Selected values of the change of the total current with respect to time, from the monitoring of the total current, are determined. Read points to capture data are based on the determined selected values. Additional devices, systems, and methods are discussed.

Abstract: The present disclosure includes apparatuses, methods, and systems for multi-state programming of memory cells. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of four possible data states by applying a first voltage pulse to the memory cell wherein the first voltage pulse has a first polarity and a first magnitude, and applying a second voltage pulse to the memory cell wherein the second voltage pulse has a second polarity and a second magnitude, and the second voltage pulse is applied for a shorter duration than the first voltage pulse.

Abstract: A data storage device including a first printed circuit board (PCB) and a second PCB. The first PCB includes a controller, an interface configured to interface with a host device, and a first connector. The second PCB includes a non-volatile memory and a second connector. The second connector is configured to couple to the first connector to establish a communication connection between the controller and the non-volatile memory.

Abstract: A memory device includes a plurality of planes. A method of programming the memory device includes applying a first program pulse to one or more memory cells of a first plane of the plurality of planes, verifying whether each one of the memory cells reaches a predetermined program state, and in response to a preset number of the memory cells in the first plane failing to reach the predetermined program state after the memory cells being verified for a predetermined number of times, bypassing the first plane when applying a second program pulse after the first program pulse.

Abstract: A storage device is provided that applies pulsed biasing during power-up or read recovery. The storage device includes a memory and a controller. The memory includes a block having a word line and cells coupled to the word line. The controller applies a voltage pulse to the word line during power-up or in response to a read error. The voltage pulse may include an amplitude and a pulse width that are each a function of a number of P/E cycles of the block. The controller may also perform pulsed biasing during both power-up and read recovery by applying one or more first voltage pulses to the word line during power-up and one or more second voltage pulses to the word line in response to a read error. As a result, lower bit error rates due to wider Vt margins may occur and system power may be saved over constant biasing.

Abstract: Provided a filter and a redistribution layer structure including the same. The capacitor includes a first electrode, a second electrode, a third electrode, a dielectric layer, and a conductive through via. The second electrode is disposed above the first electrode. The third electrode is disposed between the first electrode and the second electrode. The dielectric layer is disposed between the first electrode and the third electrode and between the second electrode and the third electrode. The conductive through via penetrates the dielectric layer and the third electrode to be connected to the first electrode and the second electrode, and is electrically separated from the third electrode. The first electrode and the second electrode are signal electrodes, and the third electrode is a ground electrode.

Abstract: A power supply system for at least one system for transporting and/or machining workpieces having a plurality of electric drive units is disclosed. The supply grid of the drive units is supplied via at least one recuperating energy storage device, which is electrically connected to a charging device that is fed from an alternating- or three-phase low-voltage grid. The power supply system for a transport and/or machining system draws maximally 50 percent more power from the power supply grid compared to the regular nominal supply current regardless of the occurrence of current peaks.

Abstract: A motor drive device includes a first drive circuit to control an energization period of a first upper arm switch and a first lower arm switch connected to one end of a coil, a second drive circuit to control an energization period of a second upper arm switch and a second lower arm switch connected to another end of the coil, a current detection circuit to detect current flowing through the coil and output a current detection signal indicating a detection result of the current, a first protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a first enable signal indicating a determination result to the first drive circuit, and a second protection circuit to determine whether overcurrent has occurred based on the current detection signal and output a second enable signal indicating a determination result to the second drive circuit.

Abstract: Disclosed in the present disclosure is a hard disk fixing device, including: a seating, which includes a base fixed on a main board and a first pair of elastic buckles perpendicular to the base and arranged at two sides thereof; a first supporting seat, which includes a main body and an extending portion extending from the main body, wherein the extending portion may be snap-fitted between the first pair of elastic buckles, a first guiding slot is provided inside the main body and a through hole is provided in a side surface of the main body, and the first guiding slot is in communication with the through hole; a first adjusting fastener, which includes a sliding rod and a limiting rod connected to the sliding rod.

Abstract: A method for finding an optimum read voltage includes acquiring difference values between state bit counts of different positions. A direction for finding the optimum read voltage is determined based on the difference values. An offset for finding the optimum read voltage is determined based on correspondence between a difference value of bit count and offset. Reading is performed with the offset applied to a current read reference voltage, wherein upon read-success, the current reference voltage superimposed with the offset is the optimum read voltage, and upon read-error, new first and second positions are obtained based on the direction and the offset for finding the optimum read voltage until reading becomes successful.

Abstract: The technologies described and recited herein pertain to a permanent magnet motor having multiple voltage taps so that the motor may run in multiple configurations, e.g., a low-range and a high-range, and have multiple optimal operating points.

Abstract: Disclosed is an EMI shielding material. The EMI shielding material includes a resin material and metal particles mixed with each other, and the surface of the metal particles has an insulating protective layer. Further disclosed is a communication module product, including a module element arranged on a substrate, and the periphery of the module element that requires EMI shielding is filled with said shielding material. Further disclosed is an EMI shielding process, including the following steps: a. preparing a communication module on which a module element is provided; and b. applying said shielding material to a region of the module element that needs to be EMI shielded on the communication module. The shielding material shields a chip region in a wrapping manner, that is, the shielding material wraps and shields all six surfaces or six directions of the chip, and provides shielding between chips.

Abstract: A method for increasing a resolution by N bits performed by a processing circuit of a motor driving system, where N is a positive integer, and the method includes: performing a conversion upon an analog command, to generate a command count value; performing a first N-bit right-shifting operation upon the command count value, to generate an initial output value; performing a logical operation upon the command count value, to generate a low bit value; generating an overflow value according to the low bit value; and determining a final output value according to the initial output value and the overflow value.

Abstract: A magnetic erasing device including a magnet that includes an S pole and an N pole extending along an axial direction of the magnet, and a rotation mechanism for rotating the magnet in a housing around an axis of the magnet, wherein lines of magnetic force generated around the axis of the magnet during rotation of the magnet are designed to be applied to magnetic particles in the microcapsules to erase a visible image on a magnetic panel when the axis of the magnet is spaced from a surface of the magnetic panel by a predetermined distance.