Patents Examined by T. M. Arroyo
  • Patent number: 5289035
    Abstract: A tri-layer titanium coating for an aluminum layer of a semiconductor device. An aluminum layer used for interconnecting individual devices of an integrated circuit is formed on a semiconductor material. A first titanium nitride layer is deposited on the aluminum layer. A titanium layer is deposited on the first titanium nitride layer. A second titanium nitride layer is then deposited on the titanium layer. The tri-layer titanium coating prevents the formation of Al.sub.2 O.sub.3 and AIF.sub.3 during the etching of a via hole in an intermetal dielectric layer deposited above the second titanium nitride layer.
    Type: Grant
    Filed: July 15, 1992
    Date of Patent: February 22, 1994
    Assignee: Intel Corporation
    Inventors: Melton C. Bost, Simon Yang, Yeochung Yen, Jim Baldo, Barbara Greenebaum
  • Patent number: 5281829
    Abstract: An optical semiconductor device includes a semiconductor laser buried with a current blocking layer, and a photodetector, such as a phototransistor, which are provided on a semiconductor substrate. In such a device, the photodetector has the same thickness and composition as those of the current blocking layer, and a groove is provided in the semiconductor substrate to define an emitting end surface of the semiconductor laser and a light detection surface of the photodetector opposed to each other.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: January 25, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koyu Chinen
  • Patent number: 5278449
    Abstract: In this semiconductor device, contact holes extending from a lower interconnection layer containing diffusion layers at the surface of a Si substrate to an Al-involved interconnection layer formed above the Sis substrate through the intermediation of an interlayer dielectric film are filled with Al alloy having a eutectic point lower than that of Al-Si alloy. Then, for example, an Al-Ge alloy is sputtered, reflowed and allowed to react with the Si film to convert into an Al-Ge-Si alloy. At the stage of forming the Al-Ge-Si alloy, the reflow ceases. This brings the reduction of junction leakage current from the diffusion layers. Similarly in the case of a high aspect ratio of contact hole, this technique enables the contact hole to be fully filled with the above-mentioned Al alloy.
    Type: Grant
    Filed: August 31, 1992
    Date of Patent: January 11, 1994
    Assignee: Nec Corporation
    Inventor: Kuniko Miyakawa
  • Patent number: 5264725
    Abstract: A submicron-width fuse element is disclosed that protects peripheral DRAM chip devices from low current failures below the range of metal fuse elements. In a specific application, the fuse elements are used to protect a DRAM chip from dielectric failure of voltage supply filtering capacitors. A low cross-section and length allows minimum space for the element.
    Type: Grant
    Filed: December 7, 1992
    Date of Patent: November 23, 1993
    Assignee: Micron Semiconductor, Inc.
    Inventors: Patrick J. Mullarkey, Kurt D. Beigel