Abstract: A heat sink is attached to a semiconductor element functioning as an exothermic element, which is mounted on a circuit board and has a predetermined allowable power consumption, thereby cooling the semiconductor element. A semiconductor element having a lower allowable power consumption than the semiconductor element having the predetermined power consumption, which is hardly exposed to a cooling air flow cooled via the heat sink, is connected to a heat conductive auxiliary member connected at one end to the heat sink. Thus, the heat radiation efficiency of the semiconductor element having the lower allowable power consumption is enhanced.

Abstract: A semiconductor device where an aluminum electrode surrounds an output electrode of an element, is provide by a detector electrode formed on a ring shaped space between the output electrode and the aluminum electrode. Sliding of the aluminum electrode toward the output electrode which occurs in an aging degradation, is detected by contact between the aluminum electrode and the detector electrode.

Abstract: A peripheral IC 6 for a solid state imaging device is mounted on an island 7 of a lead frame and thereafter covered and sealed by a molding resin, thus forming a premolded package 2. Subsequently, a solid state image sensor 1 is mounted on the island 7 on one side thereof facing an opening. Thereafter, for protection of the solid state image sensor 1, a transparent lid 11 is attached to the premolded package 2 by adhesive. As a result, packaging area can be reduced in mounting the solid state image sensor on a packaging substrate, allowing video equipment such as video cameras to be miniaturized.

Abstract: A semiconductor device includes a semiconductor chip, a die-pad on which the semiconductor chip is mounted, a package encapsulating the die pad and the semiconductor chip, and a plurality of leads electrically connected to the semiconductor chip and projecting from the package, wherein each of the leads has a lead body made of pure nickel (Ni) having a purity equal to or greater than 99% and a first film formed thereon, the first film being made of palladium (Pd).

Abstract: A packaged semiconductor device, leadframe for making same, and method of mounting same to a printed circuit board are described. The device has a body, and a plurality of leads extending from the body. One or more alignment features are formed on the exterior of the package body, for maintaining precise alignment of the device with respect to a printed wiring board. The alignment feature is a tab formed as part of portion of the leadframe external to the package body. The tab may have various shapes, and may be provided with a hole for registering with a pin on an underlying substrate, such as a printed wiring board. The pin and the tab may be electrically connected.

Abstract: A cooling device formed in a thermally conductive substrate having a microstructure, such as a plurality of thermally conductive posts spaced apart by dimensions that induce capillary action in a liquid coolant. The posts extend away from the heated region and a space between the posts is supplied with liquid coolant which is contained by a meniscus near the tips of the posts. The coolant vaporizes at the meniscus and absorbs heat but, due to increased pressure in the coolant contained by the meniscus, does not boil within the space between the posts, allowing more liquid coolant contact with the thermally conductive substrate and posts. The vaporized coolant may be discharged into the air or into a chamber adjoining the tips having a lower pressure for removal of additional heat by gaseous expansion. The discharge of gaseous coolant allows the capillary flow of the liquid coolant in the space to be unimpeded, and the flow of liquid coolant may be augmented by a fluid pump.

Abstract: The invention may be incorporated into a method for forming a vertically oriented semiconductor device structure, and the semiconductor structure formed thereby, by forming a first transistor over a portion of a substrate wherein the first transistor has a gate electrode and a source and drain regions. First and second interconnect regions are formed over a portion of the gate electrode and a portion of the source and drain regions of the first transistor, respectively. A source and drain region of a second transistor is formed over the second interconnect. A Vcc conductive layer is formed over a portion of the source and drain region of the second transistor which is formed over the second interconnect.

Abstract: A microchip capacitor used as a circuit element in internal impedance matching circuits of microwave transistors is disclosed. A thin film resistor is used to make interconnection between two first metallized patterns in a paired electrode structure, and a pair of microstrip lines are used to make interconnection between the two first metallized patterns and the second metallized pattern. The thin film resistor and the microstrip lines form a Wilkinson type synthetic circuit wherein a signal flowing in the thin film resistor and a signal flowing in the microstrip lines cancel each other. An isolation between the first and second metallized patterns is improved.

Abstract: A tape carrier includes an elongated electrically insulating tape divided into a plurality of separable tape sections. A semiconductor chip is mounted at each of a plurality of semiconductor device mounting portions having a plurality of leads on each of the tape sections. The semiconductor chips are connected to the respective leads. A plurality of testing connection terminals on each of the tape sections are connected to respective testing connection terminals by testing wires.

Abstract: A package for discrete semiconductor devices, wherein the insulating characteristics of the package are improved by introducing an opening, indentations, grooves and positioning holes in the metal plate and shaping in appropriate form the retractable positioning pins of the metal plate in the molding die.

Abstract: A chip type electronic part has an outer electrode structure appropriate mainly for reflow soldering.An outermost layer of the outer electrode, provided at both end portions of the chip type electronic part, is to be soldered and made of a metal having a solidus temperature lower than 183.degree. C. and a difference not smaller than 10.degree. C., or more preferably not smaller than 30.degree. C., between its liquidus temperature and its solidus temperature, and is formed of a plating coat. The above-mentioned arrangement allows reflow soldering for the mounting of the chip type electronic part onto a substrate to be achieved at a low temperature while preventing the harmful influences of high-temperature soldering, and prevents the tombstone phenomenon in the soldering process.

Abstract: In a semiconductor device having a first conductor layer (25) formed on a first insulator layer (23) and a second insulator layer (29) formed on the first conductor layer, a second conductor layer (31) has a primary conductor film (35) formed on the second insulator layer, a secondary conductor film (37) formed on the primary conductor film, and a ternary conductor film (63) formed on the secondary conductor film. The second insulator layer has a recessed surface (29b) which defines a contact perforation exposing a predetermined area of an upper surface (25a) of the first conductor layer. The secondary conductor film is further formed on the recessed surface and the predetermined area. The primary conductor film has a primary resistance value. The secondary conductor film has a secondary resistance value which is lower than the primary resistance value.

Abstract: A cooling device for power electrical components which have electrodes includes a heatsink including a circuit in which a cooling fluid can flow and having a first side for exchange of heat with the component to be cooled. An electrically insulative and good heat conductor material plate is disposed between the first side of the heatsink and a first side of an electrical connection. A second side of this electrical connection makes thermal and electrical contact with one electrode of a component. The heatsink and the electrical connection are mechanically joined so that the device forms a compact assembly.

Abstract: An IC carrier comprising a case for receiving an IC, a carrier body for receiving the case, and a positioning device for correctly positioning the IC which is received in the case.

Abstract: A semiconductor device includes a semiconductor substrate having a pair of opposed main surfaces with a wiring conductor provided on one of the main surfaces; the substrate having at least one through hole extending therethrough so as to be perpendicular to the main surfaces; at least one electrically conductive pin provided on the other of the main surfaces at a position of the at least one through hole, and an adhesive filled into the at least one through hole for fixing the at least one conductive pin to the substrate, wherein the at least one conductive pin is connected electrically through the corresponding at least one through hole to the wiring conductor to transmit/receive an electrical signal to/from an external circuit.

Abstract: An integrated circuit package, and a method for forming the integrated circuit package, including a single layer or multilayer substrate in which interconnection vias are formed is described. Laser energy is swept across a surface of a mask in which holes have been formed. Laser energy passing through the holes of the mask forms vias in a substrate held in place below the mask. The laser energy is swept at such a speed and is maintained at such an energy level that the laser energy forms vias in the substrate, but does not penetrate a set of leads attached to the substrate. Vias may be formed in this way by either a mask imaging, contact mask or conformal mask technique. The laser energy is emitted from a non-thermal (e.g., excimer) laser. The substrate is formed of an organic (e.g., epoxy) resin. The resin may include reinforcing fibers (e.g., aramid fibers). Substrates may be formed on one or both sides of the set of leads.

Abstract: Positive mechanical alignment is provided between substrates using micro-bump contacts by forming "detented" conductive bump contacts on one substrate having a concave end which receive and align the generally convex contour of bump contacts on the other substrate. Various configurations of concavities and convexities are described. Flux may be disposed in the concave end of the detented bump contact to promote formation of joints between the concave and convex bump contacts. Both bump contacts may be formed of reflowable material, such as solder, or one or the other of the contacts may be formed of a non-reflowable material which may also function as a standoff between the two substrates. Each substrate is provided with a plurality of bump contacts, and one substrate may be provided with a combination of convex and concave bump contacts corresponding to concave and convex bump contacts on the other substrate. The inventive technique is useful for joining die-to-die, die-to-substrate, or package-to-substrate.

Abstract: A semiconductor infrared detector having a transistor structure with a superlattice base. The superlattice base is between a multiple quantum well (MQW) structure and an electron energy high pass filter. The superlattice base restricts electrons to minibands resulting in no overlap in energy between the energies of the photoelectrons and the dark electrons. As a result, more photoelectrons reach the collector, and the emitter to collector photocurrent transfer ratio is increased. The increased transfer ratio results in increased sensitivity of the detector. The superlattice base between the MQW structure and the electron energy high pass filter comprises multiple alternating wells and barriers. The wells are preferably made of GaAs and the barriers are preferably made of Al.sub.x Ga.sub.1-x As, where x is equal to 0.25.

Abstract: A semiconductor device comprises a plurality of leads respectively made up of an inner lead and an outer lead, a semiconductor chip electrically connected to the inner leads of the leads, and a package encapsulating at least the inner leads of the leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package has an upper part and a lower part which have mutually different sizes such that a stepped part is formed between the upper and lower parts by the different sizes, and each of the outer leads have a wide part which is wider than other parts of the outer lead extending outwardly of the package only within the stepped part of the package.

Abstract: A memory component has a rectangular semiconductor substrate containing active memory circuits and output terminals on a major surface thereof. An insulating layer on the major surface receives a plurality of metal connection leads, connecting the output terminals to connection pads located on the major surface along only one of longer sides of the substrate. A plurality of additional pads are distributed between the connecting pads and are devoid of connection leads. A memory module comprising several stacked memory components is also described, which uses the additional pads as relays.