Patents Examined by Terry L. Englund
  • Patent number: 7336756
    Abstract: A signal converter is comprised of a plurality of counters (“macro-counters”). In turn, each of the macro-counters is comprised of a plurality of single-bit counters (“micro-counters”) that are adapted to receive configuration data in the form of bit fields. The configuration data is comprised of data corresponding to a plurality of coefficients and of data for grouping the micro-counters into the macro-counters. The coefficients are derived from an input signal/output signal ratio of the converter, and control the manner by which the macro-counters generate the output signal. Thus the converter can be programmed by an end-user in the field.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: February 26, 2008
    Assignee: Miranova Systems, Inc.
    Inventor: Alexander R. Stephens
  • Patent number: 7336108
    Abstract: A semiconductor integrated circuit includes a pump circuit configured to raise an external power supply voltage to generate a stepped-up voltage, and a detector circuit configured to detect the stepped-up voltage generated by the pump circuit to control activation/deactivation of the pump circuit, wherein the detector circuit includes a differential amplifier configured to compare the stepped-up voltage with a reference voltage, and a current control circuit configured to control an amount of a bias current running through the differential amplifier in response to the activation/deactivation of the pump circuit.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: February 26, 2008
    Assignee: Fujitsu Limited
    Inventor: Atsushi Takeuchi
  • Patent number: 7332944
    Abstract: A frequency-controllable oscillator, having an oscillation device in which the oscillation frequency is controlled on the basis of a feedback current or voltage; a constant current source circuit; a charge device which charges a capacitor with a constant current from the constant current source circuit on the basis of an oscillation output from the oscillation device; and a control device which generates the current or voltage for control of the oscillation frequency of the oscillation device on the basis of electric charge stored in the capacitor and a predetermined reference value and which includes an integrator formed of an operational amplifier and an integrating capacitor, the Integrator performs integration on the basis of the charged voltage across the capacitor and the predetermined reference value, and the current or voltage for control of the oscillation frequency of the oscillation device is generated on the basis of an integrated output from the integrator.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: February 19, 2008
    Assignee: Asahi Kasei Microsystems Co., Ltd.
    Inventors: Takeshi Fujita, Hideaki Hirose
  • Patent number: 7327171
    Abstract: A charge pump clock circuit for a memory device generates pump clock signals at an adaptive rate. Clock edges are generated at a minimum of TD seconds apart so long as address transitions do not exceed a pre-determined limit. However, if address changes are occurring more frequently than this limit, i.e., 1/(2*TD), then clock edges will be generated at a rate that is proportional to the rate of address changes, where TD is approximately half of the address period. Two logic rules are implemented in hardware or equivalent software to make the clock signal adjustments.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: February 5, 2008
    Assignee: Atmel Corporation
    Inventor: Mathew T. Wich
  • Patent number: 7327185
    Abstract: An electronic system comprises a plurality of circuit paths. Each path in the plurality of circuit paths is coupled to receive a system voltage from a voltage supply. The system further comprises a first circuit for providing a first value indicating a first potential capability of operational speed of at least one path in the plurality of circuit paths and a second circuit for providing a second value for indicating a second potential capability of operational speed of the at least one path in the plurality of circuit paths. The system further comprises circuitry for adjusting the system voltage, as provided by the voltage supply, in response to a relation between the first value and the second value.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: February 5, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Hugh Mair, Sumanth Gururajarao
  • Patent number: 7323926
    Abstract: A charge pump circuit comprises a first pump stage, including a first sub-pump coupled to a first pre-charge MOSFET transistor, wherein the first sub-pump is used to pump down a gate of the first pre-charge MOSFET transistor to thereby increase the pre-charge efficiency of the first pre-charge MOSFET transistor. The higher efficiency the pre-charge MOSFET is, the lower the gate level of a pass transistor is. Thus, the charge sharing efficiency becomes better, and the body effect will be eliminated. The following pump stage is the same as the first pump stage. In addition, this pre-charging is implemented by PMOSFET only; therefore, only a single well is needed and then a small layout area can be achieved. Consequently, a high efficiency negative pump can be obtained.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: January 29, 2008
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuan-Yeu Chen, Yi-Ti Wang
  • Patent number: 7315193
    Abstract: Circuitry that includes a voltage controller (224) for providing a variable gate signal (220) for controlling the gate of a programming transistor (212) used in conjunction with programming an electrically programmable fuse (“eFuse”) (204) of an integrated circuit (200). The voltage controller adjusts the gate signal depending upon whether the circuitry is in an eFuse programming mode or an eFuse resistance measuring mode. The voltage controller may optionally include a voltage tuner (252) for tuning the gate signal to account for operating variations in the programming transistor caused by manufacturing variations.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: January 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Darren L. Anand, Larry Wissel
  • Patent number: 7315198
    Abstract: Disclosed is a voltage regulator capable of reducing a set-up time. A driver is connected between a power supply terminal and the output terminal, and supplies a power supply voltage to the output terminal in response to a signal of a control node. A first signal generator provides a first signal to the control node when a voltage of the output terminal is lower than the target voltage. A second signal generator provides a second signal to the control node for a predetermined period of time when the voltage of the output terminal becomes higher than a detection voltage while the first signal generator is providing the first signal to the control node.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: January 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Sung Park, Dae-Seok Byeon
  • Patent number: 7312649
    Abstract: A voltage booster power supply circuit using a first voltage VDD3 and a second voltage VDDM to boost the first voltage VDD3, which is higher than the second voltage, to provide a boosted voltage VPP. Thus, a high efficiency of generation of a boosted voltage can be achieved compared with a configuration in which only the second voltage is used to boost the first voltage. A detector circuit detects the boosted voltage VPP to control a voltage booster circuit.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: December 25, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenichi Origasa, Kiyoto Ohta
  • Patent number: 7307462
    Abstract: A driver circuit for a transistor provides a soft start feature where pulses provided to the transistor are varied in duration during startup. The driver also provides an overcurrent protection feature for disabling a driver output for a safe period of time when an overcurrent condition is detected. The driver circuit includes an oscillator that produces a saw tooth wave and a narrow width pulse train for determining pulse width and dead time, respectively. The driver circuit may be used in half-bridge or full-bridge drivers.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: December 11, 2007
    Assignee: International Rectifier Corporation
    Inventors: Xiao-chang Cheng, Edgar Abdoulin
  • Patent number: 7307471
    Abstract: A device for adaptively controlling a voltage supplied to circuitry in close proximity to the device, comprising a processing module and a first tracking element coupled to the processing module. The first tracking element produces a first value indicative of a first estimated speed associated with the circuitry. The device also comprises a second tracking element coupled to the processing module. The second tracking element produces a second value indicative of a second estimated speed associated with the circuitry. The processing module compares each of the first and second values to respective target values and causes a voltage output to be adjusted based on the comparisons. The first and second tracking elements comprise a plurality of transistors, at least some of the transistors selectively provided with a transistor bias voltage to adjust transistor speed.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: December 11, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gordon Gammie, Alice Wang, Uming U. Ko, David B. Scott
  • Patent number: 7304529
    Abstract: The method controls a charge pump generator having at least an output tank capacitor on which a regulated output voltage of the generator is produced, and a pump capacitor that is connected to a supply node and to ground during charge phases and is coupled in an anti-parallel configuration to the output tank capacitor during charge transfer phases, alternated to the charge phases. The method limits the current absorbed from the supply because the transfer capacitor is charged during at least an initial charge phase with a constant charge current of a pre-established value.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: December 4, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Diego Armaroli, Davide Betta, Marco Ferrari
  • Patent number: 7304527
    Abstract: A sensing circuit senses the programmed state of fuses such as polysilicon (poly) fuses. In a preferred embodiment, the sensing circuit comprises first and second amplifier stages, a fuse and a reference resistor wherein the fuse and the reference resistor are connected, respectively, to first and second inputs of the first amplifier stage. The first and second amplifier stages are differential amplifiers and the output of the second amplifier stage is buffered. Circuitry for programming the fuse is part of the sensing circuit.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: December 4, 2007
    Assignee: Altera Corporation
    Inventors: Mario E. Guzman, Wanli Chang, Christopher F. Lane
  • Patent number: 7301391
    Abstract: A current summing FIR filter can be implemented with multiple differential input stages and variable tail currents. The variable tail currents can be used to appropriately weight the present and previous digital input signals. The weighted outputs of the differential transistor pairs can be summed to provide a filtered output signal. The tail currents can be advantageously varied with variable current sources or by adjustment of the relative widths of the differential transistor pairs. In other embodiments, additional differential pairs can be added to adjust for systematic offset voltages caused by process-induced variations in the structure of circuit devices or to induce a desired offset.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: November 27, 2007
    Assignee: Intel Corporation
    Inventors: James E. Jaussi, Bryan K. Casper, Aaron K. Martin
  • Patent number: 7288984
    Abstract: The electric charge transferred in a charge transfer phase from the pump capacitor to the tank capacitor is diminished by reducing the amplitude of the voltage swing on the transfer capacitor proportionally to the current to be supplied. This is done by limiting the maximum voltage on the pump capacitor to a certain value. This maximum value is calculated to make the voltage on the transfer capacitor reach a certain minimum voltage at the end of the charge transfer phase. A charge pump generator includes a driving circuit that isolates the pump capacitor when the voltage on it reaches the maximum value.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: October 30, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Diego Armaroli, Davide Betta, Marco Ferrari
  • Patent number: 7282985
    Abstract: “A charge pump used for producing at least a first output voltage and a second output voltage according to an input voltage is disclosed. The charge pump includes a pump unit, first to fourth switches, a first output capacitor and a second output capacitor. During a first period, the input voltage and a first voltage, through a first end and a second end of the pump unit respectively, charge at least an internal capacitor. During a second period, the internal capacitor, based on a second voltage level of the first switch and through the second switch, provides the first output capacitor with charges for producing the first output voltage. Finally, during a third period, the internal capacitor, based on a third voltage level of the third switch and through the fourth switch, provides the second output capacitor with charges for producing the second output voltage.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: October 16, 2007
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Jen Yen, Liang-Kuei Hsu
  • Patent number: 7279963
    Abstract: A semiconductor device has first, second, and third connecting leads (1, 2, 3), whose respective base points (1f, 2f, 3f) have centroids (1m, 2m, 3m). The connecting leads are arranged wherein an angle (?) between a first line drawn between the centroids (1m, 3m) of the base points (1f, 3f) of first lead (1) and third lead (3) and a second line drawn between the centroids (2m, 3m) of the base points (2f, 3f) of second lead (2) and third lead (3) is 20° maximum. In addition, a semiconductor module may incorporate two or more semiconductor devices which are connected electrically in parallel.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: October 9, 2007
    Assignee: eupec Europäische Gesellschaft für Leistungshalbleiter mbH
    Inventors: Thomas Passe, Oliver Schilling
  • Patent number: 7276959
    Abstract: A pumping circuit of a semiconductor device includes a power supply unit for supplying a power source voltage to a first node, a first transfer pump for transferring a first electric potential of the first node to a second node, a first pumping unit coupled to the first node for pumping the power source voltage applied to the first node, a first pump control unit for controlling a voltage applied to a gate of the first transfer pump, a second transfer pump for transferring a second electric potential of the second node to a high voltage output terminal, a second pumping unit coupled to the second node for selectively pumping the second electric potential of the second node, and a second pump control unit for controlling a voltage applied to a gate of the second transfer pump in response to the power source voltage level. If the power source voltage is higher than a predetermined voltage, the first pumping unit performs a pumping operation, and the second pumping unit performs only an on or off operation.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: October 2, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Kwang Jun Cho, Keun Kook Kim
  • Patent number: 7276958
    Abstract: A voltage supply circuit which suppresses generation of current spikes in the power source current in operation, reduce noise, simplify the circuit configuration, and decrease the cost. Clock signal CLK at a prescribed frequency is supplied to charge pump driver (10); current sources IS1, IS2, . . . IS6 work at timing set with clock signal CLK to output driving currents; and, corresponding to the driving currents, capacitors C1, C2 . . . are alternately charged or discharged; the charge stored in the capacitor of a preceding stage is sequentially sent to the later capacitor stage, and a boosted voltage higher than power source voltage Vcc is obtained at output terminal T2. In the charge pump type booster, since capacitors are driven with current sources, it is possible to reduce spike noise in the boosting operation, and influence on other analog circuits can be suppressed.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: October 2, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Fumiaki Miyamitsu, Eizo Fukui
  • Patent number: 7271646
    Abstract: A loop powered process instrument comprises a control circuit measuring a process variable and developing a control signal representing the process variable. An output circuit for connection to a two-wire process loop controls current on the loop in accordance with the control signal. A power supply circuit is connected to the output circuit and the control circuit for receiving power from the two-wire process loop and supplying power to the control circuit. The power supply comprises cascaded charge pump circuits.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: September 18, 2007
    Assignee: Magnetrol International, Inc.
    Inventor: Michael D. Flasza