Abstract: A current mirror circuit includes a reference current source that generates a reference current, a reference transistor, a mirror transistor and a ratioed body bias feedback unit. The reference transistor has a first node that is coupled to the output of the reference current source, a gate that is coupled to the first node and a second node coupled to a common voltage. The mirror transistor has a gate coupled to the first node. The ratioed body bias feedback unit generates a body bias voltage coupled to the body of the reference transistor and the body of the mirror transistor. The ratioed body bias feedback unit is configured to adjust the body bias voltage in relationship to the common voltage so that the reference transistor and the mirror transistor each have a threshold voltage within a predefined range.

Abstract: A circuit device has a passive network (101) with an input (109) and an output, the output of the passive network (101) forming an output terminal (103) of the circuit device and a feedback path coupling the output terminal (103) of the circuit device to the input (109) of the passive network (101), the feedback path having an amplifier (107) configured to adjust an attenuation of the circuit device.

Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.

Abstract: An integrated circuit having a bootstrap charger for using in a switching mode power supply is disclosed. In one embodiment, a capacitor is connected between a floating terminal and a bootstrap supply terminal with a voltage drop over the capacitor, a comparing device with a first input terminal receiving a fraction of the voltage drop, a second input terminal receiving a reference, and an output terminal providing a control signal, and a charge circuit configured to charge the capacitor dependent on the control signal.

Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.

Abstract: A booster circuit for boosting and outputting a voltage between a power supply potential line and a reference potential line using a capacitor connected between a boosted voltage output node and the reference potential line that includes a first switch for separating the capacitor from the boosted voltage output node while a boosting operation is suspended, a second switch connected in parallel to the capacitor and being conductive while the boosting operation is suspended, and an electric path between the power supply potential line and the boosted voltage output node while the boosting operation is suspended.

Abstract: A current mirror has a first transistor and a second transistor. Current through the first and second transistors are an input current and an output current, respectively. The ratio of the output current to the input current is constant. The first and second transistors have the same voltage difference between the gate and source. The voltage difference between the drain and source of the second transistor is equalized to that of the first transistor by a first operational amplifier, and the voltage difference between the drain and source of the first transistor is equalized to a control voltage by a second operational amplifier. By setting the value of the control voltage, the first and second transistors can operate in triode region to simultaneously provide high output current and sufficient potential for a load.

Abstract: An internal voltage generator includes a high efficient charge pump. The internal voltage generator includes an oscillation signal generator for receiving a reference voltage and a pumping voltage to thereby output an oscillation signal, a pump control logic for outputting a pumping control signal and a precharge signal in response to the oscillation signal, and a charge pump for precharging the pair of bootstrapping node by connecting the pair of bootstrapping node in response to the precharge signal to thereby generate the pumping voltage of a predetermined level after precharging the pair of bootstrapping node into a level of the power supply voltage and charge sharing the pair of bootstrapping node and the pumping voltage in response to the precharge signal. Herein, the pumping control signal controls a pumping operation and the precharge signal precharges a pair of bootstrapping node for generating the pumping voltage by pumping a power supply voltage.

Abstract: A semiconductor integrated circuit device is equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.

Abstract: An oscillator includes an oscillating block for generating a control signal in response to an enable signal, wherein the control signal is periodically toggled and a feedback block for receiving the control signal to generate the enable signal in response to an oscillator enable signal wherein the enable signal operates so that the control signal is maintained to complete a last cycle period after an inactivation timing of the oscillator enable signal.

Abstract: A regulator includes a digital voltage detection unit for generating a digital voltage detection signal by detecting a digital value of a voltage level of an input voltage; a variable gain amplifying unit for amplifying the input voltage in an amplifying ratio according to a gain control signal; and a gain control unit for receiving the digital voltage detection signal to thereby generate the gain control signal.

Abstract: An architecture for implementing an integrated capacity includes a capacitive block inserted between first and second voltage reference. The block is formed The block is formed from elementary capacitive modules. An enable block is inserted between the first voltage reference and the capacitive block and includes switches connected to the elementary capacitive modules and driven on their control terminals by control signals. Each switch of the enable block is inserted between the first voltage reference and a first end of a corresponding elementary capacitive module. A verify and enable circuit is connected to the first voltage reference, as well as at the input of the first end of the elementary capacitive modules and at the output of the control terminals of the switches of the enable block.

Abstract: A bootstrapped circuit for sampling inputs with a signal range greater than supply voltage includes: a bootstrapped switch coupled between an input node and an output node; a first transistor coupled to a control node of the bootstrapped switch; a first capacitor having a first end coupled to the first transistor; a second transistor coupled between the first transistor and a supply node, and having a control node coupled to a first clock signal node; a third transistor coupled between the first transistor and the supply node; a charge pump having an output coupled to a control node of the third transistor; a level shifter coupled to a second end of the first capacitor; a fourth transistor coupled between the supply node and a control node of the first transistor; and a fifth transistor coupled between the control node of the fourth transistor and the output of the charge pump and, having a control node coupled to the supply node; wherein the second end of the first capacitor can be charged to an input voltag

Abstract: A charge pump circuit has a voltage increasing stage and a voltage decreasing stage in parallel, and sharing a common input. This shows charge to flow between the stages, so that charge used in the pumping of one stage is recycled to the other stage.

Abstract: Techniques for efficiently stabilizing an output voltage produced by a voltage regulation circuit are disclosed. One embodiment pertains to a voltage regulation circuit that includes a supplemental current source that can be controllably activated to provide a supplemental current to an output terminal of the voltage regulation circuit. This supplemental current can then assist in stabilizing the output voltage level at the output terminal of the voltage regulation circuit even in the presence of high current surges by a load (i.e., electronic circuitry). Advantageously, given the availability of the supplemental current, the required amount of capacitance for a decoupling capacitor (also coupled to the output terminal of the voltage regulation circuit) can be significantly reduced. In the case of semiconductor electronic devices, the reduction in the needed capacitance yields substantial die area savings with respect to decoupling capacitors.

Abstract: A voltage reference circuit receives an input voltage at a first port and a time varying input signal at a second port. The voltage reference circuit includes a switching circuit that is responsive to the first and second ports, and that generates an AC signal from the input voltage. The voltage reference circuit further includes a voltage multiplier circuit, coupled to the switching circuit to receive the AC signal and to create a DC signal with a selected voltage level. The voltage reference circuit further includes a plurality of voltage reference modules, coupled together to form a voltage reference stack, and coupled to the voltage multiplier circuit to receive the selected voltage level and output a precise reference voltage.

Abstract: A current monitoring circuit for DC-DC switching converters includes a track and latch comparator circuit (30) having a preamplifier (32) that is controlled independently of a latch circuit (34). The comparator is small and operates very fast and with improved sensitivity. For example, the preamplifier circuit is disabled when the latch stage is making its decision to avoid noise and input disturbances from affecting the latch stage. This selective disabling feature speeds up the signal processing of the comparator and allows it to work in parallel with other circuits. The latch stage can make its decision later, regardless of any further activity at the inputs of the comparator.

Abstract: A power supply circuit includes a charge pump converting voltage and a regulator controlling the converting operation of the charge pump. The charge pump stops the converting operation after a first delay time from when an output of the charge pump goes over a reference level and starts the converting operation after a second delay time longer than the first delay time from when the output of the charge pump goes below the reference level.

Abstract: An apparatus and method for automatically transitioning the operation of an electronic device to a reduced power consumption state if an input reference clock signal is stopped or no longer synchronized (locked) with the operation of the electronic device. The electronic device is automatically returned to a normal operating/power consumption state if the reference clock is restarted. Mixed analog and digital electronic components are employed to handle the transition of the electronic device between reduced and normal power consumption states. These components can include a phase frequency detector and a lost_lock detection circuit. The lost_lock detection circuit is typically connected to the output of phase frequency detector and outputs a lost_lock signal if the reference clock signal has stopped or lost_lock with a feedback clock signal.

Abstract: A processor or a semiconductor integrated circuit has circuit blocks performing signal processing, internal power supply nets, noise detecting circuits corresponding to each circuit block that detect noise on the power supply nets and an interruption handling circuit that prevents a malfunction in processing within a circuit block caused by noise on the power supply nets. When noise is detected, the interruption handling circuit performs an interruption by sending an interruption signal to the circuit block relating to the signal processing for preventing a malfunction to the circuit block. During the operation of a plurality of stages for executing an instruction, noise is monitored at every stage. If no noise is detected through a final stage, the result is outputted. If noise is detected at any one of the stages, then an interruption process is performed.