Patents Examined by Tim T. Vo
  • Patent number: 10614017
    Abstract: A USB extension device with dual power supply includes: a first power connection interface of USB Type-C and power transmission specification connected to a first power supply; a second power connection interface connected to a second power supply; a host connection interface of USB Type-C and power transmission specification connected to a host; an external interface connected to an external device; and a power supply management module connected to the first power connection interface, second power connection interface, host connection interface and external interface. When the first and second power connection interfaces are connected to the first and second power supplies respectively, the host supplies power through the host connection interface, and the power supply management module drives the first power supply to supply power to the host, while driving the second power supply to supply power to the power supply management module and to at least one external device.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: April 7, 2020
    Assignee: ACTION STAR TECHNOLOGY CO., LTD.
    Inventor: Kuo-Cheng Hsieh
  • Patent number: 10614019
    Abstract: In general, embodiments of the technology relate to a method and system for performing fast ordered writes in a storage appliance that includes multiple separate storage modules. More specifically, embodiments of the technology enable multicasting of data to multiple storage modules in a storage appliance, where the order in which the write requests are processed is the same across all storage modules in the storage appliance.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: April 7, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Michael Nishimoto, Samir Rajadnya
  • Patent number: 10614016
    Abstract: Embodiments of a method, a device and a computer-readable storage medium are disclosed. In an embodiment, a method for operating a Controller Area Network (CAN) device involves in response to receiving bits of an arbitration field of a CAN data frame at the CAN device, selecting a timing engine from a plurality of timing engines and sampling subsequent bits of the CAN data frame using the selected timing engine. The timing engines have different sample clock frequencies.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: April 7, 2020
    Assignee: NXP B.V.
    Inventors: Rolf van de Burgt, Bernd Uwe Gerhard Elend
  • Patent number: 10614013
    Abstract: An input/output module is provided for a bus system having a socket, the five contact cups of which each may comprise an electrical contact, and a measuring device for detecting a connector of a four-wire data cable. The measuring device can be configured to detect, when a connector is inserted into the socket, whether the connector comprises four or five electrical contact pins which are each plugged into one of the contact cups and are electrically connected to the respective electrical contact of the contact cups. The measuring device may be configured to close a first and a second switching device only when five electrical contact pins are detected in order to apply a respective supply voltage from two DC voltage supplies to the corresponding plugged contact pins of the connector plugged into the socket via the respective electrical contacts of the contact cups.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: April 7, 2020
    Assignee: Beckhoff Automation GmbH
    Inventors: Holger B├╝ttner, Thomas Rettig, Dirk Bechtel, Michael Jost, Christopher Pohl, Hans Beckhoff
  • Patent number: 10613959
    Abstract: Provided is a terminal for controlling an external device, not equipped with its own memory or controller, connected to the terminal. The portable terminal, when being connected to at least one external device, changes its setting with an extracted setting data matching the connected external device. Accordingly, the connected external device in a connection state to the portable terminal performs corresponding operations under control of the portable terminal.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: April 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Do-Hyung Lee
  • Patent number: 10613995
    Abstract: System and method for training and performing operations (e.g., read and write operations) on a double buffered memory topology. In some embodiments, eight DIMMs are coupled to a single channel. The training and operations schemes are configured with timing and signaling to allow training and operations with the double buffered memory topology. In some embodiments, the double buffered memory topology includes one or more buffers on a system board (e.g., motherboard).
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: April 7, 2020
    Assignee: Rambus Inc.
    Inventors: Chi-Ming Yeung, Yoshie Nakabayashi, Thomas Giovannini, Henry Stracovsky
  • Patent number: 10606492
    Abstract: A Fibre Channel (FC) or FC-over-Ethernet (FCoE) switch has ports to forward Input-Output (IO) requests, and service data transfers, between end devices in a storage area network. The switch receives at a port a time ordered sequence of IO requests for data transfers to be serviced by the port. Each IO request including a data length of the data transfer. The switch detects a microburst on the port for each IO request. To do this, the switch parses the IO request to retrieve the data length, determines a transfer time required to transfer the data length over the port, upon receiving a next IO request, determine whether a time interval between the IO request and the next IO request is less than the transfer time, and if the time interval is less than the transfer time, declaring a microburst on the port, otherwise not declaring a microburst.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: March 31, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Harsha Bharadwaj, Edward D. Mazurek
  • Patent number: 10606778
    Abstract: A bus system is provided. The bus system includes a master device, a bus and a plurality of slave devices. The slave devices and the master device are electrically connected through the bus. The master device communicates with the slave devices by using a one-to-one communication mechanism. The slave devices communicate with the master device by using an arbitration mechanism in which one of the slave devices is selected to communicate with the master device.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: March 31, 2020
    Assignee: Nuvoton Technology Corporation
    Inventors: Chun-Wei Chiu, Chia-Ching Lu, Shih-Feng Huang, Ming-Che Hung
  • Patent number: 10599539
    Abstract: Embodiments of a bus interface system are disclosed. The bus interface system includes a master bus controller and a slave bus controller coupled to a bus line. The master bus controller and the slave bus controller are configured to perform read operations using error codes and error checks. For example, the error codes may be cyclic redundancy codes (CRC). In this manner, accuracy is ensured during communications between the slave bus controller and the master bus controller.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: March 24, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala
  • Patent number: 10599593
    Abstract: A device for a spacecraft includes electronic boards; elements that are robust to radiation, i.e.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 24, 2020
    Assignee: THALES
    Inventors: Marc Fossion, Christophe Maillard
  • Patent number: 10592116
    Abstract: Systems, methods, and computer program products retrieve data from a low retrieval speed device. A request is made to retrieve data from the low retrieval speed device. A determination is made that the time to respond to the request will exceed a threshold amount of time. In response to the determination that the time to respond to the request will exceed the threshold amount of time, a load stall interrupt is generated. In response to the load stall interrupt, one or more system resources associated with a source of the request are released.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: March 17, 2020
    Assignee: International Business Machines Corporation
    Inventors: Charles R. Johns, Kirk E. Morrow, Michael J. Neuling, James Xenidis
  • Patent number: 10592438
    Abstract: Technologies are disclosed herein that allow configuration of firmware by a firmware configuration device connected to a target computer. The firmware configuration device may emulate keystroke and/or mouse movement data to transmit firmware configuration data to the target computer. The target computer can also transmit status information and/or commands through keyboard status light signals.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: March 17, 2020
    Assignee: AMERICAN MEGATRENDS INTERNATIONAL, LLC
    Inventors: Kai Yau, Muthu Kumar Sathiyanesan
  • Patent number: 10592129
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: March 17, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Patent number: 10592453
    Abstract: Moving from a back-to-back topology to a switched topology in an InfiniBand network includes, prior to connecting a switch for a first storage controller in the network and during reboot of the first storage controller, waiting for a second storage controller in the network to become master, and upon the second storage controller becoming master, changing cache files for local ports on the first storage controller regarding adjacent ports' LID assignments. An aspect further includes restarting a system manager for the first storage controller, connecting the first storage controller to the system with new LID assignments provided by changed files on first storage controller, and upon the first storage controller becoming active, rebooting the second storage controller, changing the LID assignments in the active storage controller, and adding new switches to the system.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: March 17, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Ahia Lieber, Liran Loya, Alex Kulakovsky
  • Patent number: 10585596
    Abstract: A method, computer system, and a computer program product for dynamic IO throttling in a storlet environment is provided. The present invention may include receiving, from a user, a computational algorithm. The present invention may also include deploying the received computational algorithm. The present invention may then include determining the user has not engaged throttling based on the deployed computational algorithm. The present invention may further include parsing the computational algorithm based on the engaged throttling. The present invention may include identifying a pipeline operation based on the parsed computational algorithm. The present invention may also include building a timing relation between the identified pipeline operation and an IO operation. The present invention may then include translating a timing lag to a storage IO operation based on the built timing relation.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: March 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Peter A. Balinski, Sasikanth Eda, Ashwin M. Joshi, John T. Olson, Sandeep R. Patil
  • Patent number: 10585820
    Abstract: In a memory controller, command, address and data are allocated to transmit the command, the address and the data to each of the plurality of memory devices through the same bus signal line and an identification signal to identify the command, the address and the data on the bus signal line is allocated to a memory common signal line in common among the plurality of memory devices to transmit the identification signal. When the memory controller indicates the data through the identification signal so as to make a first memory device transfer the data through the bus signal line, the memory controller makes the data transfer by the first memory device suspended, indicates the command through the identification signal so as to issue the command to a second memory device, and indicates the address through the identification signal so as to issue the address to the second memory device.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: March 10, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Ikeda, Yutaka Uematsu, Masatsugu Oshimi
  • Patent number: 10579032
    Abstract: A power distribution unit (PDU) interface system is disclosed. The PDU interface system receives, from an initiator, an input request associated with a PDU that includes a plurality of ports. The PDU is a first PDU type of a plurality of PDU types. The input request has a same syntax for each of the PDU types. It is determined that the PDU is the first PDU type of the plurality of PDU types. Based on the first PDU type, a first PDU-type input command is initiated to the PDU. The first PDU-type input command implements the input request on the PDU and has a different syntax than the input request.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: March 3, 2020
    Assignee: Red Hat, Inc.
    Inventors: Joseph D. Talerico, William W. Foster, Jr., Kambiz Aghaiepour
  • Patent number: 10579568
    Abstract: In one embodiment, a networked system includes network interface ports to couple to a computer data network, PCIe devices, bridge devices coupled to network interface ports, a PCIe network switch coupled between bridge devices and PCIe devices, and a configuration device communicatively coupled to bridge devices and PCIe devices. Ports transmit outgoing and receive incoming network traffic. PCIe devices support a function of the computer data network. Each bridge device receives incoming network traffic portions and transmits outgoing network traffic portions through a respective network interface port. PCIe network switch routes PCIe packets between the plurality of bridge devices and the plurality of PCIe devices. Configuration device configures and initializes the PCIe devices for commands and operations that originate from the bridge devices.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: March 3, 2020
    Assignee: Intel Corporation
    Inventors: Taufik Ma, Sujith Arramreddy
  • Patent number: 10579287
    Abstract: Provided are a computer program product, system, and method for sharing alias addresses among logical devices by a host accessing logical devices provisioned with a capacity from physical devices managed by a control unit. The host establishes with the control unit an association of logical devices and alias addresses assigned to the logical devices, wherein the alias addresses are associated with an alias management group. Alias address pool information is generated indicating each of the logical devices and their assigned alias addresses indicated in the association. The host uses from the alias address pool information any one of the alias addresses in the alias address pool information to access any of the logical devices associated with the same alias management group as the alias address.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: March 3, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Susan K. Candelaria, Scott B. Compton, Matthew R. Craig, Clint A. Hardy, Matthew J. Kalos, Dale F. Riedy, Richard A. Ripberger, Harry M. Yudenfriend
  • Patent number: 10579580
    Abstract: The disclosure relates to bus interface systems. In one embodiment, the bus interface system includes a bus line along with a master bus controller and a slave bus controller coupled to the bus line. In order to start a data frame, the master bus controller is configured to generate a sequence of data pulses along the bus line such that the sequence of data pulses is provided in accordance to a start of sequence (SOS) pulse pattern. The slave bus controller is configured to recognize that the sequence of data transmitted along the bus line by the master bus controller has been provided in accordance with the SOS pulse pattern. In this manner, the slave bus controller can detect when the master bus controller has started a new data frame. As such, the exchange of information through data frames can be synchronized along the bus line with requiring an additional bus line for a clock signal.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: March 3, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Christopher Truong Ngo, Alexander Wayne Hietala