Abstract: One or more systems, devices and/or methods of use provided herein relate to a device that can provide bandwidth and/or saturation power to amplify a plurality of readout frequencies or to convert one or more frequencies. In quantum technology, the one or more systems, devices and/or methods of use provided herein can be employed to simultaneously readout a plurality of qubit resonators. A device can comprise a Josephson parametric converter device comprising a Josephson ring modulator having a pair of nodes, and an impedance matching circuit network operatively connected across the pair of nodes. The device can be separately operable in an amplification mode or in a conversion mode.

Abstract: An RF switch to controllably withstand an applied RF voltage Vsw, or a method of fabricating such a switch, which includes a string of series-connected constituent FETs with a node of the string between each pair of adjacent FETs. The method includes controlling capacitances between different nodes of the string to effectively tune the string capacitively, which will reduce the variance in the RF switch voltage distributed across each constituent FET, thereby enhancing switch breakdown voltage. Capacitances are controlled, for example, by disposing capacitive features between nodes of the string, and/or by varying design parameters of different constituent FETs. For each node, a sum of products of each significant capacitor by a proportion of Vsw appearing across it may be controlled to approximately zero.

Abstract: Systems and methods that facilitate multilevel hysteresis voltage control methods for cascaded multilevel voltage modulators having a plurality of power cells connected in series and has any positive integer number of output voltage levels to control any unipolar voltage on the load of the voltage modulator, and transfer electrical power from an electrical grid via AC/DC converters or directly from energy storage elements of the power cells to that load. A method of operational rotation of the power cells of a multilevel voltage modulator, which ensures an equal power sharing among the power cells and voltage balancing of the energy storage elements of the power cells of the modulator.

Abstract: An integrated cinema amplifier comprises a power supply stage that distributes power over a plurality of channels for rendering immersive audio content in a surround sound listening environment. The amplifier automatically detects maximum and net power availability and requirements based on audio content by decoding audio metadata and dynamically adjusts gains to each channel or sets of channels based on content and operational/environmental conditions. A power supply stage provides power to drive a plurality of channels corresponding to speaker feeds to a plurality of speakers. The amplifier has a front panel having an LED array with each LED associated with a respective channel or group of channels of the multi-channel amplifier, and a control unit configured to light the LEDs according to display patterns based on operating status or error conditions of the amplifier.

Abstract: An system-on-a-chip (“SoC”) is provided. In some examples, the SoC includes a processor and a plurality of timer circuit blocks including at least a first timer circuit block and a second timer circuit block. Each of the plurality of timer circuit blocks may be selectively coupled by at least one of a first programmable matrix and a second programmable matrix. In some examples, the first programmable matrix may be configured to couple a second trigger input of the first timer circuit block with a first trigger output of the second timer circuit block. In some examples, the second programmable matrix is configured to couple a second fault input of the first timer circuit block with a first fault output of the second timer circuit block.

Abstract: An apparatus includes a capacitive device configured to provide bias power for a high-side switch, a gate drive path having variable resistance connected between the capacitive device and a gate of the high-side switch, wherein the gate drive path having variable resistance is of a first resistance value in response to a turn-on of the high-side switch, and the gate drive path having variable resistance is of a second resistance value in response to a turn-off of the high-side switch, and wherein the second resistance value is greater than the first resistance value, and a control switch connected between the gate of the high-side switch and ground.

Abstract: A pulse width modulator circuit with circuitry for providing a first and second pulse width modulation signal with dead time periods between the first and second pulse width modulation signals, an input for receiving a signal representative of a current in a load adapted to be driven in response to the first and second pulse width modulation signals, and circuitry coupled to the input for adjusting the dead time periods in response to the signal representative of a current.

Abstract: Examples described herein generally relate to clock tree routing in a chip stack. In an example, a multi-chip device includes a chip stack. The chip stack includes chips. The chip stack includes a clock tree. In-chip routing of the clock tree is contained within one logical chip of the chip stack. The chip stack includes leaf nodes disposed in respective chips. Each leaf node of the leaf nodes is electrically connected to the clock tree through a respective leaf-level connection bridge. The respective leaf-level connection bridge extends in an out-of-chip direction through a plurality of the chips.

Abstract: A system and method of measuring a temperature including applying a first set of voltages across a circuit in sequence; detecting a second set of voltages corresponding to the first set of voltages, wherein the second set of voltages includes a first detected voltage, a second detected voltage, and a third detected voltage, wherein the first applied voltage corresponds to the first detected voltage, the second applied voltage corresponds to the second detected voltage, and a third applied voltage corresponds to the third detected voltage; modifying an output of a heater proximate to the diode within the circuit, wherein a combined heat dissipation of the heater and the diode remains constant during operation of the circuit; and determining a temperature proximate to the diode based on the first set of voltages and the second set of voltages.

Abstract: A trim circuit for an e-fuse unit includes: a mirroring circuit for receiving an enable signal, when triggered by the enable signal, the mirroring circuit generating a driving voltage; and a driving transistor coupled to the mirroring circuit, in response to the driving voltage from the mirroring circuit, the driving transistor turning ON to generate a MOS current to an output node, wherein the output node is coupled to the e-fuse unit, and in response to the MOS current from the output node, the e-fuse unit is burned out.

Abstract: A power semiconductor module includes a semiconductor switching element, a gate control pattern to which a gate electrode of the semiconductor switching element is connected, a source control pattern to which a source electrode of the semiconductor switching element is connected, a capacitor to form a low-pass filter, a capacitor arrangement pattern to which one end of the capacitor is connected, and a wire. The other end of the capacitor is connected to the source control pattern. The wire electrically connects the capacitor arrangement pattern and the gate control pattern.

Abstract: There is provided a detection chip including a charging circuit, a discharging circuit, a counter and a processor. The charging circuit provides a first charging current within a first charging interval, and provides a second charging current, smaller than the first charging current, within a second charging interval. The discharging circuit provides a first discharging current within a first discharging interval, and provides a second discharging current, smaller than the first discharging current, within a second discharging interval. The counter counts the second charging interval and the second discharging interval. The processor identifies a touch event according to the second charging interval and the second discharging interval.

Abstract: An improved circuit or method generates first and second initial pulses that do not overlap. First and second drive pulses are generated based on the first and second initial pulses, respectively. A first transistor is turned on with the first drive pulses. A second transistor is turned on with the second drive pulses. A current flows in response to an on-time state of the first transistor overlapping with an on-time state of the second transistor. A delay of the second drive pulses is decreased based on a time of the current flow overlapping with one of the first initial pulses; and the delay of the second drive pulses is increased based on the time of the current flow overlapping with one of the second initial pulses.

Abstract: The present invention relates to a high-frequency semiconductor device. A conventional high-frequency semiconductor device including an input second-order harmonic matching circuit has such a problem that gain decrease occurs. In a high-frequency semiconductor device (100) of the present invention, two adjacent unit transistor cells (7) and (8) are connected to one input second-order harmonic matching circuit (19) provided on an upper surface of a semiconductor substrate (1). The input second-order harmonic matching circuit (19) includes a first capacitor (13), a first inductor (14), a second capacitor (15), and a second inductor (16). The first capacitor (13) and the first inductor (14) resonate at the frequency of a fundamental wave, and each of impedances as seen by input electrodes of the two unit transistor cells (7) and (8) is short-circuited at the frequency of a second-order harmonic.

Abstract: A method of driving an electrical load includes coupling a power supply source to a power supply pin of a driver circuit, and coupling an electrical load to at least one output pin of the driver circuit. A driver sub-circuit of the driver circuit produces at least one driving signal for driving the electrical load. The at least one driving signal is provided to the electrical load via the at least one output pin. The at least one driving signal is modulated to supply the electrical load with a load current and to subsequently interrupt the load current. A compensation current pulse is sunk from the power supply pin, at a compensation circuit of the driver circuit, in response to the load current being interrupted.

Abstract: A power domain change circuit includes an input circuit and an output circuit. The input circuit is suitable for operating in a first power domain and generating first and second intermediate processing signals. The output circuit is suitable for operating in a second power domain and generating a final output signal by averaging and combining transition jitter components of the first and second intermediate processing signals.

Abstract: Methods and apparatuses control electrical current supplied to a plurality of processing units in a multi-processor system. A plurality of current usage information corresponding to the processing units are received by a controller to determine a threshold current for each of the processing units. The controller determines a frequency reduction action and an instructions-per-cycle (IPC) reduction action for the each of the processing units based on the threshold current and regulates operations of the processing units based on the determined frequency and IPC reduction actions.

Abstract: To provide a probe including a TGC circuit therein. The probe includes a plurality of receive circuits. Each receive circuit includes: an ultrasound transducer; a transmit/receive switch; a variable attenuator; a first capacitor; and an amplifier. The ultrasound transducer converts the receive signal into a ground level electric signal and outputs the ground level electric signal as a first output signal. The transmit/receive switch is connected to a first signal line, and switches depending on whether to output the first output signal output from the ultrasound transducer to the first signal line. The variable attenuator includes a control terminal and two terminals, and changes a resistance value between the two terminals other than the control terminal based on a control signal input to the control terminal.

Abstract: A driving circuit, a method for driving the same, and a microfluidic device are provided. The driving circuit includes a constant voltage writing module configured to transmit a constant voltage to an output terminal of the driving circuit, an AC voltage writing module configured to transmit an AC voltage to the output terminal of the driving circuit, a first switch, and a first capacitor. The first switch includes an input terminal electrically connected to a third signal line, an output terminal electrically connected to control terminals of the AC voltage writing module and the constant voltage writing module, and a control terminal electrically connected to a first scan line. The first capacitor is configured to stabilize a potential of the output terminal the first switch.

Abstract: Disclosed is a circuit for shifting a fixed ground level to a floating ground level in a motor drive system, including a floating ground high level line, a floating ground output level line, a floating ground low level line, a normal input level line, and a normal ground line that are used for characterizing an application detail. The circuit includes a controlled switching current source, a first upper current rectifier, a second upper current rectifier, a lower current rectifier, and an amplifying and shaping circuit that are integrated on a same substrate.