Abstract: Disclosed herein is a hybrid resonant capacitor circuit including a first capacitor configured to discharge resonant current to interrupt a load current to a switch in parallel with the hybrid resonant capacitor circuit, a second capacitor coupled in parallel with the first capacitor, wherein the second capacitor is configured to transfer energy stored in the second capacitor to the first capacitor after discharge of the resonant current from the first capacitor, and a current limiter coupled in series with the second capacitor. A static transfer switch including a thyristor switch and the hybrid resonant capacitor circuit is also disclosed herein, as is a method for facilitating multiple consecutive voltage source transfers between a first voltage source and a second voltage source powering a load, using the hybrid resonant capacitor circuit.

Abstract: A device including a semiconductor layer comprising first regions delimited by second regions and third regions; first electrostatic control gates including first conductive portions extending parallel to each other, in vertical alignment with the second regions; second electrostatic control gates including second conductive portions extending parallel to each other, in vertical alignment with the third regions; wherein each first gate includes an electrostatic control voltage adjustment element forming two impedances connected in series, one end of one of the impedances being coupled to the first conductive portion of the first gate and one end of the other of the impedances being coupled to a third conductive portion applying an adjustment electric potential to the second impedance, and wherein the value of at least one of the impedances is adjustable.

Abstract: Disclosed herein is a sensor having an extended sensing distance range beyond conventional proximity sensors. The sensor includes an electrical component structure having a topology in which current is concentrated close to a periphery of the electrical component to produce an extended sensing field. A frequency adjustment circuit can be used to control a frequency of the sensing field to avoid jammers or other interfering signals.

Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel.

Abstract: A quantum bit array is disclosed. In an embodiment, the quantum bit array includes a control gate coupled to a qubit and at least one pass gate coupled between the qubit and an adjacent qubit to control operation of the qubit of the quantum bit array, a bit line, and a first transistor channel that connects the bit line to the control gate. The array further comprises at least one word line coupled to the first transistor channel. The at least one word line selectively controls charge flow through the first transistor channel. The array further comprises a capacitor coupled to selectively store charge in the first transistor channel.

Abstract: A system-on-chip includes: a dynamic power monitor configured to generate a power detection signal by calculating an amount of power consumed by a functional circuit in real time; a frequency controller configured to detect an idle period and a running period of the functional circuit in response to the power detection signal, and generate a clock control signal based on the power detection signal; and a clock controller configured to change a frequency of a clock signal provided to the functional circuit, based on the clock control signal. The running period includes: a first running period in which the frequency of the clock signal has a first value based on the clock control signal; and a second running period in which the frequency of the clock signal has a second value that is greater than the first value based on the clock control signal.

Abstract: An accelerator for modern convolutional neural networks applies the Winograd filtering algorithm in a wavelength division multiplexing integrated photonics circuit modulated by a memristor-based analog memory unit.

Abstract: Provided is a compact digital attenuator. The compact digital attenuator includes a first attenuation cell to an nth attenuation cell, which include a plurality of attenuation cells connected to each other in parallel through a transmission line, wherein each of the plurality of attenuation cells may include a plurality of switch elements connected to each other in parallel, wherein the plurality of switch elements may be connected to the transmission line through one contact point.

Abstract: In an embodiment, a method for operating an ACF converter includes: turning on a low-side transistor that is coupled between a primary winding of a transformer and a reference terminal to cause a forward current to enter the primary winding, turning off the low-side transistor; after turning off the low-side transistor, turning on a high-side transistor that is coupled between the primary winding and a clamp capacitor to cause a reverse current to flow through the primary winding; and after turning on the high-side transistor, when an overcurrent of the reverse current is not detected, keeping the high-side transistor on for a first period of time, and turning off the high-side transistor after the first period of time, and when the overcurrent of the reverse current is detected, turning off the high-side transistor without keeping the high-side transistor on for the first period of time.

Abstract: A transmission line has a first conductor layer extending in a first direction, a second conductor layer disposed on a side of a first surface of the first conductor layer via a first dielectric layer, the second conductor layer extending in the first direction, and a third conductor layer disposed on a side of a second surface of the first conductor layer opposite to the first surface, via a second dielectric layer, the third conductor layer extending in the first direction, wherein a width, in a second direction intersecting the first direction, of each of the second conductor layer and the third conductor layer is different at a plurality of locations in the first direction, and the first conductor layer, the second conductor layer, and the third conductor layer at least partially overlap each other in a plan view from a normal direction of the first surface.

Abstract: A drive circuit of a power semiconductor element comprises a gate drive voltage generator to generate, based on an ON/OFF drive timing signal input to an input terminal, a gate drive voltage to be applied to a gate electrode of a switching element having the gate electrode for controlling a main current that flows between a first main electrode and a second main electrode, wherein the gate drive voltage generator includes a gate current limiting circuit in which a current limiter to limit a current and a voltage limiter to limit the magnitude of a voltage applied to both ends of the current limiter are connected in parallel.

Abstract: A closed-loop feedback system and method of active noise cancellation to maintain a desired operating frequency of a qubit during a quantum computation, even when that frequency is relatively sensitive to flux noise. A series of Ramsey experiments is performed on the qubit to estimate an offset between its actual and desired operating frequencies, and the error is accumulated. After the probing is complete, the accumulated error is supplied to an arbitrary waveform generator that produces a magnetic flux that is coupled to the qubit, thereby tuning the qubit and actively controlling its operating frequency. Having corrected the operating frequency of the qubit and extended its coherence time, the quantum state of the qubit is allowed to evolve according to the computation.

Abstract: A low voltage drive circuit includes a transmit digital to analog circuit that converts transmit digital data into analog outbound data by: generating a DC component; generating a first oscillation at a first frequency; generating a second oscillation at the first frequency; and outputting the first oscillation or the second oscillation on a bit-by-bit basis in accordance with the transmit digital data to produce an oscillating component, wherein the DC component is combined with the oscillating component to produce the analog outbound data, and wherein the oscillating component and the DC component are combined to produce the analog outbound data. A drive sense circuit drives an analog transmit signal onto a bus, wherein the analog outbound data is represented within the analog transmit signal as variances in loading of the bus at the first frequency and wherein analog inbound data is represented within an analog receive signal as variances in loading of the bus at a second frequency.

Abstract: A device comprises, a first power source providing a first voltage, a second power source providing a second voltage less than the first voltage, a first bias voltage source providing a first bias voltage between the first voltage and the second voltage, a second bias voltage source providing a second bias voltage between the first voltage and the second voltage, the second bias voltage greater than or equal to the first bias voltage. The device also includes an output, a pull up network coupled in series between the first power source and the output pad including: a first gate coupled to the bias voltage source; and a second gate coupled to a signal that varies between first bias voltage and first power source. The device includes and a pull down network coupled between the output pad and second power source and including: a third gate coupled to the second bias voltage source; and a fourth gate coupled to a signal that varies between the second power source and the second bias voltage source.

Abstract: There is described herein a topologically protected quantum circuit with superconducting qubits and method of operation thereof. The circuit comprises a plurality of physical superconducting qubits and a plurality of coupling devices interleaved between pairs of the physical superconducting qubits. The coupling devices comprise at least one ?-Josephson junction, wherein a Josephson phase ?0 of the ?-Josephson junction is non-zero in a ground state, the coupling devices have a Josephson energy EJ?, the physical superconducting qubits have a Josephson energy EJq, and the circuit operates in a topological regime when E J ? q 2 > - E J ? ? ? cos ? ? 0 > E J ? q 3 .

Abstract: An integrated cinema amplifier comprises a power supply stage that distributes power over a plurality of channels for rendering immersive audio content in a surround sound listening environment. The amplifier automatically detects maximum and net power availability and requirements based on audio content by decoding audio metadata and dynamically adjusts gains to each channel or sets of channels based on content and operational/environmental conditions. A power supply stage provides power to drive a plurality of channels corresponding to speaker feeds to a plurality of speakers. The amplifier has a front panel having an LED array with each LED associated with a respective channel or group of channels of the multi-channel amplifier, and a control unit configured to light the LEDs according to display patterns based on operating status or error conditions of the amplifier.

Abstract: An electronic component (10) is formed by a semiconductor component or a semiconductor-like structure having gate electrode assemblies (16, 18), for initializing the quantum mechanical state of a qubit.

Abstract: A signal generation unit 2, a DA converter 3, variable attenuators 40, 42, 44, and 46 that attenuate the analog signal converted by the DA converter 3, a measurement unit 6 that detects a level of the signal attenuated by the variable attenuators 40, 42, 44, and 46 and passed through one or more semiconductor components, and a control unit 7 that obtains a value of a step error, which is a correction value of an attenuation amount of the variable attenuators 40, 42, 44, and 46 in each of a plurality of steps obtained by dividing a maximum value of the attenuation amount of the variable attenuators 40, 42, 44, and 46 by a variation amount, which is a predetermined attenuation amount are included.

Abstract: A sampling switch circuit, including an input node, which receives an input voltage signal to be sampled, a sampling transistor having gate, source and drain terminals, the source terminal connected to the input node, a capacitor, a current source configured to cause a defined current to flow therethrough and switching circuitry configured to alternate between a precharge configuration and an output configuration depending upon a clock signal. In the precharge configuration, the switching circuitry connects the capacitor into a current path between said current source and a first voltage reference node to form a potential difference across the capacitor which is dependent on the defined current. In the output configuration, the switching circuitry connects the capacitor between a second voltage reference node and the gate terminal of the sampling transistor so that a voltage level applied at the gate terminal of the sampling transistor is dependent on the defined current.

Abstract: Various implementations of a current flattening circuit are disclosed, including those utilizing a feedback current regulator, a feedforward current regulator, and a constant current source.