Abstract: A dynamically configurable portion of a cache shared between central processing and graphics units in a highly integrated multimedia processor is engaged as a secondary level in a hierarchical texture cache architecture. The graphics unit includes a small multi-ported L1 texture cache local to its 2D/3D pipeline that is backed by the relatively large, single ported portion of the shared cache. Leveraging the shared cache as a secondary level texture cache reduces system memory bandwidth and die size without significant sacrifice in performance.

Abstract: An image processing apparatus which can effectively use a storage circuit provided together with a logic circuit, perform high speed processing, and reduce the power consumption without causing a decline in the performance. The image processing system includes a DRAM for storing image data and a logic circuit, which are provided together on a semiconductor chip. The DRAM is divided into a plurality of DRAM modules, and the divided plurality of DRAM modules are arranged around a logic circuit portion for carrying out graphic drawing processing etc. When the ratio of valid data occupying bit lines in one access increases, the distances from the DRAM modules to the logic circuit portion become uniform, the length of the longest path interconnection can be made shorter comparing with the case of arrangement fixed in one direction, and the overall operating speed can be improved.

Abstract: An amplifier circuit comprising an input stage and an output stage which are cascade-connected between a signal input terminal to which an input signal is input and a signal output terminal to which a capacitive load is connected and which includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.

Abstract: A computer system (10) can prepare and present on a display (22) a two-dimensional image that includes a perspective view, from a selected eyepoint (71, 152), of an object (23) which is a three-dimensional object of an approximately spherical shape, such as the earth. The system maintains image information for the object at each of several different resolution levels, portions of which are selected and mapped into the perspective view for respective portions of the surface of the object. In order to determine what resolution level to use for a given section of the surface of the object, the system relies on a combination of a logarithm of the square of a distance from the eyepoint to a point on the surface section, and a logarithm of the square of the degree of tilt of the surface section in relation to the eyepoint.

Abstract: A method and apparatus for adapting an acoustic touchscreen controller to the operating frequency requirements of a specific touchscreen are provided. The adaptive controller can either utilize look-up tables to achieve the desired output frequency or the it can use a multi-step process in which it first determines the frequency requirements of the touchscreen, and then adjusts the burst frequency characteristics, the receiver circuit center frequency, or both in accordance with the touchscreen requirements. In one embodiment, the adaptive controller compensates for global frequency mismatch errors. In this embodiment a digital multiplier is used to modify the output of a crystal reference oscillator. The reference oscillator output is used to control the frequency of the signal from the receiving transducers and/or to generate the desired frequency of the tone burst sent to the transmitting transducers.

Abstract: Graphics call sequence optimizer in a graphics system that includes a display list memory to store graphics calls to be executed. The optimizer optimizes an original graphics call sequence that includes a plurality of graphics primitive data-sets generated by a graphics application program in. accordance with a graphics application program interface, generating an optimized graphics call sequence. The optimizer is configured to optimize the original graphics call sequence to produce the optimized graphics call sequence without storing the original graphics call sequence in the display list memory. The optimizer is configured to coalesce graphics primitive data sets within the original graphics call sequence to generate a corresponding single graphics primitive data set in the optimized graphics call sequence that causes a same rendering in the graphics system as the original graphics call sequence.

Abstract: Provided is an electrical circuit that provides a boosting circuit that all in one provides a regulated step-up voltage to a non-linear device such as an array of light emitting diodes (LEDs) used in a liquid crystal display (LCD). The unique placement of the current sensing circuit within the boosting circuitry eliminates the need for a separate current regulating circuit, thus minimizing the circuitry needed to provide a constant back lighting LED array of constant luminosity.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: A memory structure and method for implementing an on screen display (OSD) is disclosed. The present invention separates a command area, which stores small but frequently updated data causing fatal errors due to erroneous read, from a bitmap area, which stores relatively larger data, less frequently updated than the command area and which is not sensitive to errors. Thus, OSD memory structure and method allows an external host processor to effectively control the OSD process. Also, the command area further comprises a global command and a plurality of local commands, wherein the global command contains common control information to the local commands and control information other than OSD information, thereby allowing the external host processor to effectively control the OSD even when implementing multistandard OSD where a plurality of bitmap and commands for these bitmap are constructed in an external memory.

Abstract: An image display apparatus which displays images, suppressing the occurrence of the moving image false edge. The image display apparatus selects a signal level among a plurality of signal levels in accordance with a motion amount of an input image signal, where each signal level is expressed by an arbitrary combination of 0, W1, W2, . . . and WN and luminance weights W1, W2, . . . and WN are assigned to subfields.

Abstract: There is provided a method for driving a discharge device, especially a plasma display panel to improve a discharge process. The discharge device driving method prevents the increase of a discharge voltage and the decrease of an operating margin since space charge is efficiently controlled to lower the discharge voltage by adding a non-discharge signal for controlling space charge to a driving signal applied to at least one of two discharge electrodes, or to a third electrode, during a discharge sustaining period of the driving signals applied to both the discharge electrodes. In particular, the effects of the present invention is markedly excellent in the case of a pulse width of 1 &mgr;s or below. Discharge can be stably sustained by using a space-charge controlling non-discharge pulse of 200 ns˜1 &mgr;s wide, according to the panel structure, physical characteristics, and the driving method.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: A dual-cache pixel processing circuit that allows one cache to be flushed while the other receives subsequent pixel fragments is presented. The system includes a first fragment cache and a first set of state registers where the first set of state registers stores state variables for drawing operations corresponding to fragments stored in the first fragment cache. The system also includes a second fragment cache and a second set of state registers where the second set of state registers stores state variables for drawing operations corresponding to fragments stored in the second fragment cache. The system further includes a render backend block that is operably coupled to the first and second fragment caches and to a frame buffer that stores current pixel information for a plurality of pixels in a display frame.

Abstract: A method and apparatus for antialiasing in a video graphics system is accomplished by determining if a pixel sample set, which results from oversampling, can be reduced to a compressed sample set, where the compressed sample set contains information describing a corresponding pixel. When the pixel sample set can be reduced to a compressed sample set, the compressed sample set is stored in a frame buffer at a location corresponding to the particular pixel that the sample set describes. When the pixel sample set cannot be reduced to a compressed sample set, a pointer is stored at the frame buffer location corresponding to the particular pixel. The pointer points to a selected address in a sample memory at which the complete sample set for the pixel is stored.

Abstract: In an image processing system or method, an image element memorizing device memorizes image elements which are image data that are subjects of process. An image element processing state memorizing device memorizes present processing states of the image elements in the image element memorizing device. A detecting device detects, in response to the present processing states, a pointer of one of the image elements that is capable of being processed by the image processing system. A temporary pointer memorizing device memorizes the pointer from the detecting device. A calculating device reads the pointer from the temporary pointer memorizing device to process an image in response to the image element of the pointer which is read.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: A data controller for a display panel includes a first memory for storing video data, a second memory for storing next video data, a control unit for controlling the first memory and the second memory for one of storing and outputting the video data stored in at least one of the first and second memories, and a data converter for converting the video data outputted from the at least one of first and second memories to pulse stream data.

Abstract: An interface for a graphics system includes simple yet powerful constructs that are easy for an application programmer to use and learn. Features include a unique vertex representation allowing the graphics pipeline to retain vertex state information and to mix indexed and direct vertex values and attributes; a projection matrix value set command; a display list call object command; and an embedded frame buffer clear/set command.

Abstract: A processor for computer graphics calculations comprising an entire graphics engine in a single integrated circuit. The processor includes a transform mechanism adapted to compute transforms for the computer graphics calculations. The transform mechanism includes a transformation element adapted to compute transforms using a dot product operation. The transform mechanism of the processor also includes a perspective division element, a color unit for lighting calculations, a scaling element for multiplication operations, and a look-up table containing mathematical functions used by the computer graphics calculations. The processor also includes a raster unit coupled to the transform mechanism, a texture unit coupled to the raster unit, and a shader unit coupled to the texture unit.