Patents Examined by V. N. Trans
  • Patent number: 4959808
    Abstract: A first acceleration reference value is continuously determined by a nonlinear distance control. In parallel thereto, a second acceleration value is generated by a nonlinear velocity controller. A simple selection criterion that comprises only these two alternative acceleration values engages the second alternative acceleration reference value engagement for run up. The first alternative acceleration reference value initiates the destination braking. The second alternative reference value is used for approaching the destination position. The trip destination and the velocity of the positioning drive can be accommodate inching velocities.
    Type: Grant
    Filed: April 18, 1988
    Date of Patent: September 25, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ingemar Neuffer, Christian Keller
  • Patent number: 4958295
    Abstract: A liquid stream (13) and a detector (12) and a computer (11) which operate to observe properties in the composition of the fluid stream and compare detected data from observed samples with standards and in accordance with parameters established by calibration calculate the characteristics of the observed samples.An integral but segmented liquid stream (13) flows through the analysis system (10) to provide liquid segments of observed sample and reagent. A detector (12) scans data from the samples at the interface between these segments and information relating to the composition at the interface is analyzed by a mathematical model that permits comparison of the detected data from successively observed samples with standards and thus determines the characteristics of the samples. The segmented integral liquid stream (13) is fashioned by step pulsing of discrete segments of reagents and samples and transporting the discrete segments to a detector (12).
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: September 18, 1990
    Assignee: Hercules Incorporated
    Inventors: David L. Davidson, George B. Parrent, Jr., Roland W. Gubisch, Harold Hauer
  • Patent number: 4954960
    Abstract: A driver system for an ultrasonic probe using a tunable inductor in series with the piezoelectric crystal excitation transducer in the probe. The bias current through this flux moduation coil is controlled by the system such that the inductance of the tunable inductor cancels out the capacitive reactance of the load impedance presented by the probe when the probe is being driven by a driving signal which matches the mechanical resonance frequency of the probe. The resulting overall load impedance is substantially purely resistive. The system also adjusts the frequency of the driving signal to track changing mechanical resonance conditions for the probe at different power levels. This method of operation insures substantially maximum power transfer efficiency and substantially linear power control over a range of power dissipation levels.
    Type: Grant
    Filed: April 6, 1987
    Date of Patent: September 4, 1990
    Assignee: Alcon Laboratories
    Inventors: Ying-Ching Lo, Samuel Zambre, Tolentino Escorcio
  • Patent number: 4951240
    Abstract: In an electronic part mounting system a printed circuit board is conveyed by a conveyor belt to a predetermined position. The side edges of the printed circuit board are retained by retainers to correct any deformation of the printed circuit board. Consequently, one pair of positioning patterns disposed on the surface of the printed circuit board suffices for the mounting operation of components for the printed circuit board.
    Type: Grant
    Filed: June 5, 1989
    Date of Patent: August 21, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Masahiro Fukino
  • Patent number: 4951216
    Abstract: A re-size circuit extracts the bit data of a pattern to be drawn, at a specific address and its adjacent addresses of a pattern to be drawn, from a bit map memory storing LSI pattern data. For the Data at the adjacent addresses, either "0" or "1" re-size parameter data is set according to the contents of the re-size directions. The thickness of the pattern is altered by means of the logical operation of the data at the adjacent addresses and the re-size parameter data.
    Type: Grant
    Filed: February 26, 1988
    Date of Patent: August 21, 1990
    Assignee: Toshiba Machine Company, Ltd.
    Inventor: Masayuki Maluo
  • Patent number: 4951220
    Abstract: A method and apparatus for the production of a test-compatible, largely defect-tolerant configuration of redundantly implemented, systolic VLSI systems. The method and apparatus for the configuration of redundantly implemented, systolic VLSI systems meets the conditions of defect-tolerance, test-compatibility and minimum hardware requirement. For this purpose, every module of the multi-dimensional systolic VLSI system has control logic allocated to it which controls A, B and C switches for the appertaining module. It is possible with the use of these switches to bridge a maximum of up to two faulty modules per row and one faulty module per column. A configuration algorithm provides a determination as to whether the established VLSI system is in the position to be able to execute the desired arithmetic operations.
    Type: Grant
    Filed: August 26, 1988
    Date of Patent: August 21, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ulrich Ramacher, Joerg Beichter
  • Patent number: 4949275
    Abstract: A semiconductor integrated circuit device comprises a semiconductor chip with a plurality of standard cells formed thereon. Each of said standard cells consists of at least one type of standard cell which is selected from among a plural types of standard cells which are pre-registered in a standard cell library retained by a computer. The placement and routing pattern of said standard cells on said semiconductor chip are designed automatically by a computer system. In relation to at least one of said standard cells, at least one basic cell for general-purpose logical gate is formed on said semiconductor chip to deal with design modification of the device.
    Type: Grant
    Filed: July 8, 1985
    Date of Patent: August 14, 1990
    Assignee: Yamaha Corporation
    Inventor: Terumoto Nonaka
  • Patent number: 4943921
    Abstract: An electronic control system for scheduling gearshifts in a four speed automatic transmission includes storing in electronic memory accessible to a microprocessor, six functions relating vehicle speed to throttle position, one function being related to each upshift and downshift. Gearshifts are made by probing computer memory with current values for throttle position and vehicle speed, and determining on the basis of the stored shift schedule whether an upshift or downshift is required. Upshift points are determined also on the basis of the maximum engine speed when a wide open throttle condition is detected. Ambient barometric pressure alters the vehicle speed and engine speed attained at high altitude in comparison to those speeds that result for the same throttle position at sea level.
    Type: Grant
    Filed: October 24, 1988
    Date of Patent: July 24, 1990
    Assignee: Ford Motor Company
    Inventors: Paul A. Baltusis, Thomas L. Greene, Bruce J. Palansky
  • Patent number: 4942536
    Abstract: In a case where an electronic circuit having the same function is to be realized by a different device, it is indispensable to prepare circuit diagrams conforming to devices and to utilize them for the job of circuit simulation or chip layout. When the circuit diagrams are to be automatically translated for the above purpose, translation rules become different depending upon the connective relations of an element to be translated, with other elements in the circuit or upon a function performed by the element. The present invention puts the rules into knowledge from the viewpoint of knowledge engineering and utilizes it thereby to realize the intended purpose.
    Type: Grant
    Filed: April 21, 1986
    Date of Patent: July 17, 1990
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Toshinori Watanabe, Fumihiko Mori, Tamotsu Nishiyama, Makoto Furihata, Yasuo Kominami, Noboru Horie
  • Patent number: 4939681
    Abstract: A circuit simulation method and apparatus for simulating the operation of semiconductor devices, including field effect transistors (FETs), on the basis of the mask layout pattern of each semiconductor device. A circuit simulation method is performed by a computer which includes a first step of determining an equivalent circuit of the semiconductor device from the mask layout patterns, and a second step of producing a signal indicative of the operation of the equivalent circuit determined by the first step. The equivalent circuit is determined by extracting resistive area patterns of the FETs and calculating resistance values of FET signal paths to obtain FET equivalent resistances. The resistive area patterns are divided into a series of rectangles which are converted to equivalent resistive elements to then be arranged so that an equivalent resistive value can be calculated.
    Type: Grant
    Filed: April 28, 1988
    Date of Patent: July 3, 1990
    Assignee: Hitachi Ltd.
    Inventors: Goichi Yokomizo, Akio Yajima, Toshiyuki Morioka, Akihisa Maruyama, Hirofumi Johnishi
  • Patent number: 4937755
    Abstract: A production system for an expert system comprising: a production rule memory unit storing circuit conversion rules, each having a condition part describing circuit connection and an execution part describing a conversion of the condition part to an equivalent logic circuit dependent upon a predetermined semiconductor technology and further having a provisionally predetermined priority; a task data memory unit storing circuit connection data, each being subjected to an application of the circuit conversion rules; a production rule interpretation and execution unit for selecting a circuit conversion rule in accordance with the provisionally predetermined priority, collating the condition part of the selected circuit conversion rule with the circuit connection data to determine whether the condition part matches with a part of the circuit connection data and, when the both match each other, converting the part of the circuit connection data by the corresponding execution part of the circuit conversion rule to a
    Type: Grant
    Filed: April 28, 1988
    Date of Patent: June 26, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Takayoshi Yokota, Keisuke Bekki, Nobuhiro Hamada
  • Patent number: 4937756
    Abstract: The invention relates to a radiation-hardened (R-H) bulk CMOS process which is compatible with DRAM production and a specific gated isolation structure (GIS). The GIS structure consists of a novel oxide-silicon nitride-oxynitride gate insulator and a LPCVD polysilicon gate. A simple but automatically generating process for creating GIS directly from an original non-R-H device is also described. This generating process is fast and can revise any commercial products to a R-H version. The GIS is always shunted to Vss potential of the circuit chip to assure R-H capability. The grounded GIS structure replaces conventional LOCOS field oxide, which suffers from large threshold voltage shift when exposed to irradiation. Radiation resistance of this gated isolation structure (GIS) is suitable for application in radiation-immunity VLSI integrated circuits (.ltoreq.2um design rule).
    Type: Grant
    Filed: January 23, 1989
    Date of Patent: June 26, 1990
    Assignees: Industrial Technology Research Institute, Chung Shan Institute of Science and Technology
    Inventors: Je-Jung Hsu, Hsing-Hai Chen
  • Patent number: 4935872
    Abstract: A method of shift selection in an electronic automatic transmission wherein a controller is capable of selecting between various desired transmission gear changes or shift patterns to place the transmission in the appropriate gear based on a plurality of input conditions. The method includes comparing a mask with a byte in a table row and determining whether a matching row was found. The method also includes pointing to the next row if a matching row was found and determining whether the present operating gear equals the next byte. The method further includes selecting the next byte to perform a predetermined gear change or selecting another byte to perform another predetermined gear change based on the present operating gear equaling the next byte, and executing the gear change selected.
    Type: Grant
    Filed: April 29, 1988
    Date of Patent: June 19, 1990
    Assignee: Chrysler Corporation
    Inventors: Howard L. Benford, Maurice B. Leising, Hemang S. Mehta
  • Patent number: 4933861
    Abstract: Controlling ignition current in the ignition control system of an internal combustion engine includes determining the amount of time it takes current in the ignition coil to reach a desired or limit value and adjusting the time of starting ignition coil charging before spark firing to be substantially equal to the amount of time it takes ignition coil charging current to reach the desired or limit current value.
    Type: Grant
    Filed: October 3, 1988
    Date of Patent: June 12, 1990
    Assignee: Ford Motor Company
    Inventors: William R. Allen, Edward L. Korte, James T. Lee, Ira C. Miller, Jr., Kent A. Wikarski
  • Patent number: 4933860
    Abstract: A method of designing and fabricating a semiconductor integrated circuit for operation at radio frequencies. The method includes fabricating an integrated circuit having circuit components, at least one of which is an active device, testing the electrical performance of at least one of the active devices and then forming an electrical conductor to the integrated circuit to interconnect selected ones of the circuit components to form a radio frequency circuit, wherein the selection is based on the outcome of the electrical performance test.
    Type: Grant
    Filed: May 20, 1988
    Date of Patent: June 12, 1990
    Assignee: TRW Inc.
    Inventor: Louis C. Liu
  • Patent number: 4931946
    Abstract: Disclosed is a set of functional components (tiles), consisting in part of subgate elements, which, by their design, facilitate the creation of dense integrated circuits, without forfeiting the capability of modifying the functionality of individual tiles by late mask programming techniques. Overall densities approach those obtained with hand-crafted, custom designs can be obtained in part because such components are designed to be tiled throughout a storage logic array, permitting the creation of orthogonal logic gates as well as individual gates (and more complex functions) the functionality of which is distributed horizontally, vertically and even in a zigzag fashion. Moreover, the transition time from prototype to high volume manufacturing is reduced significantly due to the ease with which even complex functions can be repaired and enhanced.
    Type: Grant
    Filed: March 10, 1988
    Date of Patent: June 5, 1990
    Assignee: Cirrus Logic, Inc.
    Inventors: H. Ravindra, Suhas S. Patil, Ernest S. Lin, Mahmud M. Assar, Dayakar Reddy
  • Patent number: 4931959
    Abstract: An optical arrangement permutes elements of a multi-dimensional array by projecting an input element array onto an output via a plurality of optical paths. Each optical path provides a relative shift in its projection on the output plane whereby there is a prescribed permutation of elements.
    Type: Grant
    Filed: January 11, 1989
    Date of Patent: June 5, 1990
    Assignee: AT&T Bell Laboratories
    Inventors: Karl-Heinz Brenner, Alan Huang, Adolf W. Lohmann
  • Patent number: 4928235
    Abstract: A method of determining the fluid temperature of an automatic transmission wherein a controller is programmed to determine the transmission temperature based on ambient and/or engine coolant temperatures and on observed transmission and engine warm-up rates. The controller may also be programmed to determine the transmission temperature based on the response of the pressure sensors provided.
    Type: Grant
    Filed: April 29, 1988
    Date of Patent: May 22, 1990
    Assignee: Chrysler Corporation
    Inventors: Hemang S. Mehta, Gerald L. Holbrook, Maurice B. Leising
  • Patent number: 4926329
    Abstract: In an arrangement for the control of the power transmission of a four-wheel drive vehicle, a main driving axle is driven directly and an auxiliary driving axle is driven via a continuously controllable longitudinal clutch by an internal combustion engine via a clutch-transmission unit. From a desired performance and the speed of the vehicle, a desired traction force of all the wheels is determined. From this desired traction force, and by a distribution factor that is dependent on operating driving parameters, the control quantity is obtained for the control of the longitudinal clutch. In addition, the longitudinal clutch can be controlled alone or in combination with the control quantity by an additional control quantity obtained by squaring of a speed difference at the longitudinal clutch.
    Type: Grant
    Filed: March 10, 1987
    Date of Patent: May 15, 1990
    Assignee: Dr. Ing. H.c.F. Porsche AG
    Inventors: Norbert Stelter, Goetz Richter, Juergen Schneider
  • Patent number: 4926363
    Abstract: A modular test structure for performing testing on a single chip having a plurality of different functional blocks is provided which includes test interface logic circuitry (24) formed on each of the functional blocks (16-22) so that each block can be operated as a self-contained module. Test generation logic circuitry (40) is formed in a bus interface unit (12) and is used to select one or more of the functional blocks (16-22) for testing and for placing the selected functional blocks (16-22) in a test mode. The test interface logic circuitry (24) on the selected functional blocks under test sends data direction information to the bus interface unit (12) to indicate how individual bits of a data bus are to be used for inputs and outputs during testing.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: May 15, 1990
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Michael A. Nix