Abstract: Disclosed in embodiments of the present disclosure are an OLED packaging structure and packaging method, and a display apparatus. The purpose that the packaging structure does not influence the display performance of an OLED device, while ensuring a uniform cell gap between a display substrate and a packaging cover plate is achieved. The main technical solution of the present disclosure is: a packaging cover plate, wherein a sealant layer is arranged on the edge of a first surface of the packaging cover plate opposite to a display substrate in an annular configuration, a region encircled by the sealant layer is filled with a filling adhesive layer, a plurality of support blocks having preset flexibility are distributed in a region corresponding to the sealant layer, and the thickness of the support block is equal to a preset distance between the packaging cover plate and the display substrate.

Abstract: A method of making semiconductor packages includes providing a first lead frame having a first plurality of semiconductor dies arranged along a first longitudinal axis, each of the first plurality of semiconductor dies having a first number of metal contacts; providing a second lead frame having a second plurality of semiconductor dies arranged along a second longitudinal axis, each of the second plurality of semiconductor dies having a second number of metal contacts, the second number of metal contacts different than the first number of metal contacts; and covering the first plurality of semiconductor dies in a first mold using a common semiconductor die cavity; covering the second plurality of semiconductor dies in a second mold using the common semiconductor die cavity.

Abstract: A display substrate and a related device, and belongs to the field of display technology. The display substrate includes first subpixels, a second subpixels and third subpixels. In a first direction, the first subpixels and the third subpixels are arranged alternately to form a plurality of first subpixel rows, the second subpixels form a plurality of second subpixel rows, the first subpixel rows and the second subpixel rows are arranged alternately in a second direction, lines connecting centers of two first subpixels and two third subpixels in two adjacent rows and two adjacent columns form a first virtual quadrilateral, the two first subpixels are arranged at two opposite vertices of the first virtual quadrilateral, the first virtual quadrilateral includes an interior angle a not equal to 90°, and the second subpixel is arranged within the first virtual quadrilateral.

Abstract: A negative capacitance semiconductor device includes a substrate. A dielectric layer is disposed over a portion of the substrate. A ferroelectric structure is disposed over the dielectric layer. Within the ferroelectric structure: a material composition of the ferroelectric structure varies as a function of a height within the ferroelectric structure. A gate electrode is disposed over the ferroelectric structure.

Abstract: A display panel includes a base substrate and a plurality of sub-pixel groups. The plurality of sub-pixel groups includes a first sub-pixel group and a second sub-pixel group. The first sub-pixel group includes two adjacent sub-pixels with a first interval therebetween, and the second sub-pixel group includes two adjacent sub-pixels with a second interval therebetween. The first interval is different from the second interval.

Abstract: A substrate protrusion is described. The substrate protrusion includes a top portion that extends in a first direction toward a gap between the first die and the second die and in a second direction parallel to the gap between the first die and the second die. The substrate protrusion also includes a base portion that is coupled to a substrate that extends underneath the first die and the second die. An encapsulant is over the protrusion of the substrate, the encapsulant extending beneath the first die, and the encapsulant extending beneath the second die.

Abstract: A display substrate including a base substrate, a first thin film transistor disposed on the base substrate and including a first gate electrode and a first semiconductor active layer; a second thin film transistor electrically connected to the first thin film transistor, the second thin film transistor including a second gate electrode and a second semiconductor active layer; and an organic light emitting device electrically connected to the second thin film transistor. The first semiconductor active layer includes a first material and the second semiconductor active layer includes a second material different from the first material.

Abstract: A method of encapsulating an organic light emitting diode (OLED) is provided. The method includes generating a first plasma in a process chamber, the first plasma having an electron density of at least 1011 cm?3 when an OLED device is positioned within the process chamber. The OLED device includes a substrate and an OLED formed on the substrate. The method further includes pretreating one or more surfaces of the OLED and substrate with the first plasma; depositing a first barrier layer comprising silicon and nitrogen over the OLED by generating a second plasma comprising silicon and nitrogen in the process chamber, the second plasma having an electron density of at least 1011 cm?3, and depositing a buffer layer over the first barrier layer; and depositing a second barrier layer comprising silicon and nitrogen over the buffer layer by generating a third plasma comprising silicon and nitrogen in the process chamber.

Abstract: A display apparatus includes a substrate including a main display area, a component area, and a peripheral area. The component area includes a transmission area, and the peripheral area is arranged outside the main display area. The display apparatus further includes a main thin-film transistor arranged in the main display area, a main organic light-emitting diode arranged in the main display area and connected to the main thin-film transistor, an auxiliary thin-film transistor arranged in the component area, an auxiliary organic light-emitting diode arranged in the component area and connected to the auxiliary thin-film transistor, and a lower metal layer arranged between the substrate and the auxiliary thin-film transistor in the component area and having an undercut structure.

Abstract: A method for fabricating a semiconductor device includes: forming a trench in a first major surface of a semiconductor body having a first conductivity type; forming a gate in the trench; forming a body region of a second conductivity type in the semiconductor body; implanting a second dopant species into a first region of the body region and a first dopant species into a second region of the body region, the first dopant species providing the first conductivity type, the second dopant species being different from the first dopant species and reducing the diffusion of the first dopant species in the semiconductor body; and thermally annealing the semiconductor body to form a source region that includes the first and second dopant species, and to produce a pn-junction between the source and body regions at a depth dpn from the first major surface, wherein 50 nm<dpn<300 nm.

Abstract: Provided are an array substrate and a manufacturing method therefor, a display device, and a mask plate. The array substrate includes a pixel defining layer having a first opening, a second opening, and a third opening passing through the pixel defining layer. Every two of the first to third openings are adjacent to each other. The pixel defining layer includes first to third opening denning portions. At least one of the ratio of the slope angle of a portion of the first opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion, and the ratio of the slope angle of a portion of the second opening defining portion located between the first opening and the second opening to the slope angle of the third opening defining portion is from 0.8 to 1.25.

Abstract: A display panel, comprising a first display portion and at least one curved second display portion disposed on at least one side of the first display portion. The display panel further comprises: an array substrate; and a planarization layer, an anode layer, a pixel definition layer, a light-emitting layer, a cathode layer and an encapsulation layer sequentially disposed on the array substrate. The planarization layer comprises a plurality of first surfaces and a plurality of second surfaces, each of the plurality of second surfaces comprises a first end arranged close to the first display portion and a second end arranged away from of the first display portion, a vertical distance between the first end and a bottom of the planarization layer is less than a vertical distance between the second end and the bottom of the planarization layer.

Abstract: A light-emitting display device includes unit pixels each of which includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The first sub-pixel includes a red organic light-emitting layer to emit red light. The second sub-pixel includes a green organic light-emitting layer to emit green light. The third sub-pixel includes a blue organic light-emitting layer to emit blue light. A surface level difference of the second sub-pixel is greater than a surface level difference of the first sub-pixel and smaller than a surface level difference of the third sub-pixel.

Abstract: The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.

Abstract: A method includes forming bottom conductive lines over a wafer. A first magnetic tunnel junction (MTJ) stack is formed over the bottom conductive lines. Middle conductive lines are formed over the first MTJ stack. A second MTJ stack is formed over the middle conductive lines. Top conductive lines are formed over the second MTJ stack.

Abstract: Provided are a mask frame assembly in which deformation of a frame may be reduced, and a method of manufacturing an organic light-emitting display apparatus using the mask frame assembly. The mask frame assembly includes a frame of a rectangular shape, the frame including an opening and a lower surface including first grooves extending in a first direction, a plurality of first auxiliary sticks extending in the first direction across the opening, wherein a first end and a second end of each of the first auxiliary sticks are bonded to an upper surface of the frame, a mask on the plurality of first auxiliary sticks, and a plurality of second auxiliary sticks arranged in the first grooves, wherein one end and an opposite end of each of the plurality of second auxiliary sticks are bonded to a bottom surface in each of the first grooves.

Abstract: Provided is a mask assembly including a mask frame including an opening; and a mask arranged on the mask frame and including a deposition region and a non-opening region arranged around the deposition region, the deposition region facing the opening to transmit a deposition material. A width of the non-opening region in a lengthwise direction of the mask is about 200 ?m to about 500 ?m.

Abstract: A semiconductor device according to an example embodiment includes a substrate extending in first and second directions intersecting with each other; nanowires on the substrate and spaced apart from each other in the second direction; gate electrodes extending in the first direction and spaced apart from each other in the second direction, and surrounding the nanowires to be superimposed vertically with the nanowires; external spacers on the substrate and covering sidewalls of the gate electrodes on the nanowires; and an isolation layer between the gate electrodes and extending in the first direction, wherein an upper surface of the isolation layer is flush with upper surfaces of the gate electrodes.

Abstract: A manufacturing method of a display device includes: forming a transistor on a substrate; forming an organic insulating layer on the transistor; and performing a plasma treatment on the organic insulating layer. The organic insulating layer includes an acryl-based polymer, and the plasma treatment is performed by using helium gas or argon gas.

Abstract: A substrate and a preparation method thereof, a display panel and a preparation method thereof, and a display device are provided. The substrate includes a display region and a peripheral region positioned in a periphery of the display region and used for sealing, the substrate includes: a base substrate; an insulating layer, arranged on a side of the base substrate and positioned in the display region and the peripheral region for sealing; and a plurality of pixel units, positioned on the insulating layer corresponding to the display region, and in the peripheral region, at least one groove is disposed on a side of the insulating layer which faces away from the base substrate, a side of the groove which is away from the base substrate is open, and a depth direction of the groove is perpendicular to the base substrate.