Abstract: An organic EL device is constructed with a structure that can prevent deterioration in characteristics. An organic EL device is provided that includes at least two or more subpixels each including an organic compound layer including at least a light-emitting layer that emits light of a different color from the other light-emitting layer(s), the organic compound layer being interposed between a first electrode and a second electrode in a stacking manner, the subpixels being disposed separately from one another on a plane perpendicular to a direction of the stacking. Lateral surfaces of the organic compound layers are covered with films differing from subpixel to subpixel. This structure can prevent the organic EL device from deterioration in characteristics.
Type:
Grant
Filed:
June 14, 2019
Date of Patent:
June 13, 2023
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Abstract: A PIN photodetector includes an n-type semiconductor layer, an n-type semiconductor cap layer, a first plurality of p-type regions located within the n-type semiconductor cap layer and separated from one another by a distance d1, and an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer including the first plurality of p-type regions. The plurality of p-type regions are electrically connected to one another to provide an electrical response to light incident to the PIN photodetector.
Type:
Grant
Filed:
November 2, 2020
Date of Patent:
June 13, 2023
Assignee:
Attollo Engineering, LLC
Inventors:
Jonathan Geske, Andrew Hood, Michael MacDougal
Abstract: A display apparatus includes an organic light-emitting device (“OLED”) substrate which generates and emits a first light, and an encapsulation layer to which the emitted first light from the OLED substrate is incident and from which a second light is emitted. The encapsulation layer includes an inorganic material layer and an organic material layer alternately stacked with each other. The organic material layer includes a plurality of color control elements which color-convert the emitted first light incident to the encapsulation layer. The plurality of color control elements may include a first and second color control element including a first and second quantum dot with which a color of the emitted first light incident to the encapsulation layer is converted to a first and second color, respectively.
Type:
Grant
Filed:
January 19, 2022
Date of Patent:
June 6, 2023
Assignee:
SAMSUNG ELECTRONICS CO., LTD.
Inventors:
Sunghun Lee, Byoungki Choi, Seungyeon Kwak, Jiwhan Kim
Abstract: A self-luminous display panel including a first substrate, an insulating resin layer, self-luminous elements, a sealing layer, an attachment layer, and a second substrate, and the insulating resin layer includes an inner insulating sublayer and an outer insulating sublayer with a groove therebetween, the groove being provided in a peripheral region and surrounding an image display region, the attachment layer includes a peripheral sealing layer that is positioned inside a peripheral portion of the second substrate and a joining layer that is positioned in a range surrounded by the peripheral sealing layer, and when viewed in a cross section perpendicular to a main surface of the first substrate and across the groove, the peripheral sealing layer is at least partially positioned on the outer insulating sublayer, and an inner end portion of the peripheral sealing layer extends to the groove.
Abstract: An organic light-emitting diode (OLED) display panel and a method for manufacturing the same are provided. The OLED display panel at least includes a thin film transistor (TFT) array substrate, a passivation layer, a planarization layer, and planarization-compensating layer. The planarization layer has a first planarization part corresponding to a light-emitting area, and a second planarization part corresponding to a defining area and a part of the light-emitting area. Height of a surface of the planarization-compensating layer from the surface of the TFT array substrate and height of a surface of the second planarization part from the surface of the TFT array substrate are level.
Type:
Grant
Filed:
October 30, 2020
Date of Patent:
May 30, 2023
Assignee:
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Abstract: A film forming mask includes a plurality of first openings that are formed on the film-forming mask to form a thin film pattern on a substrate. A second opening includes a plurality of second openings that corresponds and is aligned along a side of at least one of the plurality of first openings. An opening area of the second opening is smaller than an opening area of each of the plurality of first openings.
Abstract: An electronic device may include a substrate, and the substrate may include one or more layers. The one or more layers may include a first dielectric material and one or more electrical traces. A cavity may be defined in the substrate, and the cavity may be adapted to receive one or more electrical components. One or more lateral traces may extend through a wall of the cavity. The lateral traces may provide electrical communication pathways between the substrate and the electrical components.
Abstract: A method of manufacturing a display apparatus includes placing a display substrate on a susceptor in a chamber, maintaining the susceptor at a first temperature, dividing the display substrate into a plurality of partial substrates, and maintaining the susceptor at a second temperature.
Abstract: Display device includes a flexible substrate, a plurality of pixels disposed on a first surface of flexible substrate, and a plurality of alignment marks disposed along one side of the flexible substrate and identified each other. The plurality of alignment marks may be arranged in the same layer. When the plurality of pixels includes thin film transistor, the plurality of alignment marks may be formed of the same metal layer as the metal layer forming thin film transistor.
Type:
Grant
Filed:
March 16, 2022
Date of Patent:
May 2, 2023
Assignee:
Japan Display Inc.
Inventors:
Hayata Aoki, Kengo Kato, Jun Hanari, Yasuyuki Yamada
Abstract: A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.
Abstract: A pixel structure includes a plurality of first sub-pixels arranged in a first direction and a second direction. A maximum dimension of at least one first sub-pixel in a first direction is less than a first set value, and a maximum dimension of the at least one first sub-pixel in a second direction is greater than a second set value. The first set value is a maximum dimension of a set sub-pixel in the first direction, and the second set value is a maximum dimension of the set sub-pixel in the second direction. The first sub-pixel has an area equal to an area of the set sub-pixel.
Abstract: A system and method comprising the steps of: depositing a first electrode metal on an insulating substrate or layer; creating a trench component, in which said trench component comprises a section of said first electrode metal or both first electrode metal and insulating substrate or layer with a depth based on at least one of, a molecular device element, a trenched bottom electrode, and a liftoff molecular device (TBELMD) to be produced; insulating said first electrode metal from a predetermined material deposited in said trench component; and depositing a second electrode metal on said predetermined material deposited in said trench component.
Abstract: A display device, which includes a display region in which a plurality of pixels are arranged, includes a first organic insulating film, a first groove, which exists in a frame shape surrounding the display region to separate the first organic insulating film, a first inorganic partition portion, which is arranged in the first groove, and is made of an inorganic insulating material that exists in a frame shape surrounding the display region, a second organic insulating film formed above the first organic insulating film and the first inorganic partition portion, and a second groove, which exists in a frame shape surrounding the display region to separate the second organic insulating film, and is located inside the first groove in plan view.
Abstract: A display panel and a method for manufacturing the display panel are provided. The display panel includes a plurality of pixel units, wherein each of the pixel units includes first sub-pixels, second sub-pixels, third sub-pixels, first pixel definition layers, and a second pixel definition layer. Each of the pixel units is enclosed by one of the first pixel definition layers into a rectangle; and the second pixel definition layer is disposed in each of the first pixel definition layers and between the first sub-pixels, the second sub-pixels, and the third sub-pixels.
Type:
Grant
Filed:
July 14, 2020
Date of Patent:
March 21, 2023
Assignee:
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR
DISPLAY TECHNOLOGY CO., LTD.
Abstract: A display device includes: a base layer including a display area (DA) and a non-DA; a circuit element layer on the base layer and including: a power supply electrode (PSE) overlapping the non-DA, circuit elements, and a shielding electrode connected to the PSE and overlapping some of the circuit elements; a display element layer on the circuit element layer and including: a light emitting element including a first electrode, a light emitting unit, and a second electrode, and a connection electrode connecting the second electrode to the PSE and including first through-holes; a thin film encapsulation layer (TFEL) on the display element layer and including an organic layer overlapping the DA; and an input sensing layer on the TFEL and including sensing electrodes and sensing signal lines connected to the sensing electrodes. The sensing signal lines overlap the connection electrode. Some of the first through-holes overlap the shielding electrode.
Type:
Grant
Filed:
December 28, 2020
Date of Patent:
March 14, 2023
Assignee:
Samsung Display Co., Ltd.
Inventors:
Ki Ho Bang, Seong Ryong Lee, Sang Hyun Jun
Abstract: A packaged integrated circuit includes a core structure with a cavity therein; a component accommodated in the cavity; an electrically insulating structure formed over the core structure and the component; a partially electrically insulating carrier structure formed below the core structure and the component; and an electrically conducting redistribution arrangement formed at least partially within the carrier structure. The redistribution arrangement includes conductor structures each having a first element extending through the carrier structure and electrically connecting a contact of the component and a second element below the carrier structure. A part of the second element is a contact pad for electrically connecting the redistribution arrangement with external circuitry. The carrier structure includes a polyimide layer and an adhesive layer.
Type:
Grant
Filed:
March 21, 2019
Date of Patent:
March 14, 2023
Assignee:
AT&SAustria Technologie & Systemtechnik AG
Inventors:
Mikael Tuominen, Christian Vockenberger
Abstract: A display apparatus including a flexible substrate, the flexible substrate including a first area where an image is displayed, a second area separated from the first area, and a bending area between the first area and the second area; a display on the first area of the substrate; a pad on the second area of the substrate; and a plurality of wirings on the substrate, the plurality of wirings including a first wiring having a first shape; and a second wiring having a second shape that is different from the first shape, the first wiring and the second wiring passing through the bending area.
Abstract: A method of forming vias and skip vias is provided. The method includes forming a blocking layer on an underlying layer, and forming an overlying layer on the blocking layer. The method further includes opening a hole in the overlying layer that overlaps the blocking layer, and etching past the blocking layer into the underlying layer to form a second hole that is smaller than the hole in the overlying layer.
Type:
Grant
Filed:
September 16, 2019
Date of Patent:
March 7, 2023
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Abstract: The present application provides a display substrate, the display substrate including a plurality of sub-pixel units, the plurality of sub-pixel units arranged in a plurality of rows and columns, wherein the plurality of columns of the sub-pixel units include alternatingly disposed solid color sub-pixel unit columns and mixed color sub-pixel unit columns, the solid color sub-pixel unit columns including a plurality of sub-pixel units corresponding to the same color, and in the mixed color sub-pixel unit columns, adjacent two sub-pixel units correspond to different colors. In the same row of sub-pixel units, the sub-pixel units on both sides of the sub-pixel unit in the solid color sub-pixel unit column have different colors. The utility model also provides a display device. The display device does not appear jagged or blurred when displaying an image.
Type:
Grant
Filed:
November 1, 2019
Date of Patent:
February 28, 2023
Assignees:
Beijing BOE Technology Development Co., Ltd., BOE Technology Group Co., Ltd.
Abstract: A display substrate includes a base, a plurality of light-emitting devices disposed on the base, an encapsulation layer disposed on a light-emitting side of the plurality of light-emitting devices away from the base, and at least one photosensitive sensor disposed on a surface of the encapsulation layer away from the base. Each of the at least one photosensitive sensor is configured to collect optical signals for texture recognition.