Abstract: Embodiments include semiconductor packages and a method of forming the semiconductor packages. A semiconductor package includes a mold over and around a first die and a first via. The semiconductor package has a conductive pad of a first redistribution layer disposed on a top surface of the first die and/or a top surface of the mold. The semiconductor package includes a second die having a solder ball coupled to a die pad on a bottom surface of the second die, where the solder ball of the second die is coupled to the first redistribution layer. The first redistribution layer couples the second die to the first die, where the second die has a first edge and a second edge, and where the first edge is positioned within a footprint of the first die and the second edge is positioned outside the footprint of the first die.

Abstract: The present disclosure provides a display backplane, a manufacturing method thereof and a display device. The display backplane includes: a substrate defining a transparent display area and a normal display area; a first insulating layer disposed on a side of the substrate and having a plurality of openings; an emitting layer disposed in the openings; and a first electrode disposed on a remote side of the emitting layer from the substrate and including a first sub-layer and a second sub-layer which are stacked, wherein an orthographic projection of the emitting layer on the substrate is within an orthographic projection of the second sub-layer on the substrate, and the sub-layer is patterned in the transparent display area.

Abstract: The present disclosure relates to an organic light-emitting display substrate and a display device. The organic light-emitting display substrate includes a plurality of rows of sub-pixels, each of which includes first sub-pixels, second sub-pixels and third sub-pixels repeatedly arranged, and two adjacent rows of sub-pixels are arranged in a staggered manner, in every two adjacent rows of sub-pixels: a first sub-pixel in one row of sub-pixels and a second sub-pixel and a third sub-pixel that are adjacent to the first sub-pixel in the other row of sub-pixels, form a pixel unit, and white light brightness centers of the pixel units in a same row are located on a same straight line.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a pair of source/drain features formed in a semiconductor substrate and a gate stack formed over a portion of the semiconductor substrate that is between the pair of source/drain features. The semiconductor device structure also includes gate spacers extend along opposing sidewalls of the gate stack and protrude above an upper surface of the gate stack. Additionally, the semiconductor device structure includes a first capping layer formed over the gate stack and spaced apart from the upper surface of the gate stack by a gap. Opposing sidewalls of the first capping layer are covered by portions of the gate spacers that protrude above the upper surface of the gate stack.

Abstract: Embodiments of the disclosed subject matter provide a full-color pixel arrangement for a full-color display is provided, the arrangement having a plurality of pixels, with each pixel including a first sub-pixel comprising a Group III-V inorganic emissive thin film configured to emit light of a first color, where there is at least one first sub-pixel per pixel of the full-color pixel arrangement. Each pixel may include an organic second sub-pixel and an organic third sub-pixel that are configured to emit light of a different color than the first color.

Abstract: An embodiment provides a manufacturing method of a polycrystalline silicon layer, including: forming a first amorphous silicon layer on a substrate; doping an N-type impurity into the first amorphous silicon layer; forming a second amorphous silicon layer on the n-doped first amorphous silicon layer; doping a P-type impurity into the second amorphous silicon layer; and crystalizing the n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer by irradiating a laser beam onto n-doped first amorphous silicon layer and the p-doped second amorphous silicon layer to form a polycrystalline silicon layer.

Abstract: Embodiments may relate to a method of forming a microelectronic package with an integrated heat spreader (IHS). The method may include placing a solder thermal interface material (STIM) layer on a face of a die that is coupled with a package substrate; coupling the IHS with the STIM layer and the package substrate such that the STIM is between the IHS and the die; performing formic acid fluxing of the IHS, STIM layer, and die; and dispensing, subsequent to the formic acid fluxing, sealant on the package substrate around a periphery of the IHS.

Abstract: An organic light emitting display device is discussed, which includes an anode on a substrate, a first hole transfer layer on the anode, a first emission layer on the first hole transfer layer, a first electron transfer layer on the first emission layer, an N-type charge generation layer on the first electron transfer layer, a second hole transfer layer on the N-type charge generation layer, a first emission control layer on the second hole transfer layer, an absolute value of a highest occupied molecular orbital (HOMO) energy level of the first emission control layer being greater than an absolute value of a HOMO energy level of the second hole transfer layer, a second emission layer on the first emission control layer, a second electron transfer layer on the second emission layer and a cathode on the second electron transfer layer.

Abstract: An integrated circuit includes first and second active regions, first and second standard cells on the first active region and the second active region, and a filler cell between the first and second standard cells and including first and second insulating isolations. The filler cell has a one-pitch dimension. The first and second insulating isolations are spaced the one-pitch dimension apart from each other. The first insulating isolation of the filler cell is disposed at a first boundary between the first standard cell and the filler cell. The second insulating isolation of the filler cell is disposed at a second boundary between the second standard cell and the filler cell. The first and second insulating isolations separate at least a part of the first active region, and at least a part of the second active region.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes forming a first isolation structure on a first surface of a substrate. A second isolation structure is formed into the first surface of the substrate. Sidewalls of the first isolation structure are disposed laterally between inner sidewalls of the second isolation structure. A bond pad is formed in the substrate such that the second isolation structure continuously laterally wraps around the bond pad.

Abstract: Provided is a mask having a plurality of cell areas, each of which has a plurality of through-portions defined therein. The mask includes a mask film including a polymer and a conductive layer disposed on at least one surface of the mask film and including conductive metal or a conductive metal oxide. Accordingly, precision of a deposition process is enhanced while reducing process time and costs in a manufacturing process of the mask, and thus the yield in manufacturing a display panel using the mask is improved. Therefore, the display panel manufactured using the mask may have improved reliability.

Abstract: A display panel includes an upper display substrate including a first pixel area, a second pixel area, a third pixel area, and a light blocking area surrounding the first, second, and third pixel areas and a lower display substrate including a light emitting element. The upper display substrate includes a base substrate, a first bank overlapping the light blocking area and disposed on the base substrate, a second bank overlapping the light blocking area and disposed on the base substrate, a bridge bank disposed on the base substrate between the first bank and the second bank, and an organic material pattern at least a portion of which is disposed on the bridge bank forming a column spacer. The display panel has improved reliability.

Abstract: A semiconductor device includes a chip package comprising a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die having an active surface, a back surface opposite to the active surface, and a thermal enhancement pattern on the back surface; and a heat dissipation structure connected to the chip package, the heat dissipation structure comprising a heat spreader having a flow channel for a cooling liquid, and the cooling liquid in the flow channel being in contact with the thermal enhancement pattern.

Abstract: A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.

Abstract: A method includes following steps. A silicon germanium layer is formed on a substrate. A surface layer of the silicon germanium layer is oxidized to form an interfacial layer comprising silicon oxide and germanium oxide. The interfacial layer is nitridated. A metal gate structure is formed over the nitridated interfacial layer.

Abstract: A display device includes a display panel, a support film, and a polymer layer. The display panel includes a display area comprising a first area that is bendable, and a non-display area adjacent to the display area. The support film is coupled to a bottom surface of the display panel. The support film includes a first groove overlapping with the first area. The polymer layer is disposed in the first groove. The polymer layer includes a material with higher flexibility than the support film. Angles formed by the top surface of the support film and inner sides of the support film defining the first groove are acute angles.

Abstract: A semiconductor device includes a first case part, a second case part coupled to the first case part to provide a case, a semiconductor module disposed within the case closer to the second case part than to the first case part, and a plate interposed between the first case part and the semiconductor module. The plate is a thermal conductor, that is a material having thermal conductivity, to transfer heat generated by the semiconductor module to the case where the heat can dissipate to the outside of the semiconductor device.

Abstract: A semiconductor device including a substrate; first to third active patterns on an upper portion of the substrate, the active patterns being sequentially arranged in a first direction and extending in a second direction crossing the first direction; first to third power rails respectively connected to the first to third active patterns, wherein a width of the second active pattern in the first direction is at least two times a width of the first active pattern in the first direction and is at least two times a width of the third active pattern in the first direction, the first active pattern is not vertically overlapped with the first power rail, the second active pattern is vertically overlapped with the second power rail, and the third active pattern is not vertically overlapped with the third power rail.

Abstract: A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.

Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.