Patents Examined by Viet Q. Nguyen
  • Patent number: 11532096
    Abstract: A device may receive a first image. The device may process the first image to identify an object in the first image and a location of the object within the first image. The device may extract a second image from the first image based on the location of the object within the first image. The device may process the second image to determine at least one of a coarse-grained viewpoint estimate or a fine-grained viewpoint estimate associated with the object. The device may determine an object viewpoint associated with the second vehicle based on the at least one of the coarse-grained viewpoint estimate or the fine-grained viewpoint estimate. The device may perform one or more actions based on the object viewpoint.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: December 20, 2022
    Assignee: Verizon Connect Development Limited
    Inventors: Simone Magistri, Francesco Sambo, Douglas Coimbra de Andrade, Fabio Schoen, Matteo Simoncini, Luca Bravi, Stefano Caprasecca, Luca Kubin, Leonardo Taccari
  • Patent number: 11532783
    Abstract: A magnetic recording array according to the present embodiment includes a plurality of spin elements, a first reference cell, and a second reference cell, wherein the plurality of spin elements, the first reference cell, and the second reference cell each have a wiring and a stacked body including a first ferromagnetic layer stacked on the wiring, wherein the electrical resistance of the wiring of the first reference cell is higher than the electrical resistance of the wiring of each spin element, and wherein the electrical resistance of the wiring of the second reference cell is lower than the electrical resistance of the wiring of each spin element.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: December 20, 2022
    Assignee: TDK CORPORATION
    Inventor: Tomoyuki Sasaki
  • Patent number: 11527053
    Abstract: An image processing method and an image processing apparatus are provided. The image processing method includes acquiring information of a first region of interest (ROI) in a first frame, estimating information of a second ROI in a second frame that is received after the first frame, based on the acquired information of the first ROI, and sequentially storing, in a memory, subframes that are a portion of the second frame, each of the subframes being a line of the second frame. The image processing method further includes determining whether a portion of the stored subframes includes the second ROI, based on the estimated information of the second ROI, and based on the portion of the stored subframes being determined to include the second ROI, processing the portion of the stored subframes.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: December 13, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jingu Heo, Byong Min Kang
  • Patent number: 11521668
    Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: December 6, 2022
    Assignee: Kepler Computing Inc.
    Inventors: Rajeev Kumar Dokania, Amrita Mathuriya, Sasikanth Manipatruni
  • Patent number: 11521979
    Abstract: Methods, systems, and devices for power gating in a memory device are described for using one or more memory cells as drivers for load circuits of a memory device. A group of memory cells of the memory device may represent memory cells that include a switching component and that omit a memory storage element. These memory cells may be coupled with respective plate lines that may be coupled with a voltage source having a first supply voltage. Each memory cell of the group may also be coupled with a respective digit line that may be coupled with the load circuits. Respective switching components of the group of memory cells may therefore act as drivers to apply the first supply voltage to one or more load circuits by coupling a digit line with a plate line having the first supply voltage.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: December 6, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Makoto Kitagawa
  • Patent number: 11521386
    Abstract: Systems, methods, and non-transitory computer-readable media can collect a set of training videos as training data, wherein the set of training videos are labeled with one or more labels based on one or more video quality metrics associated with an evaluation objective. A machine learning model is trained based on the training data. A video to be evaluated is received. The video is assigned to a first video quality category of a plurality of video quality categories based on the machine learning model.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: December 6, 2022
    Assignee: Meta Platforms, Inc.
    Inventors: Wook Jin Chung, Ziheng Wang, Allen Yang Liu, Joyce Marie Hodel
  • Patent number: 11521312
    Abstract: An image processing apparatus performs an inspection on an assembly component with use of one or more images of an assembling work, and includes a work determination unit configured to determine, from the one or more images, one or both of a start frame and an end frame of assembling work captured at a change point of the assembling work, a selection unit configured to select frames to be inspected from the one or more images based on a result of the determination by the work determination unit, and an inspection unit configured to perform an inspection on the frames selected by the selection unit.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: December 6, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yumiko Uchida
  • Patent number: 11514663
    Abstract: Provided are a reception apparatus, a reception system, a reception method, and a storage medium that can naturally provide a personal conversation in accordance with a user without requiring the user to register the personal information thereof in advance. A disclosure includes a face information acquisition unit that acquires face information of a user; a face matching unit that matches, against face information of one user, the face information registered in a user information database in which user information including the face information of the user and the reception information is registered; and a user information management unit that, when a result of matching of the face information performed by the face matching unit is unmatched, registers the user information of the one user to the user information database.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: November 29, 2022
    Assignee: NEC CORPORATION
    Inventors: Nobuaki Kawase, Makoto Igarashi
  • Patent number: 11514982
    Abstract: A ferroelectric computation unit includes a first ferroelectric switching device that includes a first ferroelectric material portion and generates a digital output signal, and a second ferroelectric switching device that includes a second ferroelectric material portion and generates an analog output signal. An output node of one of the first ferroelectric switching device and the second ferroelectric switching device is electrically connected to a gate electrode of another of the first ferroelectric switching device and the second ferroelectric switching device to provide hybrid response characteristics of stochastic digital switching and analog switching.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: November 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Katherine H. Chiang, Chung-Te Lin
  • Patent number: 11514953
    Abstract: Some embodiments include an integrated assembly having a pair of adjacent memory-block-regions, and having a separator structure between the adjacent memory-block-regions. The memory-block-regions include a first stack of alternating conductive levels and first insulative levels. The separator structure includes a second stack of alternating second and third insulative levels. The second insulative levels are substantially horizontally aligned with the conductive levels, and the third insulative levels are substantially horizontally aligned with the first insulative levels. Some embodiments include methods of forming integrated assemblies.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 29, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Yoshiaki Fukuzumi, Paolo Tessariol, David H. Wells, Lars P. Heineck, Richard J. Hill, Lifang Xu, Indra V. Chary, Emilio Camerlenghi
  • Patent number: 11514319
    Abstract: According to one aspect, action prediction may be implemented via a spatio-temporal feature pyramid graph convolutional network (ST-FP-GCN) including a first pyramid layer, a second pyramid layer, a third pyramid layer, etc. The first pyramid layer may include a first graph convolution network (GCN), a fusion gate, and a first long-short-term-memory (LSTM) gate. The second pyramid layer may include a first convolution operator, a first summation operator, a first mask pool operator, a second GCN, a first upsampling operator, and a second LSTM gate. An output summation operator may sum a first LSTM output and a second LSTM output to generate an output indicative of an action prediction for an inputted image sequence and an inputted pose sequence.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: November 29, 2022
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Athmanarayanan Lakshmi Narayanan, Behzad Dariush, Behnoosh Parsa
  • Patent number: 11504085
    Abstract: A method for calibrating defective channels of a CT device involves in a step S10, acquiring original data collected by the CT device; in a step S20, capturing to-be-recovered areas from the original data, wherein the to-be-recovered areas contain the defective channels of the CT device; in a step S30, inputting data of the to-be-recovered areas to a neural network for training so as to generate training results; and in a step S40, using the training results to repair the to-be-recovered areas. The method eliminates effects of artifacts caused by defective channels on image reconstruction.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: November 22, 2022
    Assignee: MINFOUND MEDICAL SYSTEM CO., LTD.
    Inventors: Aziz Ikhlef, Zheng Chu, Yaofa Wang
  • Patent number: 11507310
    Abstract: A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: November 22, 2022
    Assignee: SK hynix Inc.
    Inventors: Hyun Sub Kim, Ie Ryung Park, Dong Sop Lee, Sung Yeob Cho
  • Patent number: 11508122
    Abstract: Disclosed are techniques for estimating a 3D bounding box (3DBB) from a 2D bounding box (2DBB). Conventional techniques to estimate 3DBB from 2DBB rely upon classifying target vehicles within the 2DBB. When the target vehicle is misclassified, the projected bounding box from the estimated 3DBB is inaccurate. To address such issues, it is proposed to estimate the 3DBB without relying upon classifying the target vehicle.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: November 22, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Young-Ki Baik, Hyun-Mook Cho, Duck Hoon Kim, Jeong-Kyun Lee, ChaeSeong Lim, Hee-Seok Lee
  • Patent number: 11502103
    Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gates with FE capacitors integrated therein. An example memory cell includes a transistor having a semiconductor channel material, a gate dielectric over the semiconductor material, a first conductor material over the gate dielectric, a FE material over the first conductor material, and a second conductor material over the FE material. The first and second conductor materials form, respectively, first and second capacitor electrodes of a capacitor, where the first and second capacitor electrodes are separated by the FE material (hence, a “FE capacitor”). Separating a FE material from a semiconductor channel material of a transistor with a layer of a gate dielectric and a layer of a first conductor material eliminates the FE-semiconductor interface that may cause endurance issues in some other FE memory cells.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Daniel H. Morris, Seiyon Kim, Uygar E. Avci, Ian A. Young
  • Patent number: 11501808
    Abstract: A memory controller may include: a request checker identifying memory devices corresponding to requests received from a host among the plurality of memory devices and generating device information on the identified memory devices to perform operations corresponding to the requests; a dummy manager outputting a request for controlling a dummy pulse to be applied to channels of selected memory devices according to the device information among the plurality of channels; and a dummy pulse generator sequentially applying the dummy pulse to the channels coupled to the selected memory devices, based on the request for controlling the dummy pulse. A memory controller may include an idle time monitor outputting an idle time interval of the memory device and a clock signal generator generating a clock signal based on the idle time interval and outputting the clock signal to the memory device through the channel to perform a current operation.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: November 15, 2022
    Assignee: SK hynix Inc.
    Inventors: Hyun Sub Kim, Ie Ryung Park, Dong Sop Lee, Sung Yeob Cho
  • Patent number: 11501822
    Abstract: A non-volatile memory device and a control method are provided e disclosed. The non-volatile memory device includes a memory array, a bit line, a plurality of word lines, a first control circuit, and second control circuit. The bit line is connected to a first memory string of the memory array. The plurality of word lines are connected to memory cells of the first memory string and each word line is connected to a respective memory cell. The first control circuit is configured to apply a bit line pre-pulse signal to the bit line during a pre-charge period. The second control circuit is configured to apply a word line signal to a selected word line and apply a plurality of word line pre-pulse signals to word lines disposed between a select gate line and the selected word line. Voltage levels of the plurality of word line pre-pulse signals are incremental.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: November 15, 2022
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Jianquan Jia, Ying Cui, Kaikai You
  • Patent number: 11501405
    Abstract: This disclosure relates to advanced image signal processing technology including encoded signals and digital watermarking. The technology may be applied to retail packages and other printed objects, e.g., such as hang tags, labels and receipts.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: November 15, 2022
    Assignee: Digimarc Corporation
    Inventors: Alastair M. Reed, Kristyn R. Falkenstern
  • Patent number: 11495639
    Abstract: A memory unit, array and operation method thereof are provided. The memory unit includes at least one P-type driver having a first end coupled to a power source, a second end and a control end coupled to a word line; a memory cell having a first end coupled to the second end of the P-type driver, and a second end coupled to a bit line.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: November 8, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hsin-Yi Ho, Hsiang-Lan Lung
  • Patent number: 11495032
    Abstract: A sensing apparatus is configured to measure a target person without being attached to the target person, and is configured to generate information associated with the target person from outputs of at least a part of sensors of a plurality of sensors that are different from each other in at least one of a sensor type and location. The sensing apparatus is provided with: a specifier configured to specify at least one of clothes and physical features of the target person from images obtained by imaging the target person; and a determinator configured to determine one or a plurality of sensors, which are the at least the part of sensors, from the plurality of sensors, on the basis of the specified at least one of the clothes and the physical features.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: November 8, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Yusuke Fujiwara