Patents Examined by Viet Q. Nguyen
  • Patent number: 11714162
    Abstract: An optical tracking system includes optical source devices. The optical source devices are configured to emitting optical signals. A control method, suitable for the optical tracking system, includes following operations. A dimensional scale to be covered by the optical tracking system is obtained. Signal strength of the optical signals provided by the optical source devices is adjusted according to the dimensional scale. The signal strength of the optical signals is positively correlated with the dimensional scale.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: August 1, 2023
    Assignee: HTC Corporation
    Inventors: Mong-Yu Tseng, Sheng-Long Wu
  • Patent number: 11710720
    Abstract: A semiconductor package is provided, which includes a first die and a second die. The first die includes a first section of a power converter, and the second die includes a second section of the power converter. The power converter may include a plurality of switches, and a Power Management (PM) circuitry to control operation of the power converter by controlling switching of the plurality of switches. The PM circuitry may include a first part and a second part. The first section of the power converter in the first die may include the first part of the PM circuitry, and the second section of the power converter in the second die may include the second part of the PM circuitry.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 25, 2023
    Assignee: Intel Corporation
    Inventors: Beomseok Choi, Siddharth Kulasekaran, Kaladhar Radhakrishnan
  • Patent number: 11710298
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training an event detector. The methods, systems, and apparatus include actions of obtaining frames of a video, determining whether an object of interest is detected within the frames, determining whether motion is detected within the frames, determining whether the frames correspond to motion by an object of interest, generating a training set that includes labeled inter-frame differences based on whether the frames correspond to motion by an object of interest, and training an event detector using the training set.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: July 25, 2023
    Assignee: ObjectVideo Labs, LLC
    Inventors: Narayanan Ramanathan, Allison Beach
  • Patent number: 11703350
    Abstract: A system for automatically annotating a map includes: a robot; a server operably connected to the robot; file storage configured to store files, the file storage operably connected to the server; an annotations database operably connected to the server, the annotations database comprising map annotations; an automatic map annotation service operably connected to the server, the automatic map annotation service configured to automatically do one or more of create a map of an item of interest and annotate a map of an item of interest; a queue of annotation requests operably connected to the automatic annotation service; and a computer operably connected to the server, the computer comprising a graphic user interface (GUI) usable by a human user.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: July 18, 2023
    Assignee: Zebra Technologies Corporation
    Inventors: Levon Avagyan, Jiahao Feng, Alex Henning, Michael Ferguson, Melonee Wise, Derek King
  • Patent number: 11705200
    Abstract: A method of switching between first and second states of a van der Waals heterostructure, vdWH, memory device, a vdWH memory device, and a method of fabricating a vdWH memory device. The vdWH memory device comprises a first two-dimensional, 2D, material; and a second 2D material, wherein, in a first storage state of the memory device, an interface between the first and second 2D material comprises interfacial states; and wherein, in a second storage state of the memory device, interfacial states are modulated compared to the first memory state.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: July 18, 2023
    Assignees: National University of Singapore and, National University of Singapore (Suzhou) Research
    Inventors: Wei Chen, Du Xiang, Tao Liu
  • Patent number: 11705184
    Abstract: A memory device having long data retention time and high reliability is provided. The memory device includes a driver circuit and a plurality of memory cells, the memory cell includes a transistor and a capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and in a period during which the memory cell retains data, negative potentials are applied to the first gate and the second gate of the transistor.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: July 18, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki
  • Patent number: 11705208
    Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to identify a set of embedded servo cells stored on the memory device; determine a read voltage offset by performing read level calibration based on the set of embedded servo cells; and apply the read voltage offset for reading a memory page associated with the set of embedded servo cells.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: July 18, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Larry J. Koudele, Bruce A. Liikanen, Michael Sheperek
  • Patent number: 11699475
    Abstract: Methods, systems, and devices for ferroelectric memory plate power reduction are described. A plate line may be coupled with a voltage source, a capacitor, and one or more sections of a bank of ferroelectric memory cells. During a write operation, the capacitor may be discharged onto the plate line and the resulting voltage may be adjusted (e.g., increased) by the voltage source before writing one or more memory cells. During a write-back operation, a capacitor associated with one or more memory cells may be discharged onto the plate line and stored at the capacitor. The charge may be re-applied to the plate line and adjusted (e.g., increased) by the voltage source during the write-back.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: July 11, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Adam S. El-Mansouri, David L. Pinney
  • Patent number: 11694737
    Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: July 4, 2023
    Assignee: Kepler Computing Inc.
    Inventors: Rajeev Kumar Dokania, Amrita Mathuriya, Sasikanth Manipatruni
  • Patent number: 11694310
    Abstract: An image processing method includes a first step of acquiring input data including a captured image and optical system information relating to a state of an optical system used for capturing the captured image and a second step of inputting the input data to a machine learning model and of generating an estimated image acquired by sharpening the captured image or by reshaping blurs included in the captured image.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: July 4, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Norihito Hiasa
  • Patent number: 11688462
    Abstract: Disclosed is a three-dimensional flash memory including a back gate, which includes word lines extended and formed in a horizontal direction on a substrate so as to be sequentially stacked, and strings penetrating the word lines and extended and formed in one direction on the substrate. Each of the strings includes a channel layer extended and formed in the one direction, and a charge storage layer extended and formed in the one direction to surround the channel layer, the channel layer and the charge storage layer constitute memory cells corresponding to the word lines, and the channel layer includes a back gate extended and formed in the one direction, with at least a portion of the back gate surrounded by the channel layer, and an insulating layer extended and formed in one direction between the back gate and the channel layer.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: June 27, 2023
    Assignees: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY), PeDiSem Co., Ltd.
    Inventors: Yun Heub Song, Chang Eun Song
  • Patent number: 11688457
    Abstract: An electronic circuit includes a plurality of word lines; a plurality of bit lines intersecting said plurality of word lines at a plurality of grid points; and a plurality of in-memory processing cells located at said plurality of grid points. Each of said in-memory processing cells includes a first switch having a first terminal coupled to a corresponding one of said word lines and a second terminal; a second switch having a first terminal coupled to said second terminal of said first switch and a second terminal coupled to a corresponding one of said bit lines; and a non-volatile tunable capacitor having one electrode coupled to said second terminal of said first switch and said first terminal of said switch, and having another electrode coupled to ground.
    Type: Grant
    Filed: December 26, 2020
    Date of Patent: June 27, 2023
    Assignee: International Business Machines Corporation
    Inventors: Nanbo Gong, Guy M. Cohen, Takashi Ando, Yulong Li
  • Patent number: 11688166
    Abstract: A multi-mode tracking method according to the present disclosure includes receiving sensor signals from a plurality of positioning sensors located on a plurality of sport participants wherein the sensor signals each include a participant identifier and location data, receiving a sport image captured from a camera located near a playfield wherein the sport image includes at least a target participant among a plurality of sport participants on the playfield, detecting an occlusion related to the target participant in the sports image, determining the severity of the occlusion on the basis of a sensor signal received from a specific positioning sensor installed on a specific sport player located in a region of interest related to the occlusion, and determining a location of the sport participant on the basis of the severity of the occlusion.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: June 27, 2023
    Assignee: Fitogether Inc.
    Inventors: Jinsung Yoon, Jonghyun Lee
  • Patent number: 11688445
    Abstract: A memory cell is disclosed which includes a semiconductor layer, a first electrode coupled to the semiconductor layer, a second electrode coupled to the semiconductor layer, wherein the first and second electrodes are separated from one another along a first axis and wherein the semiconductor layer extends beyond the first axis along a second axis substantially perpendicular to the first axis, thereby forming a first wing, a third electrode separated from the semiconductor layer by an insulating layer, a first magnetic tunnel junction (MTJ) disposed on the first wing, and a first read electrode coupled to the first MTJ.
    Type: Grant
    Filed: January 30, 2022
    Date of Patent: June 27, 2023
    Assignee: Purdue Research Foundation
    Inventors: Sandeep Krishna Thirumala, Sumeet Kumar Gupta, Yi-Tse Hung, Zhihong Chen
  • Patent number: 11688200
    Abstract: Systems and methods for joint feature extraction and quality prediction using a shared machine learning model backbone and a customized training dataset are provided. According to an embodiment, a computer system receives a training dataset including example images each labeled with a particular category of a set of categories, and trains a deep neural network (DNN) based on the training dataset to jointly perform for an input image (i) facial feature extraction in accordance with the facial feature extraction algorithm and (ii) a quality scoring in accordance with a quality prediction algorithm. In the embodiment, the DNN, once trained with the training dataset labeled using a custom labeling scheme is used for the facial feature extraction and the quality prediction. The facial feature extraction algorithm and the quality prediction algorithm share a common DNN backbone of the DNN.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: June 27, 2023
    Assignee: Fortinet, Inc.
    Inventor: Xihua Dong
  • Patent number: 11690303
    Abstract: An electronic chip includes at least a first array of first elementary cells and a second array of second elementary cells. The first and second elementary cells form two types of phase change memory having a storage element formed by a volume of phase change material having either a crystalline state or an amorphous state depending on the bit stored. Each first elementary cell includes a volume of a first phase change material, and each second elementary cell includes a volume of a second phase change material that is different from the first material. Each elementary cell includes a heating connector configured for the passage of a heating current adapted to cause a phase change of the volume of phase change material of the elementary cell.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: June 27, 2023
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Remy Berthelon, Franck Arnaud
  • Patent number: 11672255
    Abstract: A method for evaluating (50) the health state of an anatomical element of an animal in a slaughtering plant provided with an image acquisition device. The evaluation method comprises the steps of: verifying the presence of the anatomical element; acquiring the image of the anatomical element; processing (S4) the image of the anatomical element through Deep Learning techniques, generating a lesion image representing lesioned portions of the anatomical element, and a number of processed images, each representing a corresponding non-lesioned anatomical area of the animal; for each of the lesioned portions and for each of the non-lesioned anatomical areas, determining a corresponding quantity indicative of the probability that said lesioned portion corresponds to said non-lesioned anatomical area; determining a score indicative of the health state of the anatomical element, depending on the determined quantities.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: June 13, 2023
    Assignee: FARM4TRADE S.R.L.
    Inventors: Giuseppe Marruchella, Luca Bergamini, Andrea Capobianco Dondona, Ercole Del Negro, Francesco Di Tondo, Angelo Porrello, Simone Calderara
  • Patent number: 11675068
    Abstract: A data processing method, device and multi-sensor fusion method for multi-sensor fusion, which can group data captured by different sensors in different probe dimensions to simultaneous interpreting deep learning data based on pixel elements in the multi-dimensional matrix structure, thereby realize the more effective data mining and feature extraction to support more effective ability of environment perception and target detection.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: June 13, 2023
    Assignee: Shanghai YuGan Microelectronics Co., Ltd
    Inventor: Hong Jiang
  • Patent number: 11676650
    Abstract: A semiconductor device may include a delay locked loop (DLL) control circuit coupled to an update trigger generator and a DLL update circuit. The DLL control circuit may receive an update trigger signal and an internal refresh signal and configured to activate the DLL update circuit responsive to an update trigger in the update trigger signal and deactivate the DLL update circuit responsive to an active internal refresh signal. The DLL update circuit may perform DLL update to one or more memory cell arrays when activated and not perform DLL update to the memory cell arrays when deactivated. The DLL control circuit may reactivate the DLL update circuit once the internal refresh signal becomes inactive. In other scenarios, once the DLL update circuit is deactivated, the DLL update circuit stays deactivated until the next update trigger in the update trigger signal.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Kazutaka Miyano, Yasuo Satoh, Kenji Mae
  • Patent number: 11669998
    Abstract: Methods and systems are provided for learning a neural network and to determine a pose of a vehicle in an environment. A first processor performs a first feature extraction on sensor-based image data to provide a first feature map. The first processor also performs a second feature extraction on the aerial image data to provide a second feature map. Both feature maps are correlated to provide a correlation result. The first processor learns a neural network using the correlation result and ground-truth data, wherein each of the first feature extraction and the second feature is learned to extract a portion of features from the respective image data. A geo-tagged second feature map can then be retrieved by an on-board processor of the vehicle which, along with on-board processed sensor-based data by the network trained by the first processor, determines the pose of the vehicle.
    Type: Grant
    Filed: January 20, 2021
    Date of Patent: June 6, 2023
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Han UL Lee, Brent N. Bacchus