Abstract: An optoelectronic semiconductor structure includes a first n-type semiconductor layer, a first quantum well layer, a first p-type semiconductor layer, and a second n-type semiconductor layer. The first quantum well layer is disposed on the first n-type semiconductor layer. The first p-type semiconductor layer is disposed on the first quantum well layer. The second n-type semiconductor layer is disposed on the first p-type semiconductor layer. The second n-type semiconductor layer includes both an n-type dopant and a p-type dopant. The concentration of the n-type dopant in the second n-type semiconductor layer is greater than the concentration of the p-type dopant in the second n-type semiconductor layer. The first n-type semiconductor layer, the first quantum well layer, the first p-type semiconductor layer, and the second n-type semiconductor layer form a bipolar phototransistor structure. A manufacturing method of the optoelectronic semiconductor structure is also provided.

Abstract: A semiconductor device includes a gate dielectric layer and a gate electrode formed on the gate dielectric layer. The gate electrode includes a first metal layer, a second metal layer, and a third metal layer. The first metal layer includes an oxygen-gettering composition. The second metal layer includes oxygen. The third metal layer includes an interface with a polysilicon layer.

Abstract: Gate contact structures disposed over active portions of gates and methods of forming such gate contact structures are described. For example, a semiconductor structure includes a substrate having an active region and an isolation region. A gate structure has a portion disposed above the active region and a portion disposed above the isolation region of the substrate. Source and drain regions are disposed in the active region of the substrate, on either side of the portion of the gate structure disposed above the active region. A gate contact structure is disposed on the portion of the gate structure disposed above the active region of the substrate.

Abstract: According to one embodiment, a semiconductor memory device includes: a substrate; a plurality of wiring layers stacked via a plurality of insulating layers above the substrate, the wiring layers having an opening extending in a direction perpendicular to the substrate, each of the wiring layers including a first face recessed in a first direction, a second face recessed in a second direction, third face recessed in a third direction, and a fourth face recessed in a fourth direction; a block insulating film provided to be in contact with each of the first to fourth faces; a charge storage film provided on a side face of the block insulating film; a tunnel insulating film provided on a side face of the charge storage film; and a semiconductor film provided on a side face of the tunnel insulating film.

Abstract: A semiconductor device includes a first and a second vertical Hall elements formed parallel to each other. Each of the first and the second vertical Hall elements includes: a semiconductor layer on the semiconductor substrate; a Hall voltage output electrode and a first and a second drive current supply electrodes each formed of an impurity region, and sequentially arranged along a straight line on the semiconductor layer; and a first electrode isolation diffusion layer between the first drive current supply electrode and the Hall voltage output electrode, and a second electrode isolation diffusion layer between the Hall voltage output electrode and the second drive current supply electrode. The first and the second drive current supply electrodes each has the second depth deeper than the first depth of the Hall voltage output electrode and the depth of each of the electrode isolation diffusion layers.

Abstract: Systems including a processor and a memory device in communication with the processor include an array of non-volatile memory cells configured in a NAND architecture. The array includes a plurality of series-coupled first non-volatile memory cells, each first non-volatile memory cell curving around a first curved side of a substantially vertical pillar and terminating at an isolation region, and a plurality of series-coupled second non-volatile memory cells, each second non-volatile memory cell curving around a second curved side of the substantially vertical pillar and terminating at the isolation region. Respective ones of the first non-volatile memory cells are respectively at same vertical levels as respective ones of the second non-volatile memory cells.

Abstract: A method is for making a semiconductor device. The method may include providing a lead frame having a recess, forming a sacrificial material in the recess of the lead frame, and mounting an IC on the lead frame. The method may include encapsulating the IC and the lead frame, removing portions of the lead frame to define lead frame contacts for the IC, and removing the sacrificial material to define for each lead frame contact a solder anchoring tab extending outwardly at a lower region and defining a sidewall recess between opposing portions of the solder anchoring tab and the encapsulation material.

Abstract: An image sensor including a substrate, a light sensing device, a storage node, a buried gate structure, and a first light shielding layer is provided. The light sensing device is disposed in the substrate. The storage node is disposed in the substrate. The storage node and the light sensing device are separated from each other. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. The first light shielding layer is disposed on the buried gate and is located above the storage node. The first light shielding layer is electrically connected to the buried gate.

Abstract: A well monitoring system particularly useful in detecting kicks in the well includes a well, a well system, and a computing apparatus. The well defines a wellbore and the well system includes at least one sensor measuring at least one well condition. The computing apparatus hosts a well monitoring software component that performs a method to detect a kick in a well. The method includes: storing a set of real-time data from a measurement of a well condition by the sensor, the measurements being correlative to an unplanned fluid influx into the well; modeling the operation of the well with a physics-based, state space model of the well system to obtain an estimate of the well condition; and applying the real-time data set and the estimate to a probabilistic estimator to yield a probability of an occurrence of a kick and a confidence measure for the probability.

Abstract: A display device comprises a display panel and an optical plate. The display panel comprises a surface comprising a display area and a non-display area, the display panel further comprising a bending portion that is bent and a non-bending portion that is not bent. The display panel comprises: a base substrate, an array of pixels formed over the base substrate, and electrically conductive lines disposed over the base substrate and electrically connecting the array of pixels to an exterior device, the electrically conductive lines comprising at least one extension formed in the bending portion and overlapping the non-display area when viewed in a thickness direction of the display panel. The optical plate is disposed over the display panel, and comprises: a first optical plate portion covering the display area, and a second optical plate portion covering the at least one extension of the electrically conductive lines.

Abstract: Systems, methods, devices and computer-readable storage mediums are disclosed for device state estimation with body-fixed assumption. In some implementations, a method comprises: determining, by a device, a rotational velocity of a user of the device based on a sensor signal; determining, by the device, user speed; determining, by the device, user acceleration based on the user speed and the rotational velocity of the user; and updating a user state estimator based on the user acceleration.

Abstract: A fabrication method of an organic electroluminescent device includes: providing a substrate configured to an anode of the device; fabricating a blue pixel emission layer on one side of the substrate with a universal mask plate; and fabricating a red pixel emission layer and a green emission layer successively on one side of the blue pixel emission layer which backs toward the substrate. The blue pixel emission layer includes an effective emission area and a non-effective emission area. The red pixel emission layer and the green pixel emission layer both are the same layer and arranged on the non-effective emission area. The present disclosure can reduce equipment expenditure in fabricating the emission layers and the complexities of technology.

Abstract: Methods for forming a string of memory cells, apparatuses having a string of memory cells, and systems are disclosed. One such method for forming a string of memory cells forms a source material over a substrate. A capping material may be formed over the source material. A select gate material may be formed over the capping material. A plurality of charge storage structures may be formed over the select gate material in a plurality of alternating levels of control gate and insulator materials. A first opening may be formed through the plurality of alternating levels of control gate and insulator materials, the select gate material, and the capping material. A channel material may be formed along the sidewall of the first opening. The channel material has a thickness that is less than a width of the first opening, such that a second opening is formed by the semiconductor channel material.

Abstract: An electroluminescence display includes a substrate, a bank defining a first light emitting area, a second light emitting area, and a third light emitting area on the substrate, a first light emitting layer provided in the first light emitting area, a second light emitting layer provided in the second light emitting area, a third light emitting layer provided in the third light emitting area, and a fourth light emitting layer provided on the first light emitting layer, the second light emitting layer, the third light emitting layer, and the bank, wherein the fourth light emitting layer emits light having the same color light of the third light emitting layer. If red light is emitted from the first light emitting layer, green light is emitted from the second light emitting layer, and blue light is emitted from the third light emitting layer and the fourth light emitting layer, the luminous efficiency of blue light can be improved.

Abstract: The present invention provides with a thermal conductive sheet including a foldable layer having a bending region, a graphite sheet disposed on the foldable layer, and disposed outside the bending region, a first adhesive layer covered on the graphite sheet and the foldable layer, and a polymer film layer coated on the first adhesive layer. Accordingly, the present invention has a good heat dissipation effect, bendable and flexible in order to avoid a layer separation phenomenon.

Abstract: The present invention provides a method of manufacturing a package structure. An array chip including a plurality of first dies is provided. A wafer including a plurality of second dies is provided. A package step is carried out to package the array chip onto the wafer so as to electrically connect the first die and the second die. The present invention further provides a semiconductor wafer and a package structure.

Abstract: A receiving circuit uses a weight set by calibration to weight signals incident to receiving elements. A storing unit stores a measured value of a mode vector reflecting characteristics of the receiving circuit in an error-free state of the weight for the receiving circuit characteristics and further correlates and stores an incident signal angle estimated by an estimating unit, and for the error-free state, a calculation result of an evaluation value by an evaluation function capable of calculating the evaluation value, which varies according to the incident signal angle and error. A detecting unit calculates the evaluation value based on the stored measured value of the mode vector and the evaluation function and detects an occurrence of the error based on comparison of the calculated evaluation value and the stored evaluation value, when the estimated incident signal angle corresponds to a value close to the stored incident signal angle.

Abstract: A semiconductor structure and a method for forming the same are provided. The method for manufacturing a semiconductor structure includes forming a gate structure over a substrate and forming a spacer on a sidewall of the gate structure. The method for manufacturing a semiconductor structure further includes forming a hard mask structure on a top surface of the gate structure and on an upper portion of the spacer but not on a bottom portion of the spacer.

Abstract: Systems and methods are disclosed for characterizing on foot motion of a user with a portable device by obtaining parameters sufficient to characterize the on foot motion of the user from multiple sensor assemblies. Each additional sensor assembly may be independent of each other. The characterization of on foot motion is provided by synthesizing the parameters from the sensor assemblies. Characterization of on foot motion may include detecting a step, estimating step length, or both.

Abstract: An integrated circuit with a SAR SRAM cell with power routed in metal-1. An integrated circuit with a SAR SRAM cell that has power routed in Metal-1 and has metal-1 and metal-2 integrated circuit and SAR SRAM cell patterns which are DPT compatible. A process of forming an integrated circuit with a SAR SRAM cell with DPT compatible integrated circuit and SAR SRAM cell metal-1 and metal-2 patterns.