Abstract: To provide a Group III nitride semiconductor light-emitting device exhibiting the improved light extraction efficiency as well as reducing the influence of polarization that a p-type conductivity portion and an n-type conductivity portion occur in the AlGaN layer caused by the Al composition variation, and a production method therefor. A first p-type contact layer is a p-type AlGaN layer. A second p-type contact layer is a p-type AlGaN layer. The Al composition in the first p-type contact layer is reduced with distance from a light-emitting layer. The Al composition in the second p-type contact layer is reduced with distance from the light-emitting layer. The Al composition in the second p-type contact layer is lower than that in the first p-type contact layer. The Al composition variation rate to the unit thickness in the second p-type contact layer is higher than that in the first p-type contact layer.

Abstract: An organic electroluminescence device includes: an anode; an emitting layer; and a cathode, the emitting layer containing a first material, a second material and a third material, the first material being a fluorescent material, the second material being a delayed fluorescent material, the third material having a singlet energy larger than a singlet energy of the second material.

Abstract: A method for manufacturing a package includes molding a precursor of a package including a cup-shaped resin component having a bottom surface and side walls, an opening opened at an upper part of the side walls, and a pair of leads exposed on the bottom surface. The side walls include a side wall that extends along the Y axis and the X axis and that has a first outer surface, and a side wall that extends along the Y axis and the Z axis. A thickness of the side wall extending along Y axis and the X axis is less than a thickness of the side wall extending along axis and the Z axis. The first outer surface has a recess which is recessed in the Z axis direction and arranged in a position corresponding to the opening. The method further includes forming a reflective film in the recess.

Abstract: Semiconductor structures are provided. A semiconductor structure includes a substrate having a device region, a seal ring region surrounding the device region, and a dielectric layer disposed thereon. A first seal ring structure is located within the dielectric layer on the seal ring region, and includes a plurality of first connection layers overlappingly disposed and separated by the dielectric layer. At least one first connection layer is formed by a plurality of discrete sub-connection layers. The first seal ring structure further includes a plurality of first conductive plugs between vertically adjacent first connection layers. A top of each first conductive plug is connected to an upper first connection layer. A bottom of each first conductive plug between at least two vertically adjacent first connection layers extends into the dielectric layer between horizontally adjacent sub-connection layers of a lower first connection layer.

Abstract: An array substrate, a fabrication method thereof, and an organic light-emitting diode display device are provided; the array substrate (10) comprises a base substrate (100), the base substrate (100) including a display region (102) and a peripheral region (101) surrounding the display region (102), the display region (102) including: a plurality of data lines (12) and a plurality of gate lines (11) intersecting with each other, a plurality of pixel regions (21), formed in a matrix and defined by the plurality of data lines (12) and the plurality of gate lines (11) intersecting with each other formed on the base substrate (100), wherein a thin film transistor (32) is formed in each of the plurality of pixel regions (21); and further, the array substrate (10) also comprises at least one solar cell unit (31), which, together with the thin film transistor (32), is located on a same side of the base substrate (100), and is formed in at least one of the plurality of pixel regions (21) and the peripheral region (101

Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.

Abstract: A method for preparing a device having a film on a substrate is disclosed. In the method, a film is deposited on a substrate. The film includes a single-crystalline or poly-crystalline semiconducting thin film. The single-crystalline or poly-crystalline semiconducting thin film is formed by sequential evaporation of a first and a second element. One example device prepared by the method includes a silicon substrate and a film on the substrate, wherein the film includes semiconducting and single- or poly-crystalline pyrite as the compound.

Abstract: A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on another so as to enable the exchange of electrical signals between the semiconductor chips, and where a conductive layer is included for inputting and outputting signals to and from individual chips. A stack chip package having a compact size may, for example, be manufactured by stacking, on a first semiconductor chip, a second semiconductor chip having a smaller surface area by means of interconnection structures so as to enable the exchange of electrical signals between the first and second semiconductor chips, and by using a conductive layer for inputting and outputting signals to and from individual semiconductor chips, in lieu of a thick substrate. Furthermore, heat dissipation effects can be enhanced by the addition of a heat dissipation unit.

Abstract: Described embodiments can be used in semiconductor manufacturing and employ materials with high and low polish rates to help determine a precise polish end point that is consistent throughout a wafer and that can cease polishing prior to damaging semiconductor elements. The height of the low polish rate material between the semiconductor elements is used as the polishing endpoint. Because the low polish rate material slows down the polishing process, it is easy to determine an end point and avoid damage to the semiconductor elements. An additional or alternative etch end point can be a thin layer of material that provides a very clear spectroscopy signal when it has been exposed, allowing the etch process to cease.

Abstract: The present disclosure is directed to a method for estimating tower loads, such as tower deflection, of a wind turbine. The method includes receiving an estimate of slow variations in thrust of a tower of the wind turbine. The method also includes determining, via one or more sensors, tower accelerations of the tower of the wind turbine. Thus, the method also includes estimating the tower loads of the wind turbine as a function of the estimate of slow variations in thrust of the tower and the tower accelerations.

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a substrate including a display area in which an OLED is formed and a non-display area surrounding the display area. The OLED display also includes a pixel defining layer formed over the substrate and having an opening defining an emission area of the OLED, a first passivation layer covering a portion of the pixel defining layer formed in the non-display area and a second passivation layer formed in the non-display area, wherein a portion of the second passivation layer does not overlap the first passivation layer in the depth dimension of the OLED display. The OLED display further includes an encapsulation substrate formed to be opposite to the substrate and a filler filling a space between the substrate and the encapsulation substrate and contacting the first and second passivation layers.

Abstract: Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include substrate including electrical connection circuitry therein, ground circuitry on, or at least partially in the substrate, the ground circuitry at least partially exposed by a surface of the substrate, a die electrically connected to the connection circuitry and the ground circuitry, the die on the substrate, a conductive material on a die backside, and a conductive paste or one or more wires electrically connected to the ground circuitry and the conductive material.

Abstract: The ability to match multiple runs of inspection data to each other allows assets to be managed. Assets, such as defects in pipelines can be tracked across multiple inspection runs. The matching of defects allows the growth of defects in the pipeline to be tracked. The pipeline data system allows tracking of different assets including pipeline components, as well as managing documents including dig site reports.

Abstract: An organic light-emitting display apparatus is provided as follows. A thin film transistor is disposed on a substrate. A first insulating layer covers the thin film transistor. The first insulating layer includes a barrier wall and a flat portion. The barrier wall protrudes from the flat portion. A pixel electrode is disposed on the flat portion surrounded by the barrier wall. The pixel electrode is electrically connected to the thin film transistor. A pixel defining layer is disposed on the pixel electrode and partially exposes the pixel electrode.

Abstract: A semiconductor device structure comprises stacked tiers each comprising a conductive structure and an insulating structure longitudinally adjacent the at least one conductive structure, at least one staircase structure having steps comprising lateral ends of the stacked tiers, and an opening laterally adjacent a first side of the at least one staircase structure and extending through the stacked tiers and continuously across an entire length of the at least one staircase structure. Conductive structures of the stacked tiers laterally extend from the steps of the at least one staircase structure completely across a second side of the at least one staircase structure opposing the first side to form continuous conductive paths laterally extending completely across the stacked tiers. Additional semiconductor device structures, methods of forming semiconductor device structures, and electronic systems are also described.

Abstract: A menu navigation engine that enables user configuration of a vortex flowmeter. The vortex flowmeter includes a memory device and a processor, among other hardware components. Software instructions stored on the memory device and executable by the processor implement the menu navigation engine by displaying use case identifiers on the user interface, receiving selections of use case identifiers via the user interface, generating a formatted hierarchical tree of vortex flowmeter configuration nodes associated with the selected use case, and displaying the generated tree on the user interface.

Abstract: An electronic device may have a display with a transparent layer such as a cover layer. An ambient light sensor may be aligned with an ambient light sensor window formed from an opening in a masking layer on the transparent layer in an inactive portion of the display. To help mask the ambient light sensor window from view, the ambient light sensor window may be provided with a black coating that matches the appearance of surrounding masking layer material while allowing light to reach the ambient light sensor. The black coating may include multiple pigments and may have a flat spectrum to enhance color ambient light measurements made with the ambient light sensor. The black coating may include a polymer binder or other binder that contains multiple pigments. The pigments may include a black pigment, a blue pigment, and an infrared-light-transparent pigment and/or other pigments.

Abstract: Provided is a Group III nitride epitaxial substrate that can suppress the occurrence of breakage during a device formation process and a method for manufacturing the same. A Group III nitride epitaxial substrate according to the present invention includes a Si substrate, an initial layer in contact with the Si substrate, and a superlattice laminate, formed on the initial layer, including a plurality of sets of laminates, each of the laminates including, in order, a first layer made of AlGaN with an Al composition ratio greater than 0.5 and 1 or less and a second layer made of AlGaN with an Al composition ratio greater than 0 and 0.5 or less. The Al composition ratio of the second layer progressively decreases with distance from the substrate.

Abstract: The semiconductor device includes: a transistor having an oxide semiconductor layer; and a logic circuit formed using a semiconductor material other than an oxide semiconductor. One of a source electrode and a drain electrode of the transistor is electrically connected to at least one input of the logic circuit, and at least one input signal is applied to the logic circuit through the transistor. The off-current of the transistor is preferably 1×10?13 A or less.

Abstract: A method for fabricating a gate-all-around field-effect-transistor device includes forming a plurality of first stacked structures, each including a first sacrificial layer and a first semiconductor layer; forming a first dummy gate structure across the first stacked structures and partially covering the top and the sidewall surfaces of each first stacked structure, and a first sidewall spacer on each sidewall surface of the first dummy gate structures; forming a first source/drain doped layer, and a dielectric structure exposing the top surfaces of the first dummy gate structure and each first sidewall spacer; removing the first dummy gate structure to form a first trench; removing a portion of the first sacrificial layer to form a first via which partially exposes the first source/drain doped layer; forming a first barrier layer on the first source/drain doped layer; and forming a first gate structure to fill the first trench and the first via.