Abstract: An example semiconductor package includes a semiconductor die. In addition, the semiconductor package includes a mold compound having a first side, a second side opposite the first side, and an axis extending between the first side and the second side, the mold compound covering the semiconductor die. Further, the semiconductor package includes an interface member including a first portion and a second portion, the first portion is coupled to the second portion. The first portion is positioned along the first side, the second portion is positioned along the second side, and an engagement of a welding horn with the first portion is adapted to weld the second portion to a surface.

Abstract: According to one aspect of the present disclosure, a semiconductor structure is provided. The semiconductor structure may include a first wafer. The first wafer may include a plurality of first peripheral circuit chips, a first dicing lane between the first peripheral circuit chips, and a first mark at an edge of the first wafer. A pointing direction of the first mark may be the same as an extending direction of the first dicing lane. A cleavage plane of the first wafer may be parallel to the pointing direction of the first mark. The pointing direction of the first mark may be an extending direction of a line of symmetry of the first wafer. The semiconductor structure may include a second wafer. The second wafer and the first wafer may be disposed in a stack. The second wafer may be a plurality of memory array chips.

Abstract: A semiconductor package with two interposers, and the method of forming the same are provided. The semiconductor package may include a first interposer, a first semiconductor die on the first interposer, a second interposer on the first semiconductor die, and a second semiconductor die on the second interposer. The second interposer may be between the first semiconductor die and the second semiconductor die. The first semiconductor die may be bonded to the first interposer by metal-to-metal bonding and dielectric-to-dielectric bonding. The second semiconductor die may be bonded to the second interposer by metal-to-metal bonding and dielectric-to-dielectric bonding.

Abstract: The present disclosure provides a display panel and a display device that include a display area including a first optical area, a first optical bezel area located outside of the first optical area, and a normal area located outside of the first optical bezel area, and a non-display area, wherein each of the first optical area, the first optical bezel area, and the normal area may include two or more light emitting areas among a plurality of light emitting areas, and the first optical area may be a transmittable area. The plurality of light emitting areas may include a first light emitting area included in the first optical area, a second light emitting area emitting light of the same color as the first light emitting area and included in the first optical bezel area, and a third light emitting area emitting light of the same color as the first light emitting area and included in the normal area.

Abstract: A method for producing a semiconductor device, including forming a temporary fixing laminated body including a carrier, and a sealing structure body provided on a main surface of the carrier, and removing the carrier from the temporary fixing laminated body. The temporary fixing laminated body is formed by a method including adhering the curable resin film and the carrier. The carrier is removed from the temporary fixing laminated body by separating a protective layer that is the curable resin film that is cured from the carrier. The curable resin film exhibits a transmittance of 20% or less with respect to light at a wavelength of 355 nm when cured.

Abstract: Multi-die packages including a glass substrate within a space between adjacent IC dies. Two or more IC die may be placed within recesses formed in a glass substrate. The IC die and glass substrate, along with any conductive vias extending through the glass substrate may be planarized. Organic package dielectric material may then be built up on both sides of the IC dies and glass substrate. Metallization features formed within package dielectric material built up on a first side of the IC die may electrically interconnect the IC dies to package interconnect interfaces that may be further coupled to a host with solder interconnects. Metallization features formed within package dielectric material built up on a second side of the first and second IC dies may electrically interconnect the first IC die to the second IC die.

Abstract: A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provide a bonded structure with reliable electrical contacts.

Abstract: In an embodiment, a semiconductor package is provided that includes a first package surface and a second package surface opposing the first surface, a plastic molding and one or more semiconductor dies. The first package surface includes a first surface of the plastic molding and a first metallic area exposed from the plastic molding. The first metallic area includes a first product marking including at least one alphanumeric character and the first surface of the plastic molding includes a second product marking including at least one alphanumeric character.

Abstract: What is disclosed is a method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

Abstract: There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a stack structure including interlayer insulating layers and conductive layers, which are alternately stacked therein; and a plurality of contact plugs formed vertically on the conductive layers. The stack structure is configured to have a stepped structure, and each of a plurality of steps included in the stepped structure includes at least two interlayer insulating layers, among the interlayer insulating layers, and at least two conductive layers, among the conductive layers. The plurality of contact plugs include at least two contact plugs respectively connected to the at least two conductive layers included in each of the plurality of steps.

Abstract: An apparatus for transferring a semiconductor die from an arrangement dies to a target is provided and relates to a wafer stage, and film frame carrier, and to an assembly including the film frame carrier and arrangement of dies. The wafer chuck includes a rotationally mounted curved shell on which the arrangement of semiconductor dies can be arranged. The wafer stage includes a motor for rotating the curved shell around a rotational axis. The configuration allows improved throughput of the wafer stage. The carrier used with this wafer stage includes a ring-shaped body with an asymmetric bending stiffness allowing the ring-shaped body to be bent so that the mounting surface of the ring-shaped body changes from a first shape to a second more concave shape and prevents or limits the ring-shaped body to be bent so that the mounting surface becomes more convex than the first shape.

Abstract: Disclosed is a method for processing a device wafer, in which a device layer, the device layer constituting devices, is stacked on a base material and the devices are formed, respectively, in regions defined by a plurality of intersecting streets on a front surface of the base material. The method includes a first step of dividing the device layer along the streets, a second step of dividing the base material by plasma etching along the streets, and a third step of, before performing at least the second step, forming half-cut grooves by a cutting blade or a laser beam in the base material along the streets, respectively, from a side of a front surface or a side of a back surface of the device wafer. The third and second steps are performed from the side of the same surface of the device wafer.

Abstract: A glass core with a cavity-less local interconnect component architecture for complex multi-die packages. The apparatus has the local interconnect component attached directly to a planar glass layer and surrounded by mold. One or more redistribution layers may be located above and below the apparatus.

Abstract: A semiconductor device may include: a plurality of word lines; a select line; a channel layer extending into the select line through the word lines; a floating gate surrounding sidewalls of the channel layer between the channel layer and the select line; and a charge trap layer including a first and a second portion, wherein the first portion surrounds the sidewalls of the channel layer between the channel layer and the word lines and the second portion surrounds the floating gate between the channel layer and the select line.

Abstract: A processing apparatus using laser according to an embodiment includes a stage configured to hold a substrate and rotate, and a laser irradiation apparatus capable of moving in a radial direction of the rotation. The laser irradiation apparatus includes a control unit configured to control an output of an infrared pulsed laser so that L1/L2 satisfies 1.2 or more and 10 or less when a distance between laser spots adjacent to each other in a rotation direction of the stage is L1 and a distance between laser spots adjacent to each other in the radial direction of the rotation is L2.

Abstract: An apparatus for fabricating a display panel and a fabricating method of a display panel are provided. An apparatus for fabricating a display panel includes a loading module of a large-area fabricating substrate fabricated and separated into a plurality of display panels, a solvent application module configured to apply a metal bonding solvent onto the large-area fabricating substrate, and an element transfer module configured to transfer a plurality of light emitting elements or at least one integrated circuit onto the large-area fabricating substrate on which the metal bonding solvent is applied, and the loading module includes a groove type discharge path through which the metal bonding solvent applied by the solvent application module flows and is discharged.

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a lower semiconductor chip on a first redistribution substrate and including a through via, a lower molding layer on the first redistribution substrate and surrounding the lower semiconductor chip, a lower post on the first redistribution substrate and laterally spaced apart from the lower semiconductor chip, an upper semiconductor chip on the lower semiconductor chip and coupled to the through via, an upper molding layer on the lower molding layer and surrounding the upper semiconductor chip, an upper post on the lower molding layer and laterally spaced apart from the upper semiconductor chip, and a second redistribution substrate on the upper molding layer and coupled to the upper post. A top surface of the lower molding layer is at a level higher than that of a top surface of the lower semiconductor chip.

Abstract: The present disclosure relates to a plurality of host materials, an organic electroluminescent compound, and an organic electroluminescent device comprising the same. By comprising a specific combination of host compounds and/or an organic electroluminescent compound according to the present disclosure as an organic electroluminescent material, an organic electroluminescent device having low driving voltage and/or high luminous efficiency and/or long lifespan characteristics can be provided.

Abstract: A semiconductor device includes a first die. The first die includes a first dielectric bonding layer thereon and a plurality of first dielectric bonding patterns in the first dielectric bonding layer. A composition of the first dielectric bonding patterns is different from a composition of the first dielectric bonding layer.

Abstract: A method for producing a light emitting diode supply substrate for transferring a plurality of light emitting diodes to a supply destination, including: a first mounting step of mounting a plurality of light emitting diodes on a supply substrate; a selective removal step of selectively removing defective light emitting diodes on the supply substrate, and a second mounting step of transferring a normal light emitting diode to a position where the defective light emitting diode has been arranged on the supply substrate. Thus, a method produces a light emitting diode supply substrate capable of producing a light emitting diode supply substrate capable of transferring a plurality of normal light emitting diodes to a supply destination.