Abstract: A method for growing a superlattice structure on a substrate. First, a periodic array of monoatomic surface steps are created on the surface of the substrate at an area to have the superlattice structure grown thereon. There is apparatus for creating a beam of a material being input thereto and for selectively including or not including respective ones of a plurality of materials within the beam. The beam is directed at the steps of the substrate. Finally, logic causes control apparatus to include and not include respective ones of the materials within the beam in a pre-established pattern of time periods which will cause the materials to be deposited on the steps in a series of stacked monolayers. Tilted Superlattices (TSLs) and Coherent Tilted Superlattices (CTSLs) are created. The method can create pseudo ternary semiconductor alloys as part of a CTSL by employing at least two binary compound semiconductor alloys in the deposition process.

Abstract: An epitaxial silicon layer may be deposited on a monocrystalline silicon body by Chemical Vapor Deposition at reduced pressure and low deposition temperature by a method which includes cleaning the substrate within the CVD reactor. The cleaning within the reactor is achieved solely by applying a heat pulse by heating the substrate to a cleaning temperature above 1000 degrees Celsius for a time in the range of from 15 seconds to 90 seconds. In one example deposition of the layer is started by introducing silicon carrier gas not more than 15 seconds before the end of the heat pulse and at the end of the heat pulse the substrate temperature is allowed to fall to a desired deposition temperature between 650 degrees Celsius and 800 degrees Celsius for silane and 800 degrees Celsius and 875 degrees Celsius for trichlorsilane.

Abstract: A CMOS and bipolar fabrication process wherein a silicon dioxide layer initially formed over a silicon substrate is etched for forming separate collector and base/emitter regions for a bipolar device, and PMOS and NMOS regions for corresponding PMOS and NMOS devices. Buried layer implants are performed using a minimum number of masks, and then an epitaxial layer is grown over the exposed portions of the silicon substrate. The silicon dioxide walls between the devices provide full dielectric isolation between the devices, as well as between the collector and base/emitter regions of the bipolar device. Nonetheless, the oxide wall between the collector and base/emitter of the bipolar device is sufficiently small to allow the buried layer implants to joint under the wall for forming a conventional buried layer for the bipolar device. Because of the oxide walls, the minimum distance between devices may be 0.5 microns or less.

Abstract: A process for producing a compound semiconductor comprises applying a crystal forming treatment on a substrate having a free surface comprising a nonnucleation surface (S.sub.NDS) with smaller nucleation density and a nucleation surface (S.sub.NDL) arranged adjacent thereto having a sufficiently small area for a crystal to grow only from a single nucleus and a larger nucleation density (ND.sub.L) than the nucleation density (ND.sub.S) of said nonnucleation surface (S.sub.NDS), by exposing the substrate to either of the gas phases:(a) gas phase (a) containing a starting material (II) for feeding the group II atoms of the periodic table and a starting material (VI) for feeding the group VI atoms of the periodic table and(b) gas phase (b) containing a starting material (III) for feeding the group III atoms of the periodic table and a starting material (V) for feeding the group V atoms of the periodic table, thereby forming only a single nucleus on said nucleation surface (S.sub.

Abstract: A process for preparing high sensitivity indium antimonide film magnetoresistance element. A silicon single crystal wafer is treated with oxidative diffusion to form a layer of silicon oxide on the surface of the silicon single crystal, a layer of indium antimonide is grown on the substrate by vapor deposition, and the indium antimonide layer is then subjected to a specific annealing treatment in which the indium antimonide layer is partially oxidized and then re-crystallized. The resultant magnetoresistance element possessing improved sensitivity, stability and suitable for large scale production is obtained.

Abstract: A photoelectric conversion apparatus comprising a transistor having a main electrode area of one conductive type semiconductor and a control electrode area of an opposite conductive type semiconductor, and a capacitor for controlling the potential of the control electrode area in floating state in which carriers produced optically are stored in the control electrode area by controlling the potential of the control electrode area via the capacitor. The apparatus comprises a multilayered structure in which switching device for setting the control electrode area to a desired potential is formed on a layer different from that on which the transistor and capacitor are formed.

Abstract: A semiconductor device including a substrate having a low substrate surface formed in the substrate with a first gentle slope from the substrate surface; a single crystalline layer formed on the low substrate surface nearly level with the substrate surface and having a gentle slope facing the first gentle slope; an optical semiconductor element is constructed using the single crystalline layer. An electronic semiconductor element is constructed using the substrate surface. A wiring layer connects electrodes of the optical semiconductor element and the electronic semiconductor element through the first and the second gentle slopes.

Abstract: High resistivity In-based compound Group III-V epitaxial layers are used to prevent substantial current flow through a region of a semiconductor device, such as a CSBH, DCPBH, EMBH or CMBH laser, a LED, a photodiode, a HBT, or a FET. Also disclosed is a hydride VPE process for making the high resistivity material doped with Fe. The Fe is supplied by a volatile halogenated Fe compound, and the extend of pyrolysis of the hydride is limited to allow transport of sufficient dopant to the growth area.

Abstract: In a method for the fabrication of a layer of a monocrystalline semiconducting layer on a layer of insulating material, an epitaxial growth is achieved in a cavity closed by layers of dielectric material, using a seed of monocrystalline semiconducting material of a substrate. The growth takes place first of all, vertically, perpendicularly to the seed, and then horizontally in the plane of the cavity. This method thus enables a three-dimensional integration of semiconductor components.

Abstract: Present invention is to provide a process for producing an opto-electronic integrated circuit comprising a field effect transistor as an electronic device and a photo-diode as an optical device both formed on an InP substrate,the field effect transistor comprising a high electron mobility transistor having:a GaInAs layer epitaxially grown in the InP substrate in a preset region thereof, a n-AlInAs layer epitaxially grown on the GaInAs layer, a gate electrode formed on the AlInAs layer, and a source electrode and a drain electrode formed on the AlInAs layer with the gate electrode therebetween, andthe photo-diode comprising a PIN photo-diode having:the GaInAs layer epitaxially grown on the InP substrate near the region of the field effect transistor simultaneously with the growth of that of the field effect transistor, the n-AlInAs layer epitaxially grown on the GaInAs layer simultaneously with the growth of that of the field effect transistor, a n-InP layer epitaxially grown on the n-AlInAs layer, an undoped

Abstract: A method and apparatus for forming a monolithic surface emitting laser diode array by providing vertical partly light transmissive mirror surfaces opposite parabolic light reflective mirror surfaces formed adjacent the active buried layer of a heterostructure diode laser. The mirror surfaces are preferably formed using a mass-transport heating process. Other mirror shapes may be formed in accordance with the invention.

Abstract: An improved semiconductor device manufacturing system and method is shown. In the system, undesirable sputtering effect can be averted by virtue of a combination of an ECR system and a CVD system. Prior to the deposition according to the above combination, a sub-layer can be pre-formed of a substrate in a reaction chamber and transported to another chamber in which deposition is made according to the combination without making contact with air, so that a junction thus formed has good characteristics.

Abstract: A semiconductor structure having a face with macroscopic parallel steps and its method of making. The structure is formed by cutting a face on a crystal at a vicinal angle, that is, being misoriented from a major crystal face by a few degrees. Atomic sized microsteps are formed in the vicinal face. Parallel grooves or other regular irregularities are etched in the vicinal face. Subsequent epitaxial growth causes the microsteps to coalesce into macroscopic steps. Alternatively, etching or annealing can accomplish the same coalescing. Novel electronic structures can be fabricated on the stepped structure.

Abstract: A gain waveguide type semiconductor laser oscillating visible light has an N type GaAs substrate of, and a double-heterostructure provided above the substrate to include an InGaP active layer, and first and second cladding layers sandwiching the active layer. The first cladding layer consists of N type InGaAlP, whereas the second cladding layer consists of P type InGaAlP. A P type InGaP layer is formed as an intermediate band-gap layer on the second cladding layer. An N type GaAs current-blocking layer is formed on the intermediate band-gap layer, and has an elongated waveguide opening. A P type GaAs contact layer is formed to cover the current-blocking layer and the opening.

Abstract: The invention relates a method of manufacturing a semiconductor laser device having a coating on surfaces of a semiconductor body intended for emanation of a laser beam.

Abstract: An ion beam (113) focused into a diameter of at most 0.1 .mu.m bombards substantially perpendicularly to the superlattice layers of a one-dimensional superlattice structure and is scanned rectilinearly in a direction of the superlattice layers so as to form at least two parallel grooves (108, 109, 110, 111) or at least two parallel impurity-implanted parts (2109) as potential barrier layers, whereby a device of two-dimensional superlattice structure can be manufactured. At least two parallel grooves (114, 115, 116, 117) or impurity-implanted parts are further formed orthogonally to the potential barrier layers of the two-dimensional superlattice structure, whereby a device of three-dimensional superlattice structure can be manufactured. In addition, deposition parts (2403, 2404, 2405) may well be provided by further depositing an insulator into the grooves (108, 109, 110, 111, 114, 115, 116, 117) which are formed by the scanning of the ion beam.

Abstract: It has been found that layers which include arsenic and/or zinc can have an adverse effect upon optoelectronic semiconductor devices such as lasers. This is reduced by treatments in which arsenic and zinc are excluded. Preferably the substrate is cooled from reaction temperature in the presence of a mixture of hydrogen and PH.sub.3 (replacing AsH.sub.3 and/or Zn(CH.sub.3).sub.2 used to grow the final layer). Alternatively, devices have a contact layer of heavily p-type gallium indium arsenide are improved by the deposition of a protective layer of indium phosphide. This layer is removed immediately before metalization. Even though the protective layer is not present in the final product it has a beneficial effect.

Abstract: Proposed is a method of fabricating semiconductor devices involving vapor etching of channels and/or growth of layers in a substrate. The etch or growth rate is controlled by opening up additional regions in the mask which are separated from the opening used to define the active region. The etching or growth in the additional exposed regions of the substrate consumes a certain amount of reactant and controllably reduces the amount available for etching or growth in the active region.

Abstract: A method of producing a semiconductor laser including deposition a first film as a source of n type impurities on a portion of a semiconductor structure produced by growing at least a p type lower cladding layer, a quantum well active layer, and an n type upper cladding layer successively on a substrate, depositing a second film as a source of p type impurities at least on the surface of the semiconductor structure on both sides of and on the first film and annealing to diffuse p and n type impurities at the same time, thereby disordering portions of the quantum well except for the portion becoming an active region with p type impurities reaching at least the p type lower cladding layer, n type impurities reverting the portions of the n type cladding layer to which p type impurities have diffused to n type, and the n type impurities reaching the n type cladding layer but not reaching the active layer.

Abstract: A semiconductor body (1) is provided by growing epitaxial layers of semiconductor material on a substrate placed within a processing chamber and forming a mesa structure (3) on an upper epitaxial layer (2). The mesa structure (3) is formed by epitaxially growing, with the semiconductor body (1) still within the processing chamber, a first layer (4) of a semiconductor material different from that of the upper layer (2) on the upper layer (2) and the opening a window (5) in the first layer (4) to expose an area (2a) of the upper layer (2). A further layer (6) of a semiconductor material different from that of the first layer (4) is then epitaxially grown on the first layer (4) and on the said area (2a) of the upper layer. The first layer (4) is then selectively etched so as to remove the first layer (4) and the part of the further layer (6) carried by the first layer ( 14) leaving the remainder (60a, 60b) of the further layer (6) in the window (5) to form the mesa structure (3).