Abstract: A high speed GaAs FET is provided by forming a sandwiched GaAs channel between AlGaAs layers and employing an Si implant to provide channel doping for the GaAs channel. The poor activation efficiency of Si in AlGaAs relative to its activation efficiency in GaAs provides a channel having a higher active dopant concentration than exists in the adjacent sandwiching layers. This tends to enhance conductivity in the channel relative to the sandwiching layers.
Type:
Grant
Filed:
December 6, 1988
Date of Patent:
October 9, 1990
Assignee:
ITT Corporation
Inventors:
Arthur E. Geissberger, Robert A. Sadler, Gregory E. Menk, Matthew L. Balzan
Abstract: Films of Hg.sub.1-x Cd.sub.x Te grown at low temperatures by MBE or MOCVD are homogenized by annealing at about 350.degree. C. for 1.25 to 3 hours.
Abstract: In molecular beam epitaxial growth of GaAs substrate, a compound semiconductor thin film having Ga and As is grown by Ga beam and As beam in MBE chamber and then the substrate is transferred to an annealing chamber where the substrate is annealed under As vapor pressure. The above process is repeated to a predetermined layer level whereby it eliminates divergence from stoichiometric.
Abstract: A buried stripe semiconductor light emitting device and a method for producing the device in which the buried stripe functions as an internal resonator, and the device has window regions interposed between the resonator and facets on the external surface of the device. A first phase crystal growth is conducted in which a first cladding layer is grown on a doped substrate. Thereafter, a doped stripe of impurities is introduced into the first cladding layer in electrical contact with the doped substrate. The doped stripe extends longitudinally but terminates short of the facets so that later out-diffusion from the doped stripe will form the window regions. A second phase crystal growth is then conducted which buries the doped stripe internal to the semiconductor, i.e., not projecting through any external surface. The second phase crystal growth comprises an active layer, a second cladding layer and a contact layer successively grown on the first cladding layer.
Abstract: A buried heterojunction semiconductor laser appropriate for integration with other electronic circuitry and method of producing same, in which the width of a central stripe of the active region can be reduced beyond the physical size limitations of the connecting electrode so as to allow the semiconductor laser to oscillate in a stable manner and with low threshold current. The semiconductor laser is provided with a portion of the surface of the upper cladding layer located above the disordered active layer regions electrically connected with the upper cladding layer located above the nondisordered central stripe. As a result, the central stripe electrode can be of a width larger than that of the central stripe itself.
Abstract: A new III-IV buffer material is described which is produced by low temperature growth of III-V compounds by MBE that has unique and desirable properties, particularly for closely spaced, submicron gate length active III-V semiconductor devices, such as HEMT's, MESFET's and MISFET's. In the case of the III-V material, GaAs, the buffer is grown under arsenic stable growth conditions, at a growth rate of 1 micron/hour, and at a substrate temperature preferably in the range of 150 to about 300.degree. C. The new material is crystalline, highly resistive, optically inactive, and can be overgrown with high quality III-V active layers.
Type:
Grant
Filed:
February 19, 1988
Date of Patent:
August 28, 1990
Assignee:
Massachusetts Institute of Technology
Inventors:
Arthur R. Calawa, Frank W. Smith, Michael J. Manfra, Chang-Lee Chen
Abstract: A method of growing an epitaxial crystalline layer on a substrate which comprises the steps of(a) providing in the reaction zone of a reaction vessel a heated substrate(b) establishing a gas stream, provided by a carrier gas which gas stream comprises at least 50% by volume of a gas which suppresses the homogeneous nucleation of particles in the vapor phase which contains, in the vapor phase, at least one alkyl of an element selected from Group 15 and Group 16 of the Periodic Table,(c) passing the gas stream through the reaction zone into contact with the heated substrate, and(d) irradiating at least a major part of the surface of the substrate with electromagnetic radiation to provide photolytic decomposition of the at least one alkyl and consequential epitaxial deposition of the layer containing the said element across at least a major part of the surface of the substrate.
Type:
Grant
Filed:
November 6, 1985
Date of Patent:
August 21, 1990
Assignee:
Secretary of the State for Defence in Her Majesty's Government of the United Kingdom of Great Britain and Northern Ireland
Inventors:
Stuart J. Irvine, John B. Mullin, Jean Giess
Abstract: The invention is a method of forming a solder bump on an under bump metallurgy in which a contact pad on a substrate material is partially covered by a passivation layer upon the substrate material which is non-wettable by solder and in which the under bump metallurgy covers the portions of the contact pad which are not covered by the passivation layer and in which the under bump metallurgy overlaps from the contact pad to cover portions of the passivation layer.
Type:
Grant
Filed:
August 2, 1988
Date of Patent:
August 21, 1990
Assignee:
Microelectronics Center of North Carolina
Abstract: A process for forming electrodes for semiconductor devices having a semiconductor substrate and an electrically conductive portion covered and protected by an electrically insulating coating. The process includes the steps of forming an electrically conductive film on the electrically insulating coating, forming an electrode to be connected to an external circuit on the electrically conductive film at a position overlying the electrically conductive portion by exposing portions of the electrically insulating coating and the first electrically conductive film to a converged ion beam, electrically connectig the electrode to the exposed portions of the electrically conductive film, and removing the portions of the electrically conductive film not covered by the electrode. As a result, the likelihood of breakdown of the internal circuit of the semiconductor device connected to the electrically conductive portion while the electrode is being formed is greatly reduced.
Abstract: A semiconductor laser and a method of producing the same wherein the semiconductor laser is produced by forming a stripe-shaped projection on the surface of a semiconductor substrate, and forming multilayered thin films with a double heterostructure including an active layer on said semiconductor substrate by using the metal organic chemical vapor phase epitaxial growth method or the molecular beam epitaxial growth method. Thus, a buried stripe-structure semiconductor laser can be produced by a sequence of crystal growth processes.
Type:
Grant
Filed:
October 29, 1987
Date of Patent:
August 14, 1990
Assignee:
Matsushita Electric Industrial Co., Ltd.
Abstract: A high-power AlGaAs/GaAs laser device comprises: a ridge formed on the top surface of a substrate from one end to the opposite end, thereof wherein the width of the ridge is made narrower in regions near both the ends and wider in a middle region; a depression is formed in the wider region of the ridge; a clad layer is grown epitaxially over the top surface of the substrate; and an active layer is grown epitaxially on the clad layer, wherein the thickness of the active layer is thinner in portions just above the narrower ridge regions and relatively thicker in a portion just above the wider ridge region.
Abstract: A monolithic integrated structure in which a compound semiconductor (III-V or II-VI material) optoelectronic device (laser) is formed in the shape of a mesa-like structure projecting from an etch pit in an Si substrate. A method for sonically removing cantilevered beams formed on said optoelectronic device, to provide laser end facets, is also described.
Abstract: A method is provided to improve the alignment process in fabricating an integrated circuit with buried layers. The buried layers are implanted in a substrate and driven in, but without the usual step at their perimeter. A target pattern is etched into the substrate surface by means of plasma-assisted etching. An isotropic epitaxial layer is then grown at reduced pressure over the substrate surface so that the target is replicated on the epitaxial layer surface. The target as replicated is thus suitable for optical alignment, either manually or by automatic alignment equipment.
Abstract: A semiconductor structure is provided comprising a bulk substrate of semiconductor material having a first-type doping conductivity in a first dopant concentration. A first layer of semiconductor material is epitaxially formed on the substrate, such first layer having the first-type doping conductivity in a second dopant concentration lower than the first concentration. A second layer of semiconductor material is epitaxially formed on the first layer, the second layer having a second-type doping conductivity opposite to the first-type doping conductvity and thereby forming a P-N junction with the first layer. A plurality of regions, comprising semiconductor material having the first-type doping conductivity and extending through the second layer and a predetermined distance into the first layer, are further included for providing electrical isolation between active devices formed in different regions of the second layer.
Abstract: Disclosed is a novel method to use arsine plus an alkylarsenic co-reagent to grow GaAs by OMCVD that not only allows one to take advantage of the lower toxicity and ease of decomposition of the alkylarsenic compounds, but also reduces the carbon contamination normally found in epilayers grown exclusively from these alkylarsines, and decreases the amount of arsine needed for growth of reasonably good quality GaAs epilayers.
Abstract: Intermediate buffer films having a low plastic deformation threshold are provided for absorbing defects due to lattice mismatch and/or thermal coefficient of expansion mismatch between a substrate or layer support and an overlayer while concurrently providing a good template for subsequent crystalline growth at the overlayer. This is accomplished for diamond cubic structure substrates, such as Si or Ge or Si on sapphire or crystalline Si on glass, upon which are to be deposited lattice mismatch overlayers, such as, GaAs or ZnSe. Also, zinc blend type substrates, such as GaAs or InP may be employed with such intermediate buffer films. A characteristic of these intermediate buffer films is a substantially lower plastic deformation threshold compared to either the substrate support or the overlayer to be grown heteroepitaxially thereon.
Abstract: A semiconductor epitaxial device structure is described in which there are alternate single crystal layers of semiconductor, insulator and semiconductor. A typical example is InP/CaF.sub.2 /InP. A process for producing such a structure is also described.
Type:
Grant
Filed:
October 31, 1988
Date of Patent:
June 19, 1990
Assignee:
American Telephone and Telegraph Company
Abstract: A method for preparation of a dilute magnetic semiconductor (DMS) film is provided, wherein a Group II metal source, a Group VI metal source and a transition metal magnetic ion source are pyrolyzed in the reactor of a metalorganic chemical vapor deposition (MOCVD) system by contact with a heated substrate. As an example, the preparation of films of Cd.sub.1-x Mn.sub.x Te, wherein 0.ltoreq..times..ltoreq.0.7, on suitable substrates (e.g., GaAs) is described. As a source of manganese, tricarbonyl (methylcyclopentadienyl) maganese (TCPMn) is employed. To prevent TCPMn condensation during the introduction thereof int the reactor, the gas lines, valves and reactor tubes are heated. A thin-film solar cell of n-i-p structure, wherein the i-type layer comprises a DMS, is also described; the i-type layer is suitably prepared by MOCVD.
Type:
Grant
Filed:
September 23, 1988
Date of Patent:
June 19, 1990
Assignee:
The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
Abstract: A method of passivating Group III-V or II-VI semiconductor compound surfaces. The method includes selecting a passivating material having a lattice constant substantially mismatched to the lattice constant of the semiconductor compound. The passivating material is then grown as an ultrathin layer of passivating material on the surface of the Group III-V or II-VI semiconductor compound. The passivating material is grown to a thickness sufficient to maintain a coherent interface between the ultrathin passivating material and the semiconductor compound. In addition, a device formed from such method is also disclosed.
Type:
Grant
Filed:
December 14, 1988
Date of Patent:
June 19, 1990
Assignee:
The United States of America as represented by the United States Department of Energy
Abstract: A planar process for fabricating an optoelectronic integrated circuit device is described. The process includes the in situ formation of laser diode mirror facets comprising the steps of providing a semi-insulating gallium arsenide substrate having thereon layers of n-doped gallium arsenide, n-doped aluminum gallium arsenide, and undoped gallium arsenide; patterning and etching the undoped gallium arsenide layer into a mandrel having substantially vertical walls; establishing insulator sidewalls on the vertical walls; removing the mandrel, thereby exposing the inner walls of the insulator sidewalls and leaving the insulator sidewalls self-standing; removing the aluminum gallium arsenide using the insulator sidewall as a mask; and forming a laser diode within the region between the insulator sidewalls and creating the mirror facets with the inner walls of the insulator sidewalls. Mirror facets formed in accordance with this process are substantially free of contaminants.
Type:
Grant
Filed:
April 19, 1989
Date of Patent:
June 12, 1990
Assignee:
International Business Machines Corporation
Inventors:
Gregory Costrini, Chakrapani G. Jambotkar