Abstract: A probe apparatus has a quartz probe formed of a quartz probe body and a metallic pattern layer formed thereon, the quartz probe body including a plurality of probe portions having a large number of probes corresponding to an electrode array of an object of examination, lead pattern portions continuous individually with the probe portions, and a supporting portion supporting all the lead pattern portions, the quartz probe body being designed so that the longitudinal direction of each probe is inclined with respect to a crystal axis X or Y of a quartz plate by etching a Z plane of the quartz plate perpendicular to a crystal axis Z of the quartz plate, and a tester fitted with the quartz probe by means of an adapter.

Abstract: In a reactive volt-ampere-hour meter, either of a pair of electric signals representative of, respectively, an AC voltage and an AC current fed to a load has the phase thereof shifted by 90 degrees to produce a signal representation of a product of the two signals. A cumulative adder cumulates the resulting product signals. A first carry pulse and a borrow pulse are generated in the event of, respectively, an overflow and an underflow during cumulation and are fed to a first and a second up-down counter, respectively. The first up-down counter up-counts the first carry pulses and down-counts the borrow pulses and generates a second carry pulse when an overflow occurs. The second up-down counter up-counts the borrow pulses and down-counts the first carry pulses and generates a third carry pulse in the event of an overflow. An up-counter up-counts the second and third carry pulses from the first and second up-down counters, respectively.

Abstract: A method and circuit for measuring direct and high duty factor current in a conductor (1) with minimal interference with the operation of a monitored circuit. Current flow in the conductor is magnetically sensed with a transformer T1 having a primary winding connected electrically in series with the conductor (1). The transformer T1 is driven into saturation during a first time interval and brought out of saturation during a second time interval. After the transformer T1 is brought out of saturation, an output signal is provided which is proportional to the flow of current in the conductor (1).

Abstract: An universal connector employing a plurality of double female contacts installed with a certain clearance in receptacles of a body which may be suspended in a coupling position with a plurality of male contacts arranged on the top face of an EWS probe card and with a plurality of male contacts arranged on the bottom surface of a test card in a test-on-wafer station, provides a multicontact universal connection for any pair of so equipped cards of the inventories of probe cards and of test cards of the station. The connection is easily set up and exhibits excellent stability and uniformity characteristics of the electrical couplings, while reducing sensibly the time necessary for the setting-up and debugging of the test station for initiating a certain cycle of testing-on-wafer. The stability and reproducibility of the electrical couplings provided by the connection increases the precision of the measurements of critical parameters of the integrated devices with a positive effect on the production yield.

Abstract: A signature compression circuit is employed to test a logic circuit. The signature compression circuit comprises a linear feedback shift register (LFSR) that receives test data from the logic circuit, compresses the data and generates a signature (resultant data) of the test. Output terminals of the logic circuit are grounded via MOS transistors, respectively. When the MOS transistors are OFF, the test data are received by and compressed in the signature compression circuit to form a signature (resultant data) of the test, and the signature in the signature compression circuit is shifted when the MOS transistors are ON.

Abstract: A polyphase reversal detection and correction system which operates over a wide range of line frequencies and produces an automatic phase correction for maintaining proper phase sequence to a rotating device. The system includes a circuit arrangement for developing peak integrated signals by comparing the relation of various input phases, and developing an integrated reference phase signal. The input phase signals and the reference phase signals are compared to determine and correct the input phase sequence.

Abstract: A detector circuit for detecting a phase signal of a polyphase alternator for a battery charge regulator in a motor vehicle. The circuit includes differential signal amplitude discriminator means for discriminating between at least one pair of phase signals delivered by the alternator. The circuit is applicable to multifunction or to dual-purpose battery charge regulators in motor vehicles.

Abstract: A first cam is fixedly provided on a base plate and a position-adjustable second cam is disposed apart from the first cam. A block movable by a driver is disposed between the first and second cams. While abutting against the first cam, the movable block is held at a fixed first position, and while abutting against the second cam, it is held at a second position defined by the second cam. The second position is preset, as desired, by adjusting the translational and rotational positions of the second cam and the movable block is switched by the driver between the first and second positions.

Abstract: An integrated system is described for testing, marking, inspecting and shipping completed semiconductor integrated circuit parts in a modified standard shipping tray by the combined use of a novel tray cover and an appropriately designed burn-in board assembly. A specially designed tray cover is placed on the modified shipping tray containing multiple integrated circuit parts which have been encapsulated and singulated. The cover is designed to hold the parts securely and precisely in specific individual location. Openings in the cover permit marking and inspecting of the parts by known means, when desired. A burn-in board is appropriately connected to the exposed leads of the parts, from beneath the tray and burn-in and other tests are conducted. Defective parts are identified and replaced. The special cover and burn-in board are removed from the shipping tray, which is then covered with a standard cover or stacked with other completed trays, to be stored or shipped.

Abstract: A probe card (8,18) for testing unencapsulated semiconductor devices (7,17) wherein the probe card (8,18) is made from a semiconductor material (10). A plurality of pyramidally shaped conductive protrusions or probe tips (11,41) project from the surface of the probe card (8,18) to mate with electrode pads on an unencapsulated semiconductor device (7,17) to be tested. The probe tips (11,41) are formed using standard etch techniques, hence they can be configured to contact electrode pads that reside on the unencapsulated semiconductor device in either a peripheral or area array. Further, the probe card (8,18) is capable of testing integrated circuits in either wafer or die form.

Abstract: A contactor including a test fixture for receiving an integrated circuit chip mounted in a carrier package and for providing contacts with electrical conductor pads of the package to facilitate electrical testing thereof is provided. The test fixture comprises a plurality of contact members mounted to a spring-loaded plunger. Each contact member includes a strip of conductive fingers with protruding contacts for springing engagement with the conductor pads of the carrier when the plunger is depressed. The test fixture resides in a cavity of a housing unit and is aligned with a central aperture therein. In operation, a ram holding the carrier lowers it through the central aperture of the housing unit and onto the plunger. The carrier is then pressed against the plunger, causing it to depress. This allows the carrier conductor pads to frictionally engage the protruding contacts of the conductive fingers, thus effectuating electrical contact.

Abstract: A shielded electrical contact spring probe assembly for testing electrical printed circuit boards includes an outer barrel having an open end and a remote end, an inner core of dielectric material coaxially mounted within the barrel, and an electrical contact spring probe reciprocally seated within an axial bore in the core. A shield surrounds the core between the barrel inner wall and the core and extends the full length of the barrel. A shielding plunger is located in a cylindrical space between the barrel and the shield. The probe assembly remote end is for connection of an electrical transmission line, or in an alternative embodiment, inserting a second electrical contact spring probe within the core. The configuration and material of the core and the shield enable the entire probe assembly to maintain a selected impedance.

Abstract: An electric current sensor assembly and method. A housing containing a Hall effect device is provided with at least one curved, concave surface for placement against a wire carrying a current. The housing is attached to the wire by a strap that fastens around the housing and the wire and fits in grooves in the housing. When the assembly is installed, the Hall effect device is positioned so that the magnetic field produced by current in the wire passes through the Hall effect device and produces an electric signal proportional to the amplitude of the current in the wire. A set screw is movably mounted in the housing adjacent the Hall effect device to adjust the sensitivity of the current sensor assembly.

Abstract: A proper apparatus includes a test head for generating a test signal. A probe card is fixed removably on the test head. The probe card supplies the test signal to a test piece when the probe card electrically contacts the test piece, and tests electric characteristics of the test piece.

Abstract: A semiconductor test apparatus for testing the characteristics of a semiconductor device having a plurality of output pins includes a plurality of level determination devices, arranged in correspondence with respective output pins of the semiconductor device, for determining the output levels from corresponding output pins, a data preparation device for preparing combination data by selectively combining the outputs of the plurality of level determination devices, a retaining device for retaining combination data prepared by the data preparation device, at least two storage devices, each for storing set values, at least two comparison devices, arranged in correspondence with respective storage devices, each for comparing combination data retained in the retaining device with the set values stored in the corresponding storage devices, and a determination device for determining the characteristics of the semiconductor devices from the comparison results of the comparison devices.

Abstract: A socket for testing a plug-in type semiconductor having two rows of flat pins includes an elongated base having two rows of resilient conductive clamps positioned on the base and an elongated cover mounted on the base and having rows of openings correspondingly formed in the cover with respect to the conductive clamps. A push member is movably mounted between the cover and the base. A camming rod member is mounted between the cover and base for actuating the push member to depress the resilient conductive clamps, urging the resilient conductive clamps to contact the flat pins of the semiconductors when the flat pins are plugged into the socket. Each of the resilient conductive clamps has clamping faces parallel to the contacting faces of the flat pins of the semiconductor.

Abstract: The present invention provides a method of detecting a floated lead of an electrical component which involves the steps of positioning an electrical component above a laser device on the way of feeding the electrical component to a substrate by sucking the electrical component to a nozzle of a pick and place head; radiating a laser light from a laser device toward the leads of the electrical component thereby to detect the heights of three points of the leads; and then calculating a virtual plane including the three points of the leads to obtain a height difference of the respective leads with respect to the virtual plane.

Abstract: Scan testing of asynchronous logic circuitry is facilitated by gating off the asynchronous inputs to flip-flops during scan testing. If desired, the asynchronous inputs which are gated off in this manner may themselves terminals or scan registers during testing. Alternatively, the asynchronous inputs which are gated could be tested by selectively enabling the signals at strategic points during scan testing. The number of input terminals required to control the test mode may be reduced by providing registers for storing test control signals applied to normal input terminals at the beginning of a test cycle. Once these test control signals are stored, the normal input terminals are free to return to their normal use.

Abstract: A testing circuit for testing field-effect transistors of, for example, a random access memory includes weak N-channel pull-down field-effect transistors and weak P-channel pull-up field-effect transistors for testing field-effect transistors of opposite type to be tested. The weak field-effect transistors are placed in series with the opposite type of field-effect transistors. When the series coupled field-effect transistors are turned on, the voltage at the common node of the field-effect transistors is sensed to determine whether the common node is pulled-up or pulled-down in potential to indicate whether a field-effect transistor under test is functional.

Abstract: The measuring device is incorporated in a projection of the casing. Its auxiliary electrode forms the high-voltage capacitor of a capacitive voltage divider together with the internal conductor, and is connected with the casing via a low-voltage capacitor. The measurement connection emerges from the projection in gas-tight manner, and is connected to a display or measuring device. In order to be able to detect high-frequency compensation operations, also, the low-voltage capacitor consists of two nested cones with a solid dielectric. A terminal resistor which is connected to the internal conductor of a gas-tight coaxial connector is arranged in the inside cone. The terminal resistor is adapted to the characteristic impedance of the coaxial connector and that of the measurement connection. The measuring device with the auxiliary electrode can be inserted into tubular gas connections in the casing of a high-voltage conductor, especially in compressed gas-insulated, encased high-voltage switch conductors.