Abstract: A device to assist in setting up the pitch, roll, yaw and standoff of a read head relative to a scale, so as to improve the quadrature relationship of its outputs. Two superimposed Lissajous figures are produced on an oscilloscope screen. One of these figures is a rotation or reflection of the other. The read head is adjusted until the Lissajous figures coincide. Simpler, less accurate arrangements are also described, in which a variable DC output signal is produced which represents the radius of a hypothetical Lissajous derivable from the signals. The read head is then adjusted to give a constant DC output, representing a constant Lissajous radius.

Abstract: A disposable integrated circuit test head (34) communicates a plurality of test signals between test nodes (20) of an integrated circuit and test circuitry. Disposable high-density test head (30) comprises signal platform (24) which includes tape layer (24) and interconnection lines (28). Interconnection lines (28) include signal leads (30) and bumps (32). Interconnection lines (28) coupled with test nodes (20) to electrically connect test nodes (20) with the test circuitry and communicate test signals between test nodes (20) and the test circuitry. Pusher block (36) engages signal platform (24) at tape layer (26) opposite interconnection lines (28) and applies force through tape layer (24) to interconnection lines (28). This allows positive engagement of interconnection lines (28) with test nodes (20). Pusher block (36) comprises rigid force applying plate (38) which adheres to compliant layer (40) at junction (42).

Abstract: An integrated circuit (11) is tested at a high microwave frequency through the use of a laser beam (19) having a repetition rate much lower than the test frequency. Electric fields of the test signal extend into an electro-optic material (12) that modulates part of the laser beam. Another part of the laser beam is converted to an electrical pulsed signal that is applied to a microwave mixer (33) along with part of the test frequency signal. A harmonic of the pulsed signal mixes with the test frequency to yield a difference frequency that can be used as a phase reference for analyzing the phase of the test signal. The component pulses (30) of the laser beam have a pulse width which is much shorter than the separation of the pulses, which make it inherently rich in higher harmonics of the fundamental pulse repetition rate.

Abstract: An arrangement for electrical measurement ascertains "subordinate" quantities, and is also "main" quantities with great accuracy and safety against falsification. An active energy to be measured is a main quantity, and a subordinate quantity is at least one of the following quantities: effective value of the voltage (u.sub.N) or of the current (i.sub.N), volt hours, volt square hours, ampere hours, ampere square hours, active power, reactive power, reactive energy, apparent output, apparent energy or power factor. The arrangement may comprise a voltage sensor (8), a voltage/current-converter (9), a multiplier (10), a current/voltage-converter (11), two analog/digital-converts (12 and 15), a signal/frequency-converter (13), a counter (14), an interface circuit (4), and an indicator (7), wherein the current/voltage-converter (11) consists of a constant current source (16) and a further multiplier (17).

Abstract: An optical current transducer for measuring current in a high voltage transmission line includes a temperature compensated light source of nominal predetermined intensity and wavelength, a Faraday rotation device where Faraday rotation impressed on the light exiting the light source is proportional to the intensity of the electrical current to be measured. A hermetic tank encloses the Faraday rotation device to provide protection from the environment. An electronic circuit converts the optical output of the Faraday rotation device to an electrical signal in direct proportion to and in phase with the current to be measured.

Abstract: A digital power meter achieves enhanced accuracies through the utilization of a sequence of meter stage improvements. Such improvements include the utilization of a digital phase shift based cycle phase realignment following the scaling function of the meter. The cycle phase corrected signals are digitized utilizing a sampling procedure wherein two samples of both current and voltage are taken within a precisely defined sampling interval. These samples are improved by the application thereto of a truncation correction and are averaged prior to being combined to provide quantity signals such as watt, VAR, volt, amperes, and the like. By developing subinterval transfer of components of these quantities to an overflow register, errors otherwise occurring at this stage of metering are substantially eliminated.

Abstract: A method of and an apparatus for measuring small electrical signals with a computer-supported error-compensating measuring circuit (10) which includes a multiplexer (13), a following amplifier (15), an analog-to-digital converter (16) and a calculation device (17). The multiplexer has at least one pair of measuring signal input terminals (n-1, n) and one pair of zero volt input terminals (A, B) and connects them repeatedly to the following amplifier (15) for signal recording. Memories for digitized signals are present in order to correct, by means of the calculation device, actual measuring signals with correction values determined from a set of first measured signals so that a precise indication value is produced independent of offset errors and their variation.

Abstract: A handler for semiconductor devices has a positioning wheel with a number of platforms that hold semiconductor devices, a mechanism for rotating the positioning wheel, and a mechanism for elevating and lowering the platforms. A semiconductor device is inserted into one of the platforms, the positioning wheel rotates until the platform is aligned with the leads of a semiconductor device tester. The platform is then raised placing the leads of the tester in contact with the semiconductor device. After testing is complete, the platform is lowered to the surface of the wheel and the wheel is rotated further to align the platform with an apparatus for storing semiconductor devices. The tested semiconductor device is ejected from the platform into the sorting apparatus.

Abstract: A cable assembly (A) is disclosed for a logic analyzer which comprises a flat woven cable (14) having an analyzer connector (18) and a probe connector (22). The analyzer connector includes a printed circuit board (32) and the probe connector includes a printed circuit board (34). Resistor-capacitor networks (D, E) are carried on respective PC board (32, 34) for extending the effective bandwidth of the cable assembly. A cable assembly (A") is disclosed having a low capacitance provided by high gauge signal conductors (92) and increased center-to-center spacing between the signal conductor and exclusively associated ground wires (94a, 94b). Resistor netowkrs (D', E') provide a high input resistance to the cable assembly. An interface shroud (B) connects terminal (C) of probe leads (10) to probe connector (22). A plurality of exterior grooves (54) are formed on an upper wall (44) of interface shroud (B) which receive locking arm (62) of terminal body (60).

Abstract: A method and apparatus is disclosed to prevent aliasing while sampling a low frequency analog input signal. A clock produces a series of electrical pulses at a predetermined frequency F.sub.o. An analog-to-digital ("A/D") converter samples the input signal at each clock pulse. Sample selection means randomly select one clock pulse from each successive series of N clock pulses, where N is a predetermined integer much greater than one. A memory receives the digital output values from the A/D converter, but only stores the current digital output value at each selected clock pulse. As a result, the long-term average frequency of sample storage is substantially equal to F.sub.o /N, but the interval between successive samples is random (i.e. the interval between successive samples is typically not equal to N clock pulses).

Abstract: A method and apparatus for testing the proper operation of the optical elements in the optical detection circuit of an electronic register in an energy meter. The light emitter circuit is periodically pulsed adequately to turn the emitters to the on condition, and a comparison circuit is provided in which the voltage across a monitor point in circuit with the light emitters and a switching circuit is monitored both before and after each pulse. The absence of a voltage change upon pulsing the light emitter circuitry is used to generate a first error or failure signal. The light detector is read prior to each pulse to determine if unprogrammed light is being received prior to the pulsing of the light emitter as an indication of tampering with the accurate reading of the energy meter, and a second error signal is generated in response to unprogrammed light.

Abstract: A test mode input detection circuit for a semiconductor device comprises a first circuit including a group of transistors and a load element, the transistors and load element being connected in series between a power source and an input terminal, a node between the transistor group and the load element forming an output terminal of the first circuit; a second circuit including a transistor whose gate receives an output from the output terminal of the first circuit, and a transistor whose gate receives a power source voltage, these transistors being connected in series between the power source and a ground, a node between the transistors forming an output terminal of the second circuit; and an inverter circuit for providing a test mode signal in response to an output of the second circuit.

Abstract: A method for optically measuring an AC electric field or an AC voltage is disclosed. According to the method, a light beam emitted from a light-emitting portion is transmitted through a sensing head including a Pockel's-effect element while an AC electric field to be measured is applied to the Pockel's-effect element, so that the light beam is modulated by the applied AC electric field. The transmitted light beam is then received by a light-detecting portion, while in turn produces an electric signal corresponding to the received light beam. From the electric signal are selected a first component (E.omega.) having a same angular frequency as that of the AC electric field, and a second component (E.sub.2 .omega.) having an angular frequency which is two times that of the AC electric field. Then, a ratio (E.sub.2 .omega./E.omega.

Abstract: A method and apparatus for analyzing a semiconductor device having a diode formed therein. In its broadest sense, the invention involves irradiating the semiconductor device with electromagnetic radiation while monitoring the leakage current output from the diode contained in the semiconductor device. If the semiconductor device is present and properly soldered to the printed circuit board, an increase in the leakage current will be observed during the irradiation process. The increase in leakage current is also representative of the presence of intact bond wires at both the pin under test and the ground pin. The invention in a preferred form is shown to include a voltage source, electrically connected to the diode, for biasing the diode in a reverse direction, a current monitor, connected to monitor the leakage current from the diode and an electromagnetic radiation generator, positioned to provide electromagnetic radiation incident on the semiconductor device.

Abstract: A tester for semiconductor devices such as IC memory chips is provided with an improved test waveform simulating function. The test waveform simulating circuit comprises relays for selecting one of the outputs of a plurality of drivers. The driver output selected by a relay is compared by a comparator with reference levels at reference times recurring at short intervals, thereby producing information bits corresponding to the waveform of the driver output which is displayed as a two dimensional image through a memory and display.

Abstract: A method of inspecting an integrated circuit comprises the steps of supplying an alternating signal to a plurality of different circuits in the integrated circuit, and measuring a signal corresponding to the alternating signal, which is output from each of the circuits.

Abstract: An improved printed circuit board inspection apparatus in which its inspection probes are made to contact with a selected part or printed circuit section on a printed circuit board for making an inspection on the selected part or printed circuit section in terms of their performances or functions. The printed circuit board inspection apparatus uses two guide sets each having at least one pair of inspection probes and driving means to drive said inspection probes in X- and Y-directions to selected coordinate positions in the printed circuit board. A central processing unit controls said driving means so that the inspection probes of one guide set are used to make an inspection at a selected coordinated position while the other inspection probes are traveling to another selected coordinate position for subsequent inspection according to a predetermined program.

Abstract: An optical current transformer particularly useful for a fault location system for a power supply system and substation, including a casing which can be detachably secured to a plurality of wire conductors which conduct currents of the same phase. Within the casing a plurality of Rogowsky coils are arranged such that when the casing is secured to the wire conductors, each Rogowsky coil is wound around respective wire conductors. The Rogowsky coils are connected in series with an air-core coil and an optical current sensor having a Faraday element is arranged within a space of the coil such that the Faraday element is subjected to a magnetic flux generated by the coil. A magnitude of the magnetic flux is optically detected by the Faraday element to measure a total sum of currents conducting along the wire conductors.

Abstract: A semiconductor integrated circuit chip has an identification circuit connected between a power voltage supply terminal and one of the input terminals of the chip. The identification circuity includes a voltage limiter to limit the input potential difference between the power voltage supply terminal and the input terminal to a predetermined voltage level. The identification circuit further includes an option device connected to the voltage limiter to provide identification information of the chip. According to the identification circuit, chip identification testing may be achieved with existing input/output and power supply terminals, thereby eliminating the need for extra test and diagnosis pins or additional identification equipment employed during testing.

Abstract: An automatic circuit tester (10) employs a scanner (20) embodied in a group of interconnected scanner boards (46, 47) that provide switching by means of mechanical relays. The scanner boards plug simultaneously into respective instrument boards (44) and into a common scanner bus (50) separate from an instrument bus (38) that carries the signals that control the instruments on the instrument boards (44). The scanner bus provides a common pathway for signals to travel between instruments or system pins to which one scanner board is connected and those to which another is connected. It also provides scanner-control paths so that the instrument boards to which the scanner boards are connected to not need to provide such paths and thus do not need to be custom-designed for the particular tester in which they are used.