Abstract: A method of etching structural depressions in a substrate comprises aligning the ferroelectric domains within the substrate to domain orientations selected from two or more possible domain orientations, whereby the rate at which substrate material is etched by an etchant varies with the domain orientation of the substrate material; and exposing the substrate to the etchant.

Abstract: There is provided a method for removing conductive portions, comprising the steps of: a first process for removing a conductive portion formed on a dielectric using a laser; and a second process for removing an affected layer produced in the removed portion by the laser using a short pulse laser. According to the above described method, the number of steps therein is reduced, conductive portions are removed without using a large number of apparatuses, and deterioration of “Qo” does not occur.

Abstract: The present invention relates to micro electromechanical systems (MEMS) devices and more specifically to a process for manufacturing MEMS devices having at least one suspended structural element. The present invention seeks to provide an improved method for manufacture of MEMS devices having improved safety and increased yield and throughput compared to conventional EDP immersion process techniques. MEMS devices are made using a modified dissolution process that removes, in a selective etch step, inactive silicon to release an active silicon device from a sacrificial substrate. The present invention uses a selective etchant in conjunction with a commercial spray acid processing tool to provide a dissolution process with improved throughput, improved repeatable and uniform etch rates and reduction in the number of processing steps and chemical containment for improved safety.

Abstract: A process for plasma etching metal films comprising the steps of forming a noble gas plasma, then transporting the noble gas plasma to a mixing chamber. An organohalide is added to the noble gas plasma in the mixing chamber. The organohalide is selected to have a vapor pressure allowing the formation of activated complexes to etch the metal films and form organometallic compounds as the etch byproducts. The activated complexes thus formed are transported downstream to an etching chamber. In the etching chamber the selected substrate is exposed to the activated complexes, causing the substrate to be etched and organometallic compounds to be formed as byproducts from the reaction of the activated complexes and etching of the substrate. The organometallic byproducts can then be removed from the etch chamber.

Abstract: A method includes providing a first wafer having at least one process layer formed thereon. A portion of a first process layer is removed using a polishing process. A portion of at least one of the first process layer and a second process layer is removed using a buffing process for a pre-selected duration of time. A buffed surface of at least one of the first process layer and the second process layer is inspected to determine a post-buff defect density for the inspected process layer. The duration of the buffing process is adjusted for a second wafer based on the determined post-buff defect density of the inspected process layer. A system includes a processing tool, at least one metrology tool, and a process controller. The processing tool is adapted to remove at least a portion of a first process layer of a first wafer using a buffing process for a pre-selected duration of time.

Abstract: A method for removing a formation of oxide of titanium that is generated as a byproduct of a process that forms cobalt disilicide within an insulated-gate field effect transistor (FET). The method applies a chemical reagent to the FET at a predetermined temperature, and for a predetermined period of time, necessary for removing the formation, wherein the reagent does not chemically react with the cobalt disilicide. A reagent that accomplishes this task comprises water (H2O), ammonium hydroxide (NH4OH), and hydrogen peroxide (H2O2), wherein the NH4OH and the H2O2 each comprise approximately 4% of the total reagent volume. An effective temperature is 65° C. combined with a 3 minute period of application.

Abstract: A chemical etching system provides a mixture of sulfuric acid and hydrogen peroxide and serves as the etchant for removing residual copper from an edge bevel region of a semiconductor wafer. The etching system includes a dilution module where concentrated sulfuric acid and concentrated hydrogen peroxide are diluted to the appropriate concentrations and then stored. To reduce the likelihood that oxygen bubbles (from hydrogen peroxide decomposition) will appear in the etchant solution, stored sulfuric acid and hydrogen peroxide are mixed immediately prior to use. In this manner, the dissolved oxygen concentration in the hydrogen peroxide decreases well below the saturation level.

Abstract: A method and apparatus for dry etching changes at least one of the effective pumping speed of a vacuum chamber and the gas flow rate to alter the processing of an etching pattern side wall of a sample between first and second conditions. The first and second conditions include the presence or absence of a deposit film, or the presence, absence or shape of a taper angle. Various parameters for controlling the first and second conditions are contemplated.

Abstract: A method of removing polishing residue from a substrate includes placing the substrate in a pressure chamber, pressurizing the pressure chamber, and maintaining the supercritical fluid in contact with the substrate until the polishing residue is removed from the substrate. Following removal of the polishing residue from the substrate, the pressure chamber is flushed and vented.

Abstract: A top IC die is removed from a bottom IC die in a multichip IC package while substantially preserving interconnect of the bottom IC die for proper fault isolation during testing of the multichip IC package. The top IC die is attached to the bottom IC die with a die attach material within the multichip IC package. The top IC die has a first area that is smaller than a second area of the bottom IC die, and the top IC die is disposed inward from any edge of the bottom IC die such that a perimeter area of the bottom IC die is outside the top IC die. A predetermined area of the top IC die is exposed with the predetermined area being smaller than the first area of the top IC die. The predetermined area is disposed inward from any edge of the top IC die. The first area of the top IC die outside the predetermined area remains covered, and the perimeter area of the bottom IC die remains covered.

Abstract: A method and apparatus for enhancing the etch characteristics of a plasma formed in a remote plasma generator. A plasma formed in a remote plasma generator (27) is flown through a tube (62) to a plenum (60) where it is diluted to form a plasma mixture before flowing the plasma mixture into a processing chamber (15). The plasma mixture is used to clean deposits from the interior surfaces of the processing chamber, or can be used to perform an etch step on a process wafer within the processing chamber. In one embodiment, a plasma formed from NF3 is diluted with N2 to etch residue from the surfaces of a processing chamber used to deposit silicon oxide glass. Diluting the plasma increased the etching rate and made the etching rate more uniform across the diameter of the processing chamber.

Abstract: Textured silicon solar cells and techniques for their manufacture utilizing metal sources to catalyze formation of randomly distributed surface features such as nanoscale pyramidal and columnar structures. These structures include dimensions smaller than the wavelength of incident light, thereby resulting in a highly effective anti-reflective surface. According to the invention, metal sources present in a reactive ion etching chamber permit impurities (e.g. metal particles) to be introduced into a reactive ion etch plasma resulting in deposition of micro-masks on the surface of a substrate to be etched. Separate embodiments are disclosed including one in which the metal source includes one or more metal-coated substrates strategically positioned relative to the surface to be textured, and another in which the walls of the reaction chamber are pre-conditioned with a thin coating of metal catalyst material.

Abstract: A gas etchant composition and a method for simultaneously etching-back silicon oxide and polysilicon at substantially similar etching rates are used for manufacturing semiconductor devices. The gas etchant composition to be utilized for dry-etching includes carbon tetrafluoride gas and nitrogen gas mixed at a ratio of 25-40:1, while its etching rate ratio of polysilicon to silicon oxide is 0.8-1.2:1. Since polysilicon and silicon oxide are simultaneously etched by a single etching equipment utilizing the gas etchant composition in a single process, a composite layer having both polysilicon and silicon oxide can be effectively removed to obtain a resulting surface having a good profile. As a result, the formation of a polysilicon bridge caused by detachments of polysilicon particles in subsequent manufacturing processes can be prevented.

Abstract: A waferless cleaning process of a dry etcher in semiconductor field, comprises the steps of: removing a batch of production wafers out of the chamber of the dry etcher, automatically starting waferless plasma cleaning to clean the chamber when at least a process factor reaches a preset condition, and loading next batch of production wafers into the chamber to undergo a normal production procedure. The process extends the meantime between wet clean (MTBC), prevents high particle counts, stabilizes the chamber condition, and improves process performance, tool uptime and throughput. The invention is characterized by not requiring any dummy wafers. Thus, the present invention does not need an operator. Besides, the present invention is capable of mixing different types of products.

Abstract: Processing methods and systems using vapor phase processing streams made from a liquid phase source and feed gas. Some versions use multiple liquid sources and multiple vapor generators which each produce vapors which are mixed. Some of the vapor generators use metering pumps to inject a controlled flow of liquid into a controlled flow of feed gas. In some embodiments the vapors are exsiccated to reduce saturation before being introduced as a processing chamber vapor mixture into a processing chamber. The semiconductor pieces are preferably rotated within the processing chamber and can be processed in batches.

Abstract: The present invention includes a method for reducing dishing of an integrated circuit interconnect, comprising the steps of providing excess interconnect material above a damascene feature in a substrate and planarizing the substrate and interconnect material to obtain an interconnect in the substrate.

Abstract: A new pattern is provided for the bus lines that are used to facilitate plating of layers of electrical lines that form a Printed Circuit Board. Where Prior Art bus lines have a straight-line geometry, the bus lines of the invention have any geometry that is not a straight-line geometry. The geometry of the bus lines of the invention can be of any design as long as this design allows for interrupted cutting of the bus line, that is the cutting tool does not, during the process of cutting the bus line, make constant and continuous contact with the bus line.

Abstract: A corrosion-resistant system and method for a plasma etching apparatus are provided which are capable of reducing a corrosion or erosion phenomenon of a discharge tube, equipment and/or elements in a chamber of the plasma etching apparatus which is used for localized etching. A micro wave M is oscillated from a micro wave oscillator 20 toward a mixed gas of CF4 and O2 in a quartz discharge tube 110 to thereby produce plasma discharge. The micro wave oscillator 20 is controlled in an on-off manner by means of a pulse generator 21, to thereby oscillate a pulsed micro wave M. As a result, it is possible to reduce the erosion of the quartz discharge tube 110 caused by an active species gas G generated by the plasma discharge. Preferably, a corrosion-resistant oil A is filled in the chamber 100 for preventing an X-Y drive mechanism 130, etc., therein from being corroded or eroded by the active species gas G diffusing in the chamber 100.

Abstract: A method of manufacturing semiconductor devices using an improved planarization processes for the planarization of the surfaces of the wafer on which the semiconductor devices are formed. The improved planarization process includes the formation of a flat planar surface from a deformable coating on the surface of the wafer using a fixed flexible planar interface material contacting the deformable coating.

Abstract: A method of planarizing a semiconductor that includes (i) a substrate material, (ii) a first reflective substance positioned on the substrate material, (iii) an intermediate material positioned on the first reflective substance, wherein a channel is defined in a structure which includes the substrate, the first reflective substance, and the intermediate material, and (iv) a second reflective substance positioned on the intermediate material and in the channel is disclosed.