Patents Examined by Xiaoliang Chen
  • Patent number: 11252824
    Abstract: Disclosed are a method for fabricating a printed circuit board wherein through-holes are formed in an organic substrate, followed by forming micro-circuit patterns through sputtering and plating, whereby the printed circuit board has low permittivity properties and enables high-speed processing, and a printed circuit board fabricated thereby. The disclosed method for fabricating a printed circuit board comprises the steps of: preparing a base substrate; forming a through-hole perforating the base substrate; forming a thin seed layer on the base substrate and in the through-hole; forming a thin plate layer on the thin seed layer; and etching the thin seed layer and the thin plate layer to form a micro-circuit pattern, wherein the base substrate is one selected from an organic substrate, FR-4, and Prepreg.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: February 15, 2022
    Assignee: AMOGREENTECH CO., LTD.
    Inventor: Sung-Baek Dan
  • Patent number: 11232904
    Abstract: A taping reel with a plurality of coil components packed in the tape reel, comprising a tape including a plurality of pockets arranged along a longitudinal direction and each having one of the coil components stored therein, and a reel around which the tape is wound. The coil components each include a core including a winding core part, and a coil wound around the winding core part and including a plurality of wires. The coil includes a twisted wire portion in which the plurality of wires is twisted together. The plurality of coil components includes first coil components having the twisting direction of the twisted wire portion opposite to the twisting direction of the twisted wire portion of other coil components.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: January 25, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takashi Sukegawa, Masashi Miyamoto, Ryota Hashimoto, Kentaro Yamaguchi, Chihiro Yamaguchi
  • Patent number: 11234325
    Abstract: A printed circuit board including a set of five layers encompassing a breakout area is described. The set includes a first ground layer, a first signal layer having a first conductive layer within the breakout area, a second ground layer having conductive material, a second signal layer having a second conductive layer within the breakout area, and a third ground layer. The second ground layer having a void forming a differential pair being two parallel traces, and being separated into a first portion positioned within the breakout area and a second portion outside of the breakout area. The differential pair having a first width and a first spacing within the breakout area and a second width and second spacing outside of the breakout area, with the second width greater than the first width. The first and second conductive layers forming a first ground plane and a second ground plane.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: January 25, 2022
    Assignee: Infinera Corporation
    Inventors: Aneesh Kachroo, Mithun Gopal V V, Navneeth Jayaraj
  • Patent number: 11227825
    Abstract: Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 18, 2022
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Mathew J. Manusharow, Krishna Bharath, William J. Lambert, Robert L. Sankman, Aleksandar Aleksov, Brandon M. Rawlings, Feras Eid, Javier Soto Gonzalez, Meizi Jiao, Suddhasattwa Nad, Telesphor Kamgaing
  • Patent number: 11224128
    Abstract: Provided are a device and method for molding an FPC and a plastic part, which belongs to the field of FPC processing technology. The method for molding an FPC and a plastic part includes preprocessing a preform and connecting an FPC to the outer cylindrical surface of the preform; and forming a coating on the outer cylindrical surface of the preform by using the device for molding an FPC and a plastic part.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: January 11, 2022
    Assignee: DONGGUAN LUXSHARE PRECISION INDUSTRY CO. LTD.
    Inventors: Jiaoping Cao, Zhenhua Liu, Yun Feng
  • Patent number: 11224131
    Abstract: A method and device are provided. The device includes a system component that has a circuit board that includes a cable connection portion. The cable connection portion is disposed on and extends along a mounting surface, and includes board pads disposed on the mounting surface within the cable connection portion. The board pads define corresponding board contact surfaces for electrical coupling with connector pads, and include a board adhesive material disposed on the corresponding board contact surfaces.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: January 11, 2022
    Assignee: LENOVO (SINGAPORE) PTE. LTD.
    Inventors: Robert James Kapinos, Robert James Norton, Jr., Russell Speight VanBlon, Scott Wentao Li
  • Patent number: 11224125
    Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation b
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: January 11, 2022
    Assignee: DexCom, Inc.
    Inventors: Sean Frick, Louis Jung, David Lari
  • Patent number: 11224119
    Abstract: A resin multilayer substrate includes a plurality of insulating resin base material layers and a plurality of conductor patterns provided on the plurality of insulating resin base material layers. The plurality of conductor patterns include a plurality of signal lines provided at positions not overlapping each other as viewed from a laminating direction of the insulating resin base material layers, and a ground conductor overlapping the plurality of the signal lines as viewed from the laminating direction. Openings are provided in the ground conductor and, as viewed from the laminating direction, an aperture ratio is higher in an inner zone that is sandwiched between two signal lines than in an outer zone of the two signal lines.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: January 11, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiromasa Koyama
  • Patent number: 11219129
    Abstract: A component carrier with a stack including at least one electrically insulating layer structure and at least one electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 ?m.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: January 4, 2022
    Assignee: AT&S (China) Co. Ltd.
    Inventor: Mikael Tuominen
  • Patent number: 11212914
    Abstract: The present disclosure provides a circuit board, including a substrate on which a first conductive layer and an electronic device are disposed, wherein the first conductive layer is disposed on a first surface of the substrate, and wherein a bottom end of the electronic device is disposed on the first conductive layer through the substrate. The present disclosure provides a display device.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: December 28, 2021
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xingjun Shu, Jianwu Wu, Xi Chen, Xinda Li, Shengwei Yang, Yadong Zhang, Jianye Tang, Jiaqiang Wang
  • Patent number: 11212922
    Abstract: The disclosure provides a method for manufacturing a circuit board, which includes: (1) providing a substrate, forming a through hole in the substrate; (2) filling the through hole with a conductor to form a conductive hole; (3) providing a peelable film to cover the substrate; (4) forming a groove by laser, the groove including a concave portion; (5) performing a surface treatment on a wall of the groove; (6) removing the peelable film; (7) forming a seed layer; (8) making a circuit layer to obtain a circuit board unit, the circuit layer including a connection pad, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor; (9) repeating step (1) to step (8) at least once; and (10) laminating the circuit board units. The disclosure also provides a circuit board.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 28, 2021
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited.
    Inventors: Ming-Jaan Ho, Xian-Qin Hu, Fu-Yun Shen, Hsiao-Ting Hsu, Yong-Chao Wei
  • Patent number: 11203704
    Abstract: Hot melt processable adhesive compositions to mask electronic components include at least one block copolymer, at least one tackifying resin, at least one semi-crystalline polyolefin polymer, at least one plasticizer, and at least one anti-oxidant. The adhesive composition is a hot melt processable pressure sensitive adhesive composition that is thermally stable, such that the composition when disposed on a surface withstands heating to 260° C. without degradation or flowing, remains optically transparent, and after heating to 260° C. remains cleanly removable.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: December 21, 2021
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Richard Yufeng Liu, Yi Lin Sim, Chin Teong Ong, Roger A. Grisle, Michael C. Martin, Nathaniel I. Lehn
  • Patent number: 11201137
    Abstract: The power on wafer assembly can include: a compliant connector, an integrated circuit, a printed circuit board (PCB), a power component, and a set of compliant connectors. The power on wafer assembly can optionally include: a compression element, a cooling system, a set of mechanical clamping components, and a power source. However, the power on wafer assembly can additionally or alternately include any other suitable components.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: December 14, 2021
    Assignee: Cerebras Systems Inc.
    Inventor: Jean-Philippe Fricker
  • Patent number: 11197368
    Abstract: A circuit board with reduced dielectric losses enabling the movement of high frequency signals includes an inner circuit board and two outer circuit boards. The inner circuit board includes a first conductor layer and a first substrate layer. The first conductor layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductor layer and defines first through holes which expose the signal line. Each outer circuit board includes a second substrate layer and a second conductor layer. The second substrate layer abuts the inner circuit board and defines second through holes which are not aligned with the first through holes, partially surrounding the signal line with air which has a very low dielectric constant. A method for manufacturing the high-frequency circuit board is also disclosed.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: December 7, 2021
    Assignees: Avary Holding (Shenzhen) Co., Limited, QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Fu-Yun Shen, Xian-Qin Hu
  • Patent number: 11191168
    Abstract: A composite circuit board includes a composite circuit board unit, a first solder mask formed on a first metal protection layer of the composite circuit board unit, and a second solder mask formed on a second metal protection layer of the composite circuit board unit. Two ends of a first outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a first window. Two ends of a second outer conductive circuit are bent back toward each other and spaced apart a predetermined distance to form a second window.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: November 30, 2021
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Yang Li, Yan-Lu Li
  • Patent number: 11191161
    Abstract: An electronic circuit includes a first printed wiring board, a second printed wiring board and a third printed wiring board. The second printed wiring board is mounted such that one edge of the second printed wiring board abuts on a part mounting surface of the first printed wiring board on which a part is mounted. The third printed wiring board is mounted such that one edge of the third printed wiring board abuts on the part mounting surface. The second and third printed wiring boards are connected to each other in a state where plate thickness directions thereof are oriented in different directions from each other about a normal line to the part mounting surface. Further, at least one of the second printed wiring board and the third printed wiring board is provided with an antenna pattern.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: November 30, 2021
    Assignees: DENSO CORPORATION, TYCO ELECTRONICS JAPAN G.K.
    Inventors: Shiro Koide, Daisuke Dobashi, Yohei Sakurai
  • Patent number: 11184980
    Abstract: An electronic device includes first and second housings rotatably coupled with each other through a hinge, thereby being in a folded state or an unfolded state. The electronic device further includes first and second printed circuit boards (PCBs) disposed in the first and second housings, respectively, and at least one wiring member electrically connecting the first and second PCBs. The electronic device further includes a window disposed over the first and second housings and the hinge, and a display disposed under the window. The display includes a display panel extending in the first housing and having a first FPCB electrically connected to a ground of the first PCB. The display includes a polymer member, a first conductive member disposed in the first housing and electrically connected to the first FPCB, and a second conductive member disposed in the second housing.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: November 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jungchul An, Jaehwan Park, Changyong Seo, Seungki Choi
  • Patent number: 11184974
    Abstract: An operating device contains a cover plate having an opening, a rotatable operating element having an operating head on the cover plate, and a shaft running through the opening. Behind the cover plate and at a distance therefrom, there is a circuit board having an opening through which the shaft extends. The operating device includes a tube element which has a hollow-cylindrical base body that runs, between the cover plate and the shaft of the operating element, at least partially through the opening of the cover plate, and a radial inner side that forms, between the tube element and the shaft of the operating element, an inner flow channel that runs through the opening of the cover plate and past the opening of the circuit board, to protect the circuit board against extraneous substances which may enter the operating device through the opening of the cover plate.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: November 23, 2021
    Assignee: Diehl AKO Stiftung & Co. KG
    Inventor: Charles Hahs
  • Patent number: 11184978
    Abstract: An object to provide an electric device easy to manufacture, extensible and of high quality. The electric device comprises a plurality of module boards 51, the module boards 51 piled up on one another, each of the module boards 51 provided with an electrode 53 on its surface, the electrodes 53 on the piled-up module boards 51 generally positioned along a vertical straight line; and a connector 11 connecting the module boards 51, the connector 11 including a body portion 21, the body portion 21 electrically connecting the electrodes 53 positioned along the vertical straight line, and a holder 12 holding the body portion 21, the holder 12 including a board engagement portion and a holder connecting portion, the board engagement portion engaging with the module board 51 so that the connector 11 is mounted on the module board 51, and the holder connecting portion engaging with another holder connecting portion so that the connector 11 is coupled to another vertically adjacent connector 11.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: November 23, 2021
    Assignee: THE FOUNDATION FOR THE PROMOTION OF INDUSTRIAL SCIENCE
    Inventors: Takayasu Sakurai, Makoto Takamiya, Tokihiko Mori
  • Patent number: 11178773
    Abstract: A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting i
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 16, 2021
    Inventor: Sheng-Kun Lan