Patents Examined by Xiaoliang Chen
  • Patent number: 11452215
    Abstract: A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: September 20, 2022
    Assignee: NITTO DENKO CORPORATION
    Inventors: Ryosuke Sasaoka, Naoki Shibata, Yasunari Oyabu
  • Patent number: 11445622
    Abstract: A display device includes a display panel including a display area on which a plurality of display elements is disposed and a non-display area on which one or more wires for driving the plurality of display elements are disposed. A back cover is attached to one surface of the display panel and has a plurality of openings. A roller unit winds or unwinds the back cover and the display panel, and a lifting unit moves the back cover and the display panel in a vertical direction. The plurality of openings overlaps the display panel, and each of the plurality of openings is disposed to be staggered with one or more of the openings in an adjacent row. A size of the back cover is larger than a size of the display panel.
    Type: Grant
    Filed: February 20, 2021
    Date of Patent: September 13, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Mi-Na Shin, ChounSung Kang, SunBok Song, GeunChang Park, Moonsun Lee
  • Patent number: 11445618
    Abstract: A method for manufacturing a flexible circuit board includes providing a first laminated structure, the first laminated structure including two first wiring boards, a first adhesive layer sandwiched between the two first wiring boards, and a first conductive structure. The first conductive structure penetrates the two first wiring boards and the first adhesive layer and electrically connects the two first wiring boards. The first adhesive layer defines a first opening, the first opening includes a first edge away from the first conductive structure. The first laminated structure is cut along the first edge and then the two first wiring boards are unfolded. A flexible circuit board manufactured by such method is also disclosed.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: September 13, 2022
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Yao-Cai Li, Biao Li, Hao-Wen Zhong
  • Patent number: 11439023
    Abstract: A system for providing selective adhesion printed circuit board (PCB) production comprises a conveyor mechanism, a curing system, and a computer. The conveyor mechanism is configured to convey a series of selective adhesion blanks, wherein each selective adhesion blank is utilized to produce a PCB and includes a flexible film, a substrate, a conductive layer, and a curable adhesive. The conductive layer is formed from electrically conductive material and adhered to the substrate. The curable adhesive is positioned between the flexible film and the conductive layer and is configured to selectively bond with the conductive layer when the curable adhesive is cured. The curing system is configured to cure the curable adhesive. The computer includes a processing element configured or programmed to: receive a plurality of PCB designs, and direct the curing system to cure the curable adhesive of a plurality of selective adhesion blanks for each PCB design.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: September 6, 2022
    Assignee: Honeywell Federal Manufacturing & Technologies, LLC
    Inventors: Jonathan Douglas Hatch, Stephen McGarry Hatch
  • Patent number: 11432406
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: August 30, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
  • Patent number: 11424195
    Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; a radio frequency (RF) die having a lateral surface area and a plurality of contacts on a face, where the RF die is embedded in the package substrate with the plurality of contacts facing towards the second surface of the package substrate, and an RF front end between the RF die and the first surface of the package substrate, where the RF front end is positioned under the RF die and does not extend beyond the lateral surface area of the RF die.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Eliav Shaul, Avi Tsarfati
  • Patent number: 11425817
    Abstract: A memory card includes a memory card body dimensioned to house at least one integrated circuit die package. The memory card body, in certain embodiments, includes a first surface spaced apart from a second surface and a plurality of side surfaces connecting the first surface to the second surface. The memory card also includes a contact pad disposed on at least one side surface of the plurality of side surfaces. The contact pad includes a first conductive layer, a second conductive layer, and an insulating layer disposed between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: August 23, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Shineng Ma, Xuyi Yang, Chih-Chin Liao, Chin-Tien Chiu, Jinxiang Huang
  • Patent number: 11424179
    Abstract: A method of manufacturing a component carrier includes forming a stack with electrically conductive layer structures and at least one electrically insulating layer structure; configuring the stack as a redistribution structure for transferring between a smaller pitch on one side of the stack towards a larger pitch on an opposing other side of the stack; arranging a first stiffening structure and a second stiffening structure in opposing surface regions of the stack. A component carrier and an electric device manufactured with the method exhibit improved stiffness and signal integrity.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: August 23, 2022
    Assignee: AT&S(Chongqing) Company Limited
    Inventor: Jeesoo Mok
  • Patent number: 11419218
    Abstract: The present disclosure relates to a multilayer ceramic substrate preparation method.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: August 16, 2022
    Assignee: DIT CO., LTD.
    Inventor: Tae Hyung Noh
  • Patent number: 11419213
    Abstract: Described herein is a multilayer flex circuit having a first dual flex circuit and a second dual flex circuit where each one comprises an outer metal layer, a base insulation layer, and an inner metal layer. The base insulation layer is disposed between the outer metal layer and the inner metal layer. The inner metal layer of the first dual flex circuit is configured to face toward the inner metal layer of the second dual flex circuit. The multilayer flex circuit also includes a coupling layer that adhesively couples the inner metal layer of the first dual flex circuit to the inner metal layer of the second dual flex circuit. The multilayer flex circuit also comprises an electrically conductive material that electrically connects the inner metal layer of the second dual flex circuit to the inner metal layer of the first dual flex circuit.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: August 16, 2022
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Nobumasa Nishiyama, Teruhiro Nakamiya, Satoshi Nakamura, Hiroshi Matsuda
  • Patent number: 11414774
    Abstract: The present disclosure provides a manufacturing method of a display panel which includes forming a pattern of a first electrode layer on a first substrate; coating a nano particle solution on the pattern of the first electrode layer and the first substrate; providing a second substrate formed with a pattern of a second electrode layer, wherein the pattern of the first electrode layer corresponds to the pattern of the second electrode layer; and connecting the pattern of the first electrode layer and the pattern of the second electrode layer to a power supply to perform a patterning treatment on the nano particle solution to make the nano particle solution form a pattern of a nano particle layer.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: August 16, 2022
    Inventors: Jinyang Zhao, Miao Zhou
  • Patent number: 11412621
    Abstract: A device-embedded board includes a board main body, conductor wiring layers formed inside or on a surface of the board main body, and device formation layers formed inside the board main body so as to be in contact with a portion of the conductor wiring layers. The device formation layer is configured in an insulating region in which functional filler for forming a devices is dispersed.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: August 9, 2022
    Assignee: TDK CORPORATION
    Inventors: Takaaki Morita, Seiichi Tajima, Takashi Kariya
  • Patent number: 11412622
    Abstract: A component carrier includes a stack having an electrically conductive layer structure, with at least one recess, on an electrically insulating layer structure; a dielectric filling medium filling at least part of the at least one recess; and a further electrically insulating layer structure on the electrically conductive layer structure and on the dielectric filling medium. A method of manufacturing a component carrier includes forming a stack having an electrically conductive layer structure, with at least one recess, on an electrically insulating layer structure; at least partially filling the at least one recess by a dielectric filling medium; and thereafter forming a further electrically insulating layer structure on the electrically conductive layer structure and on the dielectric filling medium.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 9, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventors: Thomas Kristl, Ewald Moitzi
  • Patent number: 11402754
    Abstract: The present invention provides a photosensitive resin composition from which a dry resist film having excellent resilience, storage stability and heat resistance can be produced. The photosensitive resin composition according to the present invention includes a photosensitive prepolymer having a carboxyl group and an ethylenically unsaturated group, a photopolymerization initiator and a thermal curing agent, wherein the thermal curing agent is a polycarbodiimide compound having a carbodiimide group, the carbodiimide group in the polycarbodiimide compound is protected by an amino group that can be dissociated at a temperature equal to or higher than 80° C. and the polycarbodiimide compound has a weight average molecular weight of 400 to 5000 and a carbodiimide equivalent of 180 to 2500.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: August 2, 2022
    Assignee: ARISAWA MFG. CO., LTD.
    Inventors: Takashi Gondaira, Makoto Tai
  • Patent number: 11399429
    Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: July 26, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
  • Patent number: 11388822
    Abstract: Methods for forming circuit boards and circuit boards using an adhesion layer are described. A substrate with two surfaces is exposed to a bifunctional organic compound to form an adhesion layer on the first substrate surface. A resin layer is then deposited on the adhesion layer and the exposed substrate surfaces. Portions of the resin layer may be removed to expose metal pads for contacts.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: July 12, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Tapash Chakraborty, Steven Verhaverbeke, Han-Wen Chen, Chintan Buch, Prerna Goradia, Giback Park, Kyuil Cho
  • Patent number: 11387117
    Abstract: A component carrier having a base structure consisting of an electrically conductive material, an electronic component arranged on the base structure and a surrounding structure on the base structure, where the surrounding structure at least partially surrounds the electronic component laterally.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 12, 2022
    Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
    Inventor: Minwoo Lee
  • Patent number: 11380603
    Abstract: An electronic device includes a heat dissipation structure. The heat dissipation structure comprises a flexible substrate, a graphite sheet, and a heat insulating material. The flexible substrate comprises a first surface and a second surface facing away from the first surface. The flexible substrate is disposed on the graphite sheet, and the second surface faces the graphite sheet. At least one containing cavity is formed between the flexible substrate and the graphite sheet. The heat insulating material is filled in the containing cavity. A cover plate is disposed on the first surface. At least one groove is formed on the flexible substrate from the first surface to the second surface. The groove is sealed by the cover plate to formed a sealed cavity. A phase changing material is filled in the sealed cavity.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: July 5, 2022
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventors: Fu-Yun Shen, Cong Lei, Ming-Jaan Ho, Hsiao-Ting Hsu
  • Patent number: 11382218
    Abstract: In a printed wiring board, when a plurality of wiring base bodies are collectively stacked, a constituent material of a first layer of an insulating resin film has a low melting point, so that the first layer is easily melted. Therefore, thermal welding on an upper surface of the wiring base body is reliably performed, and the wiring base bodies are bonded to each other with high reliability.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: July 5, 2022
    Assignee: TDK CORPORATION
    Inventors: Takaaki Morita, Seiichi Tajima, Takashi Kariya
  • Patent number: 11375614
    Abstract: The present disclosure provides a wiring structure, a display substrate and a display device, and belongs to the field of display technology. The wiring structure of the present disclosure comprises a body portion provided with hollow patterns; the body portion has a first side and a second side which are provided opposite to each other along an extending direction of the wiring structure, and both the first and second sides are wavy; the body portion comprises a plurality of conductive elements sequentially connected along the extending direction of the wiring structure; and in each conductive element, a length of a protruding portion on the first side in the extending direction of the wiring structure is different from that of a protruding portion on the second side in the extending direction of the wiring structure.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: June 28, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhifeng Zhan, Peng Huang, Yanxin Wang, Shuquan Yang, Wei Wang