Patents Examined by Young Whang
  • Patent number: 5528461
    Abstract: A printed circuit assembly (5) has a surface mount electronic component (14), circuit board (10), and locating features to align (16) the surface mount electronic component on the printed circuit board. The locating features may comprise solder bumps (24) on the printed circuit board. The locating features are arranged on the surface of the printed circuit board to lie proximal to the main body (22) of the surface mount electronic component. The locating features prevent movement of the surface mount electronic component prior to soldering the surface mount electronic component to the printed circuit board.
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: June 18, 1996
    Assignee: Motorola, Inc.
    Inventors: Kiron Gore, Edward J. Hall, John B. Brinkerhoff
  • Patent number: 5483423
    Abstract: This disclosure pertains to an apparatus and method of providing EMI shielding for an electrical component. The apparatus includes an elastomeric gasket, which is coated with a conductive jacket, and which is mounted on the backplane of a cabinet, the backplane providing EMI shielding. The cabinet is adapted for the insertion of a plurality of electrical components, such as disk drives, tape drives, and power supplies, which themselves are mounted in a rigid frame member. The frame member includes EMI shielding for the components on five of their six sides. The sixth side is unshielded, due to the fact that it contains the electrical connector used to connect the component to the backplane of the cabinet, when the frame member is inserted in the cabinet. With the frame member providing shielding on five sides, and the backplane providing shielding for the sixth side, the gasket serves the purpose of establishing an electrical seal between the frame member and the backplane of the cabinet.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: January 9, 1996
    Assignee: Digital Equipment Corporation
    Inventors: Mark S. Lewis, Reuben M. Martinez, Ralph M. Tusler
  • Patent number: 5469332
    Abstract: A PC card includes a board assembly enclosed by top and bottom covers. The board assembly includes a PC board with end housings on its opposite ends. A connector is mounted within one of the end housings and electrically interconnected to the PC board. Key-receiving slots extend through the opposite sides of the first and second end housings. Tracks on the opposite sides of the top and bottom covers form keyways extending between the key-receiving slots on the opposite sides of the board assembly. Elongated keys extend through the key-receiving slots of the end housings and through the keyways to secure the top and bottom covers to the board assembly. Releasable latches hold the keys within the keyways.
    Type: Grant
    Filed: July 1, 1994
    Date of Patent: November 21, 1995
    Assignee: Robodyne Corporation
    Inventor: Joseph Alvite
  • Patent number: 5461546
    Abstract: A function expanding apparatus for a compact electronic device includes a casing having a supporting portion and a supporting plate attached to the casing to be movable in a predetermined direction. A pair of retaining portions are formed on the supporting plate. The rear portion of the electronic device is mounted on the supporting portion and is positioned in its width direction by a pair of positioning members provided at the supporting portion. The front end portion of the electronic device is mounted on the supporting plate and the retaining portions engage the front edge of the electronic device so as to restrain the movement of the electronic device in the depth direction thereof. The position of the retaining portion is adjusted by moving the supporting plate, in accordance with the depth of the mounted electronic device.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: October 24, 1995
    Assignees: Kabushiki Kaisha Toshiba, Kel Corporation
    Inventors: Takaichi Kobayashi, Kazuya Shibasaki, Takashi Hosoi, Masami Honda, Kazuyoshi Takahashi
  • Patent number: 5455742
    Abstract: A direct connection for printed circuit boards where a primary board has a slot therethrough with slight edge projections which control the width of the slot to close tolerances. Spaced parallel conductive strips on the surfaces of the primary board terminate at the slot. A secondary board has an insert portion sized and configured for insertion into the slot in a close fit with the edge projections to maintain the boards mutually perpendicular. Spaced parallel strips on the insert are disposed adjacent the termination of the primary board strip. The strips are interconnected by soldering to provide direct circuit interconnection between the primary and secondary boards.
    Type: Grant
    Filed: March 21, 1994
    Date of Patent: October 3, 1995
    Assignee: Eaton Corporation
    Inventors: Chamroeun P. Phoy, Richard L. Lauritsen, M. Douglas Boyd
  • Patent number: 5453912
    Abstract: A radio assembly (100) includes a radio chassis (120) and radio housing (150). The radio chassis (120) includes a resilient cantilever arm (130) having an engaging portion (135). The radio housing (150) includes a mount channel (156) to position the cantilever arm (130), and a ramped catch portion (157) within the mount channel (156) to engage the engaging portion (135) of the cantilever arm (130) and to secure the radio chassis (120) within the radio housing (150). The chassis (120) is mounted to the radio housing (150) such that the engaging portion (135) of the cantilever arm (130) is positioned within the mount channel (156). The engaging portion (135) of the cantilever arm (130) is biasedly engaged with the ramped catch portion (157), and is deflectable so as to disengage from the ramped catch portion (157) when a deflecting force is applied to the engaging portion (135).
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: September 26, 1995
    Assignee: Motorola, Inc.
    Inventors: J. Michael Lytle, Martin E. Holmes, Mark F. Witczak, Peter D. Iezzi, William M. Bradford
  • Patent number: 5452183
    Abstract: This invention is directed to a chip carrier system for mounting to a first planar electronic device, such as a motherboard or test fixture, where first planar electronic device is provided with a planar, electrical interconnection interface mounted thereto. The chip carrier system includes a frame comprising a peripheral body portion defined by upper and lower planar surfaces, a recess in the lower planar surface to receive the planar, electrical interconnection interface, a central recess terminating in a floor to receive a second planar electronic device, such as an integrated circuit chip, having leads extending therefrom, converging side walls extending from the upper planar surface down to the floor, and plural through slots for receiving the leads. Cooperating therewith is a force applying member adapted to provide a normal force to the second planar electronic device and be mechanically secured to the frame.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: September 19, 1995
    Assignee: The Whitaker Corporation
    Inventors: Robert M. Renn, Keith L. Volz, Robert D. Irlbeck, Frederick R. Deak
  • Patent number: 5450287
    Abstract: A semiconductor device which includes an insulating substrate having a semiconductor chip mounted on a first face thereof, and an insulating first package member fixed on the first face with surrounding the semiconductor chip. An insulating second package member is fixed on a second face of the substrate, which is opposite to the first face. The chip is housed in a first cavity formed by the substrate and the first package member. The first cavity is sealed by a first sealing member fixed on an opening end of the first package member. The first and second package members are respectively fixed on both sides of the substrate, so that the package is substantially or nearly symmetrical in structure in relation to the substrate. Thus, stresses in the substrate due to expansion and contraction thereof are almost or substantially balanced with each other in a firing or burning process, and as a result, warpage of the substrate is difficult to be generated and flatness of the mounting face of can be improved.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: September 12, 1995
    Assignee: NEC Corporation
    Inventor: Masato Ujiie
  • Patent number: 5450286
    Abstract: A printed circuit assembly includes a rigidizer having first and second opposing surfaces, a silicone bonding agent disposed over a first surface of the rigidizer, a flex circuit having first and second opposing surfaces with a first surface of the flex circuit disposed over the bonding agent, and a silicone covercoat disposed over selected portions of the second surface of the flex circuit.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: September 12, 1995
    Assignee: Parlex Corporation
    Inventors: Roland C. Jacques, Robert D. Cyr
  • Patent number: 5448451
    Abstract: Two device holes are formed in a base film such that the device holes are juxtaposed in a width direction of the base film perpendicular to a feed direction of the base film. An outer lead hole is formed in the base film with a distance from the device holes in the feed direction. A first lead wire group is arranged on the base film between the outer lead hole and one of the device holes, and a second lead wire group is arranged on the base film between the outer lead hole and the other device hole. Further, a third lead wire group is arranged on the base film between both device holes.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: September 5, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chiaki Takubo, Kimihiro Ikebe, Masafumi Takeuchi, Seiichi Hirata, Sumio Takeda
  • Patent number: 5446621
    Abstract: On a printed circuit board or module card (20) of a standard size for a particular type of system, one or more different, smaller circuit cards or sub-modules (50) can be selectively mounted on the module card so as to utilize a maximum of its area. The module card has openings or holes (30) therein so as to provide component clearance and thus prevent the thickness of the module card from reducing the maximum permissible height of the components that can be mounted on the sub-modules. In order to minimize the amount of module card area devoted to interconnecting to the sub-modules, the sub-modules plug into the module card as the sub-module is moved in a direction perpendicular to the plane of the module card rather than in a direction parallel to the plane of the module card. Circuit wiring and switching (FIG.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: August 29, 1995
    Assignee: Wandel & Goltermann ATE Systems Ltd.
    Inventors: Peter H. Jansen, Viral K. H. Chokshi
  • Patent number: 5440452
    Abstract: A surface mount component comprising an IC chip, and a plurality of leads extending outward from the body of the chip. The leads are interconnected by an insulating frame at their outer ends. Each of the leads is provided in the vicinity of the portion thereof joined to the frame with an outer lead portion to be electrically connected to a wiring board. The frame is integrally connected to the chip body by bridges. When the component is mounted on the surface of the wiring board, the outer lead portion of each lead is bonded to the board by a solder layer without separating off the frame.
    Type: Grant
    Filed: May 12, 1993
    Date of Patent: August 8, 1995
    Assignee: Akira Kitahara
    Inventor: Akira Kitahara
  • Patent number: 5440453
    Abstract: The invention provides a packaging technique implementing an electronic circuit, comprising several individually packaged sub-circuits, on a circuit board within the footprint of a single package. The embodiment of the present invention is particularly advantageous when implementing application specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs). Selected pins of an upper package are electrically coupled to corresponding pins of the next lower adjacent package such that the pins of the uppermost package can be coupled to the pins of the lowermost package and correspondingly to the signal leads and power bus conductors of the printed circuit board. Portions of selected pins may be removed from one or more packages prior to forming the stacked structure to electrically isolate corresponding pins of upper packages from the pins of lower packages. A template is provided that permits rapid identification of pins to be removed before the packages are configured in the stack.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: August 8, 1995
    Assignee: Crosspoint Solutions, Inc.
    Inventors: Laurance H. Cooke, Matthew D. Penry
  • Patent number: 5438482
    Abstract: A shield structure for use in an electronic apparatus includes a shield case for covering a first and second circuitry block and for isolating each other. In order to enhance the electrical connection of the shield case to a first ground on a first circuit board and a second ground on a second circuit board, a conductive component is fastened to the shield case. The conductive component includes a fastening portion, a first contact portion contacting the first ground, and a second contact portion contacting the second ground.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: August 1, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Nakamura, Noboru Koike
  • Patent number: 5436801
    Abstract: An integrated circuit structure which employs at least two metal levels overlying an array of circuit elements. Each metal level contains signal routing resources which can be used for supplying power and interconnecting circuit elements. The metal levels include a first metal level directly overlying the array of circuit elements, intermediate metal levels (if there are more than two metal levels), and a top metal level overlying all other metal levels. Power carrying tracks are disposed in the top metal level. Power antennae are disposed in the first metal level, but only where necessary to provide power to the circuit elements. The power antennae are for connecting the power carrying tracks to the circuit elements. Power bridges are disposed in intermediate metal levels between the first metal level and the top metal level. The power bridges are for connecting the power carrying tracks to the power antennae.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: July 25, 1995
    Assignee: CrossCheck Technology, Inc.
    Inventors: Tushar Gheewala, Rustam Mehta, Timothy Saxe
  • Patent number: 5436802
    Abstract: An electronic device employs a method and apparatus for shielding an electrical circuit (101) that is disposed on a substrate (120). A base member (103) that includes a top portion (104) and a plurality of side portions (105) is electrically coupled to a receptacle area (121) of the substrate (120) such that the plurality of side portions (105) substantially encircle the electrical circuit (101). The top portion (104) of the base member (103) includes a plurality of tab members (108) interposed with a plurality of receptacle openings (109). A substantially planar cover (102) that includes a plurality of protrusions (111) is positioned adjacent to the top portion (104) of the base member (103) such that each protrusion (111) is positioned within a corresponding receptacle opening (109). The cover (102) is then urged until each protrusion (111) interlocks with a corresponding tab member (108) to substantially enclose and, thus, shield the electrical circuit (101).
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: July 25, 1995
    Assignee: Motorola
    Inventors: David W. Trahan, Michael L. Charlier, Keith A. Gronczewski
  • Patent number: 5434746
    Abstract: An improved attachment mechanism for attaching the motherboard in a computer system to its chassis is disclosed. The attachment mechanism includes a rail that engages at least two opposing edges of the motherboard and a hook mechanism that engages a catch formed in the chassis. The hook mechanism is secured to a central portion of the motherboard. The rail and hook mechanism cooperate to securely couple the motherboard to the chassis without requiting the use of extensive usable space on the motherboard. The described arrangement permits the motherboard to be quickly and easily installed and released.
    Type: Grant
    Filed: January 13, 1994
    Date of Patent: July 18, 1995
    Assignee: Sun Microsystems, Inc.
    Inventors: James Testa, Joseph M. Spano, William L. Dailey, Daniel D. Gonsalves, Robert S. Antonuccio, James M. Carney, Mathew J. Palazola
  • Patent number: 5432681
    Abstract: Chip-like stacks of thinned chips are mounted in wells etched into a substrate. A "chip-like" stack is a stack of chips, which in the aggregate have a height approximately equal to that of a single conventional chip. These chip-like stacks are mounted in a variety of packages. In a preferred embodiment, the stacks are mounted in wells within the substrate of an integrated circuit and the stack is provided with a patterned overlay so that all the circuit connections can be made from the upper surface of the stack. The patterned overlay is protected by a planar insulator. A plurality of substrates may be stacked, one upon the other.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: July 11, 1995
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Richard W. Linderman
  • Patent number: 5430612
    Abstract: A combination instrument having a front frame (12), a transparent cover glass (16), display systems (2) and/or operating elements mounted in the combination instrument, a circuit board (6) arranged behind them and bearing electronic components, the display systems and/or operating elements contacting the circuit board, and having a rear closure cover (13) for the combination instrument. Such a combination instrument is particularly easy to construct and mount and can thus be produced at favorable cost when it has a system support (1) developed as supporting structural part provided with recesses for the positioning and holding of the display systems and/or operating elements. The circuit board is connected to the system support. The system support thus represents the supporting element of the combination instrument around which all other parts of the combination instrument are grouped.
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: July 4, 1995
    Assignee: VDO Adolf Schindling AG
    Inventors: Ernst-Ulrich Simon, Stephan Zech, Josef Langhammer
  • Patent number: 5430618
    Abstract: An adaptor includes an adaptor casing, a circuit board and a cover piece. The adaptor casing includes lower and upper casing halves which are made of plastic and which are coated entirely with a layer of conductive material. A circuit board is disposed in the adaptor casing and has a top surface provided with a switch unit that is aligned with an opening formed in the upper casing half and that extends out of the adaptor casing via the opening, a first edge provided with a first connector, and an opposite second edge provided with a second connector. Each of the first and second connectors has a support plate which closes a respective one of front and rear open ends of the adaptor casing. The support plates and the adaptor casing cooperatively form an enclosure for confining the circuit board therein. The cover piece is made of plastic and is coated entirely with a layer of conductive material. The cover piece is fitted detachably in the opening of the upper casing half.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: July 4, 1995
    Inventor: George Y. Huang