Patents Examined by Young Whang
  • Patent number: 5335145
    Abstract: An IC card exhibiting improved electrical insulation, heat radiation capability, and radiation noise resistance includes circuit boards stacked in two layers and spaced apart from each other and surface panels of the IC card while maintaining satisfactory mechanical strength in the card. Board supporting portions extending in a frame portion of a main frame and sub-frames disposed on the board supporting portions hold the circuit boards, maintain a predetermined interval between the two circuit boards and between each circuit board and the surface panels, and provide the desired mechanical strength for the card.
    Type: Grant
    Filed: June 11, 1993
    Date of Patent: August 2, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Masaaki Kusui
  • Patent number: 5331516
    Abstract: The present invention makes it easier to connect board modules to each other and to increase reliability in a portable semiconductor apparatus having two board modules within a frame. Upper-row connection pins and lower-row connection pins have electrode leads, each having connection portions divided into two parts that are arranged in respective upper and lower rows. One of the board modules is inserted between one upper-row electrode lead and one lower-row electrode lead and electrically connected. The other board module is inserted between another upper-row electrode lead and another lower-row electrode lead and electrically connected. In this way, the board modules are electrically connected to each other.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: July 19, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Shinohara, Masatoshi Kimura
  • Patent number: 5331514
    Abstract: An object to the present invention is to provide an integrated-circuit package in which crosstalk can be reduced and impedance matching can be made. According to the present invention, conductive poles are grid-like arranged equidistantly in rows respectively in the vertical and transversal directions of an insulating substrate. The conductive poles are classified into signal conductive poles which are electrically connected to electrodes of the integrated circuit and the mother board, and earthed ground conductive poles arranged so as to adjacently surround the signal conductive poles.
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: July 19, 1994
    Assignee: NGK Spark Plug Co., Ltd.
    Inventor: Masao Kuroda
  • Patent number: 5331515
    Abstract: A plurality of integrated circuit devices are bonded to a substrate. Signal traces for corresponding pins of the devices are run to the same location, but are not electrically connected. They are, however, located in close physical proximity at a designated location. At this designated location, a properly shaped and sized contact can be used to contact all of the corresponding traces simultaneously, allowing parallel burn-in of all devices on the substrate to be performed. The devices can still be tested individually after burn-in. Once functionality of the overall subsystem has been confirmed and encapsulation completed, a permanent contact can be made at the designated location to all traces simultaneously so that the devices will be in parallel, and the substrate can be encapsulated to form a completed subsystem.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: July 19, 1994
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Charles R. Ewers
  • Patent number: 5329427
    Abstract: An improved apparatus for coupling a tiltable computer display to a base unit for controlling the viewing angle of the display. The improved apparatus includes a mounting area formed integrally along one edge of the computer display, the mounting area including a first electrical connector coupled to the display and a plurality of support apertures. A support flange is pivotally mounted to the base unit with a plurality of brackets. The support flange includes a second electrical connector for interfacing with the first electrical connector for electrically connecting the display to the base unit. The support flange also includes a plurality of support posts for engaging the support apertures. The apparatus also includes a device coupled between the support flange and the plurality of brackets for controlling the angular relationship if the support flange with respect to the base unit.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: July 12, 1994
    Assignee: Tusk, Incorporated
    Inventor: Per Hogdahl
  • Patent number: 5329423
    Abstract: A electrically interconnected assembly includes an electronic component, such as an integrated circuit chip, having a first pattern of contact sites and includes a substrate having a second pattern of contact sites corresponding to the first pattern. The electronic component is demountably connected to the substrate by a bump-and-socket arrangement at each pair of contact sites. One of the contact sites has a raised bump that is received within a depressed area of the other contact site. The raised bumps are pressed into the depressed areas, forming a ring of contact to electrically and mechanically connect the electronic component to the substrate. Preferably, the depressed areas are formed in a compliant material that allows some deformation but not so much as to allow the raised bumps to bottom out against the depressed areas. The assembly may be used in forming multi-chip modules having demountable integrated circuit chips.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: July 12, 1994
    Inventor: Kenneth D. Scholz
  • Patent number: 5329424
    Abstract: A busbar holder includes a supporting base having engaging prongs located at opposing ends of the supporting base. These engaging prongs engage receptacles in a printed circuit board (PCB) to secure the supporting base to the PCB. Four securing prongs extending vertically upward and having catch hooks at their free end are attached to the respective corners of the supporting base. A supporting wall extending vertically upward is attached to the supporting base and located intermediate the four securing prongs. Busbars are inserted between the wall and two of the securing prongs and are secured in place by the catch hooks.
    Type: Grant
    Filed: September 1, 1993
    Date of Patent: July 12, 1994
    Assignee: AT&T Bell Laboratories
    Inventor: Jayesh R. Patel
  • Patent number: 5327327
    Abstract: The multi-chip circuit module of the invention comprises a plurality of circuit chips assembled in a laminated stack. Each chip includes a plurality of layers of thin film interconnect patterns in the normal configuration, except for the final layer or layers, which comprise a reroute pattern that locates all circuit input and output pads along a single edge of each chip. The relocated pads are provided with contact bumps to facilitate the addition of a bonded lead to each I/O pad extending therefrom to a point beyond the edge of each chip. Thus, upon lamination the protruding tips form an array of leads on a single lateral face of the laminated chip stack.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: July 5, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Dean L. Frew, Mark A. Kressley, Arthur M. Wilson, Juanita G. Miller, Philip E. Hecker, Jr., James Drumm, Randall E. Johnson, Rick Elder
  • Patent number: 5325268
    Abstract: Integrated circuits having electrical interconnection in a multi-chip module or package is provided. Connections involving topological cross overs are achieved in the absence of multi-layers of metalization or vias. A plurality of metal traces in a single metalization layer are provided. Wire bonding issued to connect pads from two or more chips to a common metalization trace. Because the wire bonds can be vertically spaced from substrate traces, crossover connections can be achieved without an unwanted contact between traces and pads. A similar scheme can be used to provide connection to substrate pads.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: June 28, 1994
    Assignee: National Semiconductor Corporation
    Inventors: Manoj F. Nachnani, Hem P. Takiar
  • Patent number: 5325267
    Abstract: A remote driver board suitable for creating electrical interconnections in a substantially wireless electrical apparatus such as a electrophotographic apparatus. A series of parallel conductors extend the length of one side of the board, and along the other side is disposed a modular connector and a switching device, such as in the form of an integrated circuit, for controlling connections between the parallel conductors to other electrical devices in the system through the modular connector.
    Type: Grant
    Filed: November 25, 1992
    Date of Patent: June 28, 1994
    Assignee: Xerox Corporation
    Inventor: Joan R. Ewing
  • Patent number: 5321583
    Abstract: An electronic assembly that includes an electronic package which is coupled to a circuit board by a plurality of metal spheres that are captured by an interposer. The metal spheres electrically couple a plurality of first conductive pads on the electronic package with a plurality of second conductive pads on the circuit board. The spheres are pressed into operative contact with the conductive pads by a clamp adapted to apply a pressure to the electronic package. The metal spheres are captured by the interposer so that the spheres can rotate relative to the electronic package and the circuit board. The rotating spheres function as bearings which allow the interposer and package to be removed from the clamp and board without detaching the clamp. The electronic package can be coupled to the circuit board by merely pushing the package and interposer between the clamp and board until the metal spheres are properly aligned with the conductive pads.
    Type: Grant
    Filed: December 2, 1992
    Date of Patent: June 14, 1994
    Assignee: Intel Corporation
    Inventor: John F. McMahon
  • Patent number: 5319522
    Abstract: A method is provided for encapsulating an object with a heat-shrinkable material prior to subjecting the encapsulated object to insert, injection molding. The encapsulation protects the object from thermal damage by preventing contact with the injected polymer. In addition, the encapsulation protects the object from contact by any liquids or other foreign materials which penetrate the molded enclosure.
    Type: Grant
    Filed: December 17, 1992
    Date of Patent: June 7, 1994
    Assignee: Ford Motor Company
    Inventor: Rajendra M. Mehta
  • Patent number: 5317483
    Abstract: A sheet metal support cage structure within a computer has an inturned side wall ledge portion and removably receives a spaced series of expansion cards. Extending along edge portions of the cards that face the ledge are sheet metal mounting brackets having outwardly bent end tab portions that overlie and engage the side wall ledge. The tabs are removably held in place on the ledge by an elongated hold-down bar secured at an inner end thereof to the cage structure for pivotal movement relative thereto between a closed position in which the bar overlies the tabs and captively retains them on the ledge, thereby locking the expansion cards in place within the cage structure, and an opened position in which the bar is moved away from the tabs and releases them from the ledge to permit the expansion cards to be removed from the cage structure.
    Type: Grant
    Filed: January 26, 1993
    Date of Patent: May 31, 1994
    Assignee: Dell U.S.A., L.P.
    Inventor: Dan E. Swindler
  • Patent number: 5317478
    Abstract: A hermetically sealed electronics package in which an electronic element located on a support is hermetically sealed using a cover comprising the top layer of a multilayer flexprint or a separate flexprint. The top layer of the flexprint or the separate flexprint is supported above the electronic element by a frame structure. When the cover comprises the top flexprint layer, the top layer is only partially bonded to the underlying flexprint during fabrication of the package. After circuit placement, the flap portion of the top flexprint layer is bonded to the flexprint to provide hermetic sealing of the underlying electronic elements. The frame structure provides support for the flexprint cover to prevent deformation of the cover and resulting damage to the underlying circuit. A cooling system is also disclosed for use in combination with the hermetic seal configuration to provide an electronic package which is protected from both contaminants and built-up heat.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: May 31, 1994
    Assignee: Hughes Aircraft Company
    Inventor: Mohi Sobhani
  • Patent number: 5317481
    Abstract: A system for installing a circuit board edge connector into a motherboard connector from the side to accommodate high density card arrangements that obstruct overhead clearance. In one embodiment, the system utilizes an insertion tool which conveys the circuit board across the motherboard and positions it with the pins of both boards aligned. The tool locates the board adjacent the motherboard with the aligned connectors just touching and blocked against withdrawal. The cooperation between ramps and pins associated with the tool and circuit board applies a force, upon the withdrawal of the tool from the motherboard, to engage fully the pins of the circuit board with the pins of the motherboard. The extraction of the circuit board from the motherboard uses the tool in a reverse sequence.
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: May 31, 1994
    Assignee: Thinking Machines Corporation
    Inventors: W. Daniel Hillis, William Gerner
  • Patent number: 5317479
    Abstract: A curved lead provides a mechanical and electrical connection between a board contact on a circuit board and a chip contact associated with a circuit chip. The chip can be mounted to the circuit board, to a chip carrier or to a multiple-chip module. The curved lead is substantially entirely plated with solder and is formed of a single piece of conductive material. The curved lead has a first surface for connection to the chip contact and a second surface, generally parallel to the first surface, for connection to the board contact. The first and second surfaces are connected by at least one curved portion and are arranged to mount the circuit chip to the circuit board with the solder in a compliant, generally parallel arrangement substantially free of stress.
    Type: Grant
    Filed: October 1, 1993
    Date of Patent: May 31, 1994
    Assignee: Computing Devices International, Inc.
    Inventors: Deepak K. Pai, Terrance A. Krinke
  • Patent number: 5315489
    Abstract: A telecommunications closure (1) includes a pressure clamp (21) for sealingly clamping mating parts (47, 48) of the closure together so as to form a water tight seal. The clamp member requires no tools during installation and creates no uncertainty as to the generation of appropriate clamp pressure on a sealing O-ring when installed. The pressure clamp includes an over-center latch which is rotatable between a first unlatched position and a second latched position, a clamping pressure generated by the latch increasing to a maximum value as the rotatable latch is moved from its first position to an intermediate position between the first and second positions and then decreases from this maximum value as the latch is moved from the intermediate position to the second position so as to generate a predetermined appropriate clamping pressure when in its second position so as to appropriately compress the O-ring disposed within a groove between the closure parts at their mating area.
    Type: Grant
    Filed: December 10, 1992
    Date of Patent: May 24, 1994
    Assignee: Raynet Corporation
    Inventors: Mark McCall, Donald Del Fava, Thomas Wong, Lowell I. Koht
  • Patent number: 5315488
    Abstract: A host structure is provided for terminal adapters that are part of a distributed computer architecture. Each computer system is in turn connected to a number of synchronous or asynchronous terminals via the network and terminal adapters, each terminal adapter connected, on one hand, to the network and, on the other hand, to at least one terminal via a synchronous or asynchronous transmission link. The host structure can contain a number of adapter cards, each containing the electronic circuit of an adapter, and is composed of a first compartment with the adapter cards, and a second compartment with an equal number of connection cards. The connection cards each enable connecting a number of terminals to a particular adapter.
    Type: Grant
    Filed: April 12, 1993
    Date of Patent: May 24, 1994
    Assignee: Bull S.A
    Inventors: Remy Le Gallo, Gerard Lyvet, Bernard Malgogne
  • Patent number: 5315484
    Abstract: A printed circuit board is provided with two soldering land portions on respective lead lines. Each of the soldering land portions has two sub-soldering land portions and a narrow connecting portion for connecting the sub-soldering portions, so that the land portions are substantially H-shaped. When the printed circuit board is dip soldered after being coated with a solder-proof layer exposing the soldering land portions, solder sticks to the soldering land portions in such a way that it is thicker on the sub-soldering land portions but thinner on the narrow connecting portions. Thereafter, the synchro contacts of a camera flash unit are positioned on the respective narrow connecting portions and soldered to the lead lines by a soldering iron or hot air.
    Type: Grant
    Filed: November 6, 1992
    Date of Patent: May 24, 1994
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Seiji Asano
  • Patent number: 5313366
    Abstract: A low cost Surface Mount Carrier (SMC) for carrying integrated circuit chips mounted thereon. The carrier, or interposer, is a thin-small single layer or, a multi-layer deck of printed circuit board (FR-4) material with at least one direct chip attach (DCA) site for mounting a semiconductor chip. The DCA site has chip bonding pads wherein the integrated circuit chip's pads are wire bonded to or soldered to the carrier. The bonding pads are connected to wiring pads through interlevel vias and wiring lands or traces which may be on one of several wiring planes. The carrier is connected to the next level of packaging through the wiring pads.
    Type: Grant
    Filed: August 12, 1992
    Date of Patent: May 17, 1994
    Assignee: International Business Machines Corporation
    Inventors: Gene J. Gaudenzi, Perwaiz Nihal