Patents Examined by Yu-Hsi D Sun
  • Patent number: 10886212
    Abstract: A radio frequency (RF) switch includes a phase-change material (PCM), a heating element underlying an active segment of the PCM and extending outward and transverse to the PCM, and RF terminals having lower metal portions and upper metal portions. At least one of the lower metal portions can be ohmically separated from and capacitively coupled to passive segments of the PCM, while the upper metal portions are ohmically connected to the lower metal portions. Alternatively, the lower metal portions can be ohmically connected to passive segments of the PCM, while a capacitor is formed in part by at least one of the upper metal portions. Alternatively, at least one of the RF terminals can have a trench metal liner separated from a trench metal plug by a dielectric liner. The trench metal liner can be ohmically connected to passive segments of the PCM, while the trench metal plug is ohmically separated from, but capacitively coupled to, the trench metal liner.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: January 5, 2021
    Assignee: Newport Fab, LLC
    Inventors: Nabil El-Hinnawy, Gregory P. Slovin, Jefferson E. Rose, David J. Howard
  • Patent number: 10872782
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a stacked film on a substrate. The method further includes forming, on the stacked film, a mask layer formed of a tungsten compound and including impurity atoms having a concentration of 1.0×1020 atoms/cm3 or more. The method further includes etching the stacked film using the mask layer as an etching mask.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: December 22, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yuya Matsubara, Hiroshi Kubota
  • Patent number: 10865501
    Abstract: A silicon carbide epitaxial substrate has a silicon carbide single-crystal substrate and a silicon carbide layer. A first ratio of an absolute value of a difference between a dopant density in a first end region and a dopant density in a central region to an average value of the dopant density in the first end region and the dopant density in the central region is not more than 40%. A second ratio of an absolute value of a difference between a dopant density in a second end region and the dopant density in the central region to an average value of the dopant density in the second end region and the dopant density in the central region is not more than 40%.
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: December 15, 2020
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tsutomu Hori, Hironori Itoh
  • Patent number: 10867857
    Abstract: A method of cutting a substrate including a device region and a scribe lane region includes selectively forming a passivation layer in the device region of the substrate, selectively forming a self-assembled monolayer on the passivation layer, and performing plasma cutting in the scribe lane region.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: December 15, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Seong Jeon, Seung-Hun Shin, Jae-Kyung Yoo, Teak-Hoon Lee
  • Patent number: 10866301
    Abstract: It is disclosed to obtain a frequency transformed radiomap data set by applying a discrete frequency transform to an original radiomap data set. It is also disclosed to obtain a reconstructed radiomap data set by applying an inverse discrete frequency transform to a frequency transformed radiomap data set.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: December 15, 2020
    Assignee: HERE Global B.V.
    Inventors: Lauri Wirola, Jari Syrjarinne, Jukka Talvitie, Elena-Simona Lohan
  • Patent number: 10861789
    Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: December 8, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Makoto Mizukami, Takeshi Kamigaichi
  • Patent number: 10861976
    Abstract: The present disclosure teaches semiconductor devices and methods for manufacturing the same. Implementations of the semiconductor device may include: a semiconductor substrate; a semiconductor fin positioned on the semiconductor substrate; and a gate structure positioned on the semiconductor fin, where the gate structure includes a gate dielectric layer on a part of a surface of the semiconductor fin and a gate on the gate dielectric layer; where the gate includes a metal gate layer on the gate dielectric layer and a semiconductor layer on a side surface of at least one side of the metal gate layer; and where the semiconductor layer includes a dopant, where a conductivity type of the dopant is the opposite of a conductivity type of the semiconductor fin. The present disclosure can improve a work function of the device, thereby improving a current characteristic of the device during a working process, reducing the short channel effect (SCE), and lowering a leakage current.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: December 8, 2020
    Assignees: Semiconductor Manufacturing (Beijing) International Corporation, Semiconductor Manufacturing (Shanghai) International Corporation
    Inventor: Meng Zhao
  • Patent number: 10861782
    Abstract: Embodiments of a redistribution layer structure comprise a low-k dielectric material and incorporating a reinforcement structure proximate and inward of a peripheral edge thereof, the reinforcement structure comprising conductive material electrically isolated from conductive paths through the RDL structure. Semiconductor packages including an embodiment of the RDL structure and methods of fabricating such RDL structures are also disclosed.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: December 8, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Hyunsuk Chun, Chan H. Yoo, Tracy N. Tennant
  • Patent number: 10853032
    Abstract: Techniques for curating audio and IR commands using machine learning may be provided. For example, the system can receive an audio stream that includes a plurality of audio segments provided by a particular user (e.g., as determined through acoustic fingerprinting) and the system can store the audio stream and/or segments in the user's profile. The system can also store a command associated with the audio segment(s). When a portion of the audio is provided in conjunction with a same command over a threshold number of repetitions, the next time that that audio segment is received, the system may provide the command that corresponds with that audio segment to an output device to cause an operation of the output device.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: December 1, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Michael L S Dodge, Charles Shearer Dorner
  • Patent number: 10847533
    Abstract: A 3D structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain region; a p+ region at the source/drain region; and a diffusion barrier material between the n+ region and the p+ region. The n+ region is substantially isolated from the p+ region.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: November 24, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Ki Hong Lee, Seung Ho Pyi, Il Young Kwon, Jin Ho Bin
  • Patent number: 10833005
    Abstract: A radio frequency (RF) switch includes a phase-change material (PCM), a heating element underlying an active segment of the PCM and extending outward and transverse to the PCM, and RF terminals having lower metal portions and upper metal portions. At least one of the lower metal portions can be ohmically separated from and capacitively coupled to passive segments of the PCM, while the upper metal portions are ohmically connected to the lower metal portions. Alternatively, the lower metal portions can be ohmically connected to passive segments of the PCM, while a capacitor is formed in part by at least one of the upper metal portions. Alternatively, at least one of the RF terminals can have a trench metal liner separated from a trench metal plug by a dielectric liner. The trench metal liner can be ohmically connected to passive segments of the PCM, while the trench metal plug is ohmically separated from, but capacitively coupled to, the trench metal liner.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: November 10, 2020
    Assignee: Newport Fab, LLC
    Inventors: Nabil El-Hinnawy, Gregory P. Slovin, Jefferson E. Rose, David J. Howard
  • Patent number: 10833026
    Abstract: Some embodiments relate to a method. In this method, a semiconductor wafer having a frontside and a backside is received. A frontside structure is formed on the frontside of the semiconductor wafer. The frontside structure exerts a first wafer-bowing stress that bows the semiconductor wafer by a first bow amount. A characteristic is determined for one or more stress-inducing films to be formed based on the first bow amount. The one or more stress-inducing films are formed with the determined characteristic on the backside of the semiconductor wafer and/or on the frontside of the semiconductor wafer to reduce the first bow amount in the semiconductor wafer.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: November 10, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Ming Chen, Szu-Yu Wang, Chung-Yi Yu
  • Patent number: 10833176
    Abstract: A method for forming a semiconductor device comprises forming a fin on a substrate and forming a sacrificial gate over a channel region of the fin. A hydrogen terminated surface is formed on sidewalls of the sacrificial gate, and a spacer is deposited on the hydrogen terminated surface of the sacrificial gate. An insulator layer is formed over portions of the fin. The sacrificial gate is removed to expose the channel region of the fin, and a gate stack is formed over the channel region of the fin.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kangguo Cheng, Xin Miao, Wenyu Xu, Chen Zhang
  • Patent number: 10797079
    Abstract: A display device is disclosed. The display device includes a substrate having a plurality of pixels, wherein each of the plurality of pixels includes at least one light emitting chip, and a structure on one side of at least one of the plurality of pixels. A base material of the light emitting chip is the same as a base material of the structure.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: October 6, 2020
    Assignee: LG Display Co., Ltd.
    Inventor: Hyungju Park
  • Patent number: 10784442
    Abstract: A method of manufacturing an MRAM device, the method including forming a first magnetic layer on a substrate; forming a first tunnel barrier layer on the first magnetic layer such that the first tunnel barrier layer includes a first metal oxide, the first metal oxide being formed by oxidizing a first metal layer at a first temperature; forming a second tunnel barrier layer on the first tunnel barrier layer such that the second tunnel barrier layer includes a second metal oxide, the second metal oxide being formed by oxidizing a second metal layer at a second temperature that is greater than the first temperature; and forming a second magnetic layer on the second tunnel barrier layer.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: September 22, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Whan-Kyun Kim, Deok-Hyeon Kang, Woo-Jin Kim, Woo-Chang Lim, Jun-Ho Jeong
  • Patent number: 10777415
    Abstract: Hydrogen annealing for heating a semiconductor wafer on which a thin film containing a dopant is deposited to an annealing temperature under an atmosphere containing hydrogen is performed. A native oxide film is inevitably formed between the thin film containing the dopant and the semiconductor wafer, however, by performing hydrogen annealing, the dopant atoms diffuse relatively easily in the native oxide film and accumulate at the interface between the front surface of the semiconductor wafer and the native oxide film. Subsequently, the semiconductor wafer is preheated to a preheating temperature under a nitrogen atmosphere, and then, flash heating treatment in which the front surface of the semiconductor wafer is heated to a peak temperature for less than one second is performed. The dopant atoms are diffused and activated in a shallow manner from the front surface of the semiconductor wafer, thus, the low-resistance and extremely shallow junction is obtained.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: September 15, 2020
    Assignee: SCREEN HOLDINGS CO., LTD.
    Inventors: Kazuhiko Fuse, Hikaru Kawarazaki, Hideaki Tanimura, Shinichi Kato
  • Patent number: 10770389
    Abstract: A radio frequency (RF) switch includes a phase-change material (PCM), a heating element underlying an active segment of the PCM and extending outward and transverse to the PCM, and RF terminals having lower metal portions and upper metal portions. At least one of the lower metal portions can be ohmically separated from and capacitively coupled to passive segments of the PCM, while the upper metal portions are ohmically connected to the lower metal portions. Alternatively, the lower metal portions can be ohmically connected to passive segments of the PCM, while a capacitor is formed in part by at least one of the upper metal portions. Alternatively, at least one of the RF terminals can have a trench metal liner separated from a trench metal plug by a dielectric liner. The trench metal liner can be ohmically connected to passive segments of the PCM, while the trench metal plug is ohmically separated from, but capacitively coupled to, the trench metal liner.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: September 8, 2020
    Assignee: Newport Fab, LLC
    Inventors: Nabil El-Hinnawy, Gregory P. Slovin, Jefferson E. Rose, David J. Howard
  • Patent number: 10770525
    Abstract: An organic light-emitting display panel, divided into a display region and a non-display region surrounding the display region, includes a substrate; an array layer formed over the substrate; a pixel defining layer formed on the surface of the array layer away from the substrate; and a plurality of organic light-emitting devices formed in a plurality of openings of the pixel defining layer. The plurality of organic light-emitting devices are disposed in the display region, and each organic light-emitting device includes an anode, an organic light-emitting layer, and a cathode sequentially formed on the substrate. The organic light-emitting display panel also includes a plurality of support units disposed in the non-display region. At least one support unit of the plurality of support units is disposed on the surface of the pixel defining layer away from the substrate.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 8, 2020
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Wenxin Jiang, Jiaxin Li, Guofeng Zhang, Hua Gong, Canjun Xiao
  • Patent number: 10770589
    Abstract: In one example, a fin field effect transistor including a single diffusion break with a multi-layer dummy gate is disclosed. One example of field effect transistor includes a first transistor array comprising a first active gate, a second transistor array comprising a second active gate, and a single diffusion break formed between the first transistor array and the second transistor array, wherein the single diffusion break comprises a dummy gate comprising multiple layers of different materials.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: September 8, 2020
    Assignee: International Business Machines Corporation
    Inventor: Kangguo Cheng
  • Patent number: 10763404
    Abstract: A light emitting device, including an LED semiconductor die, a photoluminescent structure and a reflector, is disclosed. The photoluminescent structure with a beveled edge surface is disposed on top of the LED semiconductor die, wherein a lower surface of the photoluminescent structure adheres to an upper surface of the LED semiconductor die. A reflective resin material is disposed surrounding edge surfaces of the LED semiconductor die and the photoluminescent structure forming a beveled reflector. A method to manufacture the above light emitting device is also disclosed. Advantages of this light emitting device with beveled reflector include increasing the light extraction efficiency, making the viewing angle tunable, improving spatial color uniformity and reducing the light source etendue realized in a compact form-factor size.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: September 1, 2020
    Assignee: Maven Optronics Co., Ltd.
    Inventors: Chieh Chen, Tsung-Hsi Wang