Patents Examined by Yuriy Semenenko
  • Patent number: 10340301
    Abstract: Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: July 2, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Volume Chien, Yun-Wei Cheng, I-I Cheng, Shiu-Ko JangJian, Chi-Cherng Jeng, Chih-Mu Huang
  • Patent number: 10334718
    Abstract: A multi-functional high current circuit board comprises a current conduction layer having several strata for conduction of electric current, a switching layer comprising at least one power circuit breaker for switching an electric load, a control layer comprising at least one control element to control the at least one power circuit breaker, at least one shielding element for shielding the current conduction layer from the control layer and from the switching layer.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: June 25, 2019
    Assignee: ZF FRIEDRICHSHAFEN AG
    Inventors: Wilfried Lassmann, Michael Sperber
  • Patent number: 10333193
    Abstract: A printed circuit board and a printed circuit board includes a signal transmitting part; a ground part that includes an impedance adjusting part and a dummy part; and an insulating layer disposed between the signal transmitting part and the ground part.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: June 25, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae Hyun Park, Han Kim
  • Patent number: 10331161
    Abstract: A power supply board includes: a first board including a top surface on which a processor is capable of being mounted, a bottom surface located on an opposite side of the top surface, and a plurality of first through holes and a plurality of second through holes capable of being electrically connected with the processor by penetrating through the first board from the top surface to the bottom surface; a second board arranged at a position distant from the bottom surface of the first board and provided with a power supply device; a first conductor mounted on the bottom surface of the first board and electrically connects the plurality of first through holes and the power supply device, and a second conductor mounted on the bottom surface of the first board and electrically connects the plurality of second through holes and the power supply device.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: June 25, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuki Kanai, Takashi Imamoto
  • Patent number: 10332827
    Abstract: Various applications of interconnect substrates in power management systems are described.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: June 25, 2019
    Assignee: Volterra Semiconductor Corporation
    Inventors: Mihalis Michael, Kwang Hong Tan, Ilija Jergovic, Chiteh Chiang, Anthony J. Stratakos
  • Patent number: 10332678
    Abstract: A power storage module includes: a power storage unit with a plurality of power storage elements; and a circuit unit attached to the power storage unit. The circuit unit includes: a high-current member through which a composite current obtained from the plurality of power storage elements flows; a low-current member through which a detection current for detecting a state of the individual power storage elements flows; and a lower case and an upper case that hold the high-current member and the low-current member.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: June 25, 2019
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideyuki Kuboki, Hiroki Hirai, Makoto Higashikozono, Kenji Nakagawa
  • Patent number: 10327326
    Abstract: Embodiments are directed to a circuit assembly for an electronic device having an electromagnetic shield that defines a sensing element or contact pad along an outer surface of the assembly. The circuit assembly includes a group of electrical components attached to a surface of a printed circuit board. A molded structure may encapsulate the group of electrical components and at least a portion of the surface of the printed circuit board. A metal layer may be formed over an outer surface of the molded structure. The metal layer may define both a shield portion configured to provide shielding for one or more of the group of electrical components and an electrode configured to detect an input applied to the electronic device.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: June 18, 2019
    Assignee: Apple Inc.
    Inventors: Brad G. Boozer, Colin M. Ely, Steven P. Cardinali
  • Patent number: 10327328
    Abstract: To provide a printed circuit board that allows for easy exchange of only a deterioration detection conductor, and can reduce costs. A printed circuit board includes: a main printed circuit board in which a wiring pattern is formed on an insulated substrate; and a deterioration detection wiring board in which deterioration detection wiring (deterioration detection wiring pattern) which is wiring having a form whereby deterioration is promoted compared to the wiring pattern on the insulated substrate is formed on a separate insulated substrate from the main printed circuit board, and is exchangeably connected to the main printed circuit board in a vicinity thereof by way of a replacement-enabling connection part.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: June 18, 2019
    Assignee: FANUC CORPORATION
    Inventors: Takeshi Sawada, Yuichi Okochi, Norihiro Saido
  • Patent number: 10321569
    Abstract: Electronic module with all-sided electromagnetic interference (EMI) shielding and methods of making same. The electronic module includes an encapsulated circuit board between a top plate and a conductive bottom plate, electrical leads extending from the circuit board through the bottom plate, and a continuous conductive coating substantially covering the entire electronic module except for a bottom surface of the bottom plate. The conductive coating forms direct, independent connections at least to the circuit board and the bottom plate. The conductive coating provides EMI shielding across the top and sides of the electronic module. The conductive bottom plate provides EMI shielding across the bottom of the electronic module. Methods of manufacturing include encapsulating a circuit board between a top plate and bottom plate, separating materials from the encapsulated circuit board to expose conductive traces on the circuit board and bottom plate, and coating the sawed device with a conductive coating.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: June 11, 2019
    Assignee: VPT, INC.
    Inventors: Stephen J. Butler, Anthony G. Salamone
  • Patent number: 10320048
    Abstract: A communication device includes a circuit board having an upper surface and a lower surface, an upper housing disposed on the upper surface, and a lower housing disposed on the lower surface. The circuit board includes a top metal frame disposed on the upper surface, wherein the top metal frame defines a top cavity; a bottom metal frame disposed on the bottom surface, wherein the bottom metal frame defines a bottom cavity corresponding to the top cavity; a microstrip line disposed on the upper surface and extending into the top cavity; and a side coupler disposed on the lower surface and extending into the bottom cavity. The upper housing includes a depression corresponding to the top cavity, and the lower housing includes an aperture corresponding to the bottom cavity.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: June 11, 2019
    Assignee: MICROELECTRONICS TECHNOLOGY, INC.
    Inventor: Ping-Chin Tseng
  • Patent number: 10306816
    Abstract: An EMI shielding structure includes a shielding pad surrounding at least one circuit component mounted on a printed circuit board and grounded to a ground pad disposed on the printed circuit board; and a shield can configured to cover the at least one circuit component, wherein a portion of the shield can is attached to the shielding pad.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: May 28, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-ju Mun, Keon Kuk, Ji-woon Yeom
  • Patent number: 10306761
    Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 28, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
  • Patent number: 10299382
    Abstract: Ensure conduction between an electronic component and a circuit substrate having reduced pitches in wiring of the circuit substrate or electrodes of the electronic component and prevent short circuits between electrode terminals of the electronic component. A connection body has an electronic component connected to a circuit substrate via an anisotropic conductive adhesive agent; the anisotropic conductive adhesive agent contains a binder resin layer in which conductive particles are regularly arranged; an inter-particle distance among the conductive particles in a space between connection electrodes formed on the electronic component being greater than the inter-particle distance among the conductive particles trapped between the connection electrodes and substrate electrodes formed on the circuit substrate.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: May 21, 2019
    Assignee: DEXERIALS CORPORATION
    Inventors: Kenichi Saruyama, Yasushi Akutsu
  • Patent number: 10290618
    Abstract: Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 14, 2019
    Assignee: INTERSIL AMERICAS LLC
    Inventors: Francois Hebert, Steven R. Rivet, Michael Althar, Peter Oaklander
  • Patent number: 10292291
    Abstract: An electronic device such as a media player is formed from electrical components such as integrated circuits, buttons, and a battery. Electrical input-output port contacts are used to play audio and to convey digital signals. Electrical components for the device are mounted to a substrate. The components are encapsulated in an encapsulant and covered with an optional housing structure. The electrical input-output port contacts and portions of components such as buttons remain uncovered by encapsulant during the encapsulation process. Integrated circuits are entirely encapsulated with encapsulant. The integrated circuits are packaged or unpackaged integrated circuit die. The substrate is a printed circuit board or is an integrated circuit to which components are directly connected without any printed circuit boards interposed between the integrated circuit and the components.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: May 14, 2019
    Assignee: Apple Inc.
    Inventors: Christopher D. Prest, Claudio Di Leo
  • Patent number: 10274995
    Abstract: A rollable display device includes: a panel supporting portion including a plurality of supporters arranged in substantially parallel relationship and a plurality of hinge linking portions rotatably connecting adjacent supporters to one another, and having rolled and unrolled configurations; a flexible display panel having a display area disposed on the panel supporting portion and a non-display area outside the display area; and a driving module including a flexible circuit board having a bent portion and connected to the non-display area, and a printed circuit board (PCB) connected to the flexible circuit board. The plurality of supporters includes a housing disposed at an outermost side of the rollable display device. The housing has a hole through which the non-display area passes and a chamber communicating with the hole and receiving the driving module. A sealant is disposed between the flexible display panel and the housing at the outside of the hole.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: April 30, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae An Seo, Sun Ho Kim, Jung Hun Lee, Jin Hwan Choi
  • Patent number: 10271429
    Abstract: A display device includes a display substrate including a display area where an image is displayed and a pad area disposed at a periphery of the display area, and a first pad portion disposed in the pad area, the first pad portion including a plurality of first line pad terminals arranged along a first curved line in a first direction.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: April 23, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoung Yong Kim, Jeong Ho Hwang, Jong Hyuk Lee
  • Patent number: 10269696
    Abstract: Flexible circuits mountable in a standoff region between a chip carrier, e.g., a ball grid array (BGA) component, and a printed circuit board (PCB) of a surface-mount package are described. In an example, a flexible circuit includes holes to receive pins, e.g., solder balls, of the BGA component, and one or more conductive leads electrically connected to respective solder balls within the holes. The conductive leads may interconnect several solder balls within the standoff region, and may be electrically accessible through a test pad located laterally outward from the standoff region. Electrical signals may be monitored or driven through the test pad, and thus, the flexible circuit may be used as a debug tool for detecting and or correcting a design fault of the surface-mount package.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: April 23, 2019
    Assignee: Intel Corporation
    Inventors: Gerrit John Vreman, Animesh Mishra
  • Patent number: 10271420
    Abstract: An electronic apparatus is provided. The electronic apparatus includes a printed circuit board (PCB) with a first signal path and a second signal path therein, a first finger disposed on the first signal path, a second finger disposed on the second signal path, a controller disposed on the PCB and coupled to a first memory via the first finger and to a second memory via the second finger, and a damping device disposed on the second signal path. The first and second signal paths share a common segment between the controller and a branch point on the PCB. The damping device is disposed between the second finger and the branch point. The distance between the first finger and the branch point within the first signal path is smaller than the distance between the second finger and the branch point within the second signal path.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: April 23, 2019
    Assignee: MEDIATEK INC.
    Inventors: PoHao Chang, Chun-Wei Chang
  • Patent number: 10262949
    Abstract: The present disclosure relates to a fan-out semiconductor package and a method of manufacturing the same. The fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member includes a first insulating layer, a first redistribution layer and a second redistribution layer disposed on one surface and the other surface of the first insulating layer opposing the one surface thereof, respectively, a second insulating layer disposed on the first insulating layer and covering the first redistribution layer, and a third redistribution layer disposed on the second insulating layer. A fan-out semiconductor package may include one or more connection units instead of the first connection member.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: April 16, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dae Hyun Park, Han Kim, Kang Heon Hur, Young Gwan Ko, Jung Ho Shim