Patents Examined by Zahid Choudhury
  • Patent number: 11231746
    Abstract: A folding screen device includes a first body, a second body, a central processing unit (CPU), a first acceleration gyro sensor, a second acceleration gyro sensor, a first geomagnetic module and a second geomagnetic module. The first acceleration gyro sensor and the second acceleration gyro sensor are configured to obtain a body status of the folding screen device. The CPU is configured to control working statuses of the first geomagnetic module and the second geomagnetic module according to the body status.
    Type: Grant
    Filed: February 29, 2020
    Date of Patent: January 25, 2022
    Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.
    Inventor: Chaoxi Chen
  • Patent number: 11232211
    Abstract: A method, an apparatus and a device for sharing a password between a BIOS and an operating system are provided, which are applied to a Legacy boot mode. In the method, a user is prompted to input a password of the BIOS. The password inputted by the logon user is received and verified. The verified password is stored in a predetermined target memory and E820H information is created if the received password is verified as correct, where address data in the E820H information points to an address of the target memory. The address of the target memory is determined based on the created E820H information and memory contents are obtained if a password is set for the operating system. The logon user is permitted to log on the operating system if the acquired memory contents are verified as correct.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: January 25, 2022
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Binghui Zhang
  • Patent number: 11222121
    Abstract: Among other things, techniques for securely booting processors in a vehicle are described. An apparatus comprises a circuit coupled to one or more processors of a vehicle and managing a secure boot process for the processors. The circuit receives an indication that the vehicle has been powered on and sends, to a network server, a request for boot files for the processors of the vehicle. In response, the circuit receives, from the server, most recent versions of boot files respectively corresponding to the processors, wherein each boot file includes a digital signature of a trusted authority. In response to obtaining the most recent versions of the boot files, the circuit sequentially boots the processors using the respective boot files, wherein each processor executes a corresponding boot file upon verifying authenticity of the digital signature in the boot file using a corresponding class authentication key.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: January 11, 2022
    Assignee: Motional AD LLC
    Inventors: Karl Robinson, Zachary David Gauci
  • Patent number: 11216059
    Abstract: Dynamic tiering of datacenter power for workloads is disclosed. A power capacity, including redundant power capacity and granular power capacity values within a datacenter, is determined. An outage time duration requirement for the power capacity that was determined is evaluated, where the outage time duration requirement is a number of minutes. A hold time duration requirement for the power capacity is evaluated, where the hold time duration is a number of minutes. A number of allowable occurrences of power outage for the power capacity is evaluated. A power requirement metric, based on the outage time duration requirement, the hold time duration requirement, and the number of occurrences, is calculated. A power topology within the datacenter is modified based on the power requirement metric. The modifying provides dynamic power tiering within the datacenter. The dynamic tiering includes a variable service level agreement for power within the datacenter.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: January 4, 2022
    Inventors: Clark A. Jeria Frias, Karimulla Raja Shaikh, Shankar Ramamurthy
  • Patent number: 11200134
    Abstract: An anomaly detection apparatus estimates time series data of a first signal of each appliance by disaggregating an aggregate signal that is a sum of first signals of a plurality of appliances into each first signal of an individual appliance, calculates a residual by subtracting sum of the estimated first signals of the plurality of appliances from the aggregate signal, and obtains value of the second signal at a time point at which the residual indicates presence of anomaly, and checks if there is match of pair of value of the estimated first signal and estimated state of the appliance, with any one of the one or more pairs of value of the first signal and state of the appliance, stored in a table, in association with the value of the second signal at the time point at which the residual indicates presence of anomaly to identify appliance with anomaly.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 14, 2021
    Assignee: NEC CORPORATION
    Inventors: Murtuza Petladwala, Ryota Suzuki, Shigeru Koumoto
  • Patent number: 11200065
    Abstract: Examples associated with boot authentication are described. One example includes initiating a power on self-test (POST) phase of a boot of a system. Prior to initiating a driver execution environment phase of the POST phase, a network stack may be loaded for a network port. An encrypted key may be retrieved from a trusted component of the system. Boot of the system may be permitted to proceed upon establishing a connection with an authentication server, and authenticating the system to the authentication server based on the encrypted key.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 14, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter Seiler, Michael Kinney, Vinh Anh Nguyen, Aaron Romero
  • Patent number: 11194382
    Abstract: A processing system includes a memory controller that preemptively exits a dynamic random access (DRAM) integrated circuit rank from a low power mode such as power down mode based on a predicted time when the memory controller will receive a request to access the DRAM rank. The memory controller tracks how long after a DRAM rank enters the low power mode before a request to access the DRAM rank is received by the memory controller. Based on a history of the timing of access requests, the memory controller predicts for each DRAM rank a predicted time reflecting how long after entering low power mode a request to access each DRAM rank is expected to be received. The memory controller speculatively exits the DRAM rank from the low power mode based on the predicted time and prior to receiving a request to access the DRAM IC rank.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: December 7, 2021
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventor: Kedarnath Balakrishnan
  • Patent number: 11188142
    Abstract: A rules-based mechanism is described for powering down racks in an ordered and autonomous way in a data center. Power shelf controllers (PSCs), on different racks or on the same rack, communicate together through a network, called the PSC network, separate from the data network. The PSCs are aware of the other PSCs that share the same input power domain. When the racks are configured for use, each PSC is assigned a priority value, based upon the management provisioning layer assignment. Each PSC creates a table of all the other PSCs and tracks each assigned priority value. When a power event occurs, the PSC can power down components within the rack in accordance with the priority table. Recovery can also be carried out in conformance with the priority table.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: November 30, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher James BeSerra, David Edward Bryan, Gavin Akira Ebisuzaki, Michael Jon Moen, Roey Rivnay
  • Patent number: 11184994
    Abstract: According to one aspect, an apparatus includes a first component, a plurality of line card slots, a fan array, and a sensor arrangement. The first component has a first opening defined therein and a second opening defined therein. The first component includes a first configurable line card flapper is arranged to at least partially cover the first opening and a second configurable line card flapper is arranged to at least partially cover the second opening. The plurality of line card slots includes a first line card slot associated with the first opening and a second line card slot associated with the second opening. The fan array includes a plurality of fans. The sensor arrangement includes at least one sensor arranged to monitor at least one condition. The first and second configurable line card flappers are arranged to be configured using information obtained from the sensor arrangement.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: November 23, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Mandy Hin Lam, Vic Hong Chia, M. Baris Dogruoz
  • Patent number: 11176009
    Abstract: A method and apparatus for implementing power up detection in a power down cycle to dynamically determine whether a failed component in a system prevents another Initial Program Load (IPL) or re-IPL, or result in a loss of resources. Predefined mandatory functions are called to collect power down/up data that prevents re-IPL, or results in the reduction of resources. A user is notified, allowing the customer to continually utilize the system, while ordering hardware to be replaced.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Lee N. Helgeson, Derek Howard, Russel L. Young, George J. Romano, Mussie T. Negussie
  • Patent number: 11176256
    Abstract: A capability-based data processing architecture (100) integrating an attesting module (120) are disclosed, together with subroutines for: securing the booting phase of a replicated or unreplicated subsystem (150) of computing units (130, 140) in the architecture and attesting to same; for adding and removing computing units (140) to and from booted systems 150; for relabelling authentication tokens when the booted subsystem (150) comprises computing units; for sealing and unsealing a memory storing data structures that are processed by the other subroutines described herein; and for recovering a booted subsystem (150) beset by faults.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: November 16, 2021
    Assignee: Université du Luxembourg
    Inventors: Marcus Völp, Paulo Esteves-Veríssimo
  • Patent number: 11170111
    Abstract: An information handling system may include a management controller configured to direct a basic input/output system to generate an advanced configuration power interface (ACPI) event that is triggered by an update of a host interface attribute. A processor provides at least one function to publish and configure a host interface, where the host interface is associated with a management service. The processor may also detect the ACPI event triggered by the update of the host interface attribute. Subsequent to the detection of the ACPI event, a structure of the host interface associated with the management service and a supported authentication type and security information associated with the supported authentication type may be determined. The processor may authenticate to the host interface via the supported authentication type using the security information and update an operating system variable associated with the update of the host interface attribute.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 9, 2021
    Assignee: Dell Products L.P.
    Inventors: Srinivas Giri Raju Gowda, Syama Sundar Poluri
  • Patent number: 11163349
    Abstract: A Power over Ethernet (PoE) adaptive powering system includes a powered device that identifies a first operating mode in which the powered device is currently operating, determines a first power amount that is required to enable the first operating mode in which the powered device is currently operating, and transmits a first power amount request message that requests the first power amount via a power/data connection. The adaptive PoE powering system also includes a powering device that is connected to the powered device via the power/data connection, and that receives the first power amount request message via the power/data connection, and transmits the first power amount via the power/data connection to the powered device.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: November 2, 2021
    Assignee: Dell Products L.P.
    Inventors: Aravind Prasad Sridharan, Vigneshwar Kalyanaraman, Ramesh Ganapathi
  • Patent number: 11144327
    Abstract: A method for operating a control unit including a start-up of the control unit in order to bring it into an operative state, and a first start sequence is optionally carried out during the start-up of the control unit in order to set the control unit to a first mode, or a second start sequence is carried out in order to set the control unit to a second mode, the first start sequence including an additional self-test in contrast to the second start sequence.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: October 12, 2021
    Assignee: Robert Bosch GmbH
    Inventor: Alfred Kuttenberger
  • Patent number: 11137809
    Abstract: A plurality of thermal electric cooler (TEC) elements are formed in a TEC grid structure. Control logic dynamically varies a supply current supplied to each TEC element (or group of TEC elements) in the TEC grid based on changes in power density respectively associated with areas cooled by each of the TEC elements or group of TEC elements.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: October 5, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Karthik Rao, Wei Huang, Xudong An, Manish Arora, Joseph L. Greathouse
  • Patent number: 11126251
    Abstract: The present disclosure includes apparatuses and methods related to power management in memory. Memory devices with multiple input/output ports may have the ports separately managed to transfer data from the various to a host or other components of the module based on certain power management signaling or constraints. For example, a memory device with multiple ports may be managed to transfer data to a host from one set of ports in response to power management (or other) signaling, and the device may be managed to transfer other data to another memory device in response to different power management (or other signaling). Power management may be done onboard a memory module with or without direction from a host. Power management may be performed by a dedicated integrated circuit. Data may be transferred from or between different classes of memory devices, using different ports, based on power management, e.g., criteria.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: September 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Frank F. Ross, Matthew A. Prather
  • Patent number: 11126237
    Abstract: According to one embodiment, an electric power supply system includes a processor, a power circuit and an embedded controller. The processor includes a first controller configured to modify an operating frequency of the processor and a second controller configured to modify an operating power of the processor. The power circuit and the embedded controller detect a presence or an absence of a battery in parallel. The power circuit instructs the first controller to modify the operating frequency when removal of the battery is detected. The embedded controller causes the second controller to modify the operating power via a Basic Input/Output System (BIOS) when the removal of the battery is detected, and causes the first controller to stop modify the operating power via the power circuit.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: September 21, 2021
    Assignee: TOSHIBA CLIENT SOLUTIONS CO., LTD.
    Inventors: Hideki Hirosawa, Tomonori Tsutsui
  • Patent number: 11119556
    Abstract: The present disclosure includes apparatuses and methods for providing indications associated with power management events. An example apparatus may include a plurality of memory units coupled to a shared power management signal. In this example apparatus, each of the plurality of memory units may be configured to provide to the other of the plurality of memory units, via the shared power management signal, an indication of whether the one of the plurality of memory units is entering a power management event. Further, each of the plurality of memory units may be configured to, if the one of the plurality of memory units is entering the power management event, an indication of a particular operation type associated with the power management event.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: September 14, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Vipul Patel
  • Patent number: 11119562
    Abstract: A method comprises receiving, by a computing device, a desired usage plan for a plurality of user devices associated with a group of users; determining, by the computing device, whether an amount of power available across the plurality of user devices is sufficient to implement the desired usage plan; generating, by the computing device and based on the amount of power available across the plurality of user devices for the desired usage rules, usage rules that allocate the usage of the plurality of the user devices by each user in the group of users; and outputting to the plurality of user devices, the usage rules to cause the plurality of user devices to limit the usage of the plurality of user devices by each user in the group of users based on the allocation.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James E. Bostick, John M. Ganci, Jr., Martin G. Keen, Sarbajit K. Rakshit
  • Patent number: 11112846
    Abstract: Embodiments of the present disclosure relate to detecting undervoltage conditions at a subcircuit. A power supply current of a first subcircuit is determined over a first number of previous clock cycles. A cross current flowing between the first subcircuit and a second subcircuit is determined over the first number of previous clock cycles. An estimated momentary supply voltage present at the first subcircuit is then determined based on the power supply current of the first subcircuit over the first number of previous clock cycles and the cross current flowing between the first subcircuit and the second subcircuit over the first number of previous clock cycles.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 7, 2021
    Assignee: International Business Machines Corporation
    Inventors: Thomas Strach, Preetham M. Lobo, Tobias Webel