Abstract: An electronic apparatus and controlling method thereof is provided. The electronic apparatus includes a processor configured to, based on receipt of a command to execute an application, execute the application based on the boosting level information, based on a difference between a loading time according to the application being executed and a reference loading time being equal to or greater than a threshold value, identify another boosting level information of the electronic apparatus based on the reference loading time, and update the stored boosting level information to the identified other boosting level information.

Abstract: Systems and methods for automatically removing and replacing outdated compute resources in a cluster. The systems and methods include a configurable monitoring system that is configured to detect outdated compute resources and trigger a cycling process to automatically replace the detected outdated compute resources with new compute resources. The disclosed systems and methods safely rotate a group of compute resources by identifying and detaching outdated compute resources, waiting until the outdated compute resources have been drained of pending jobs scheduled on these resources, waiting until replacement compute resources have started and then cordoning, draining, deleting and terminating the outdated compute resources.

Abstract: A system comprising a plurality of self-powered devices and at least one remote device. The plurality of self-powered devices may be configured to perform instructions. The plurality of self-powered devices may be configured to select one of a plurality of modes of operation. The remote device may be configured to store scheduling data. The remote device may be configured to communicate with the self-powered devices. The self-powered devices may select one of the plurality of modes of operation based on the scheduling data.

Abstract: An information handling system for composing composed information handling systems includes managed devices and a system control processor, of a composed information handling system of the composed information handling systems. The system control processor, during a restart of the composed information handling system: obtains an inventory of all hardware devices utilized by the composed information handling system, calculates, based on a subset of the hardware devices specified by the inventory, a power envelope for the information handling system, makes a determination that the power envelope does not exceed a power capacity of the managed devices; and, based on the determination and following the restart, provides computer implemented services using the hardware devices while operating the managed devices based on the power envelope.

Abstract: A method may include, during a first initial boot of a management controller, writing baseline processor domain status information associated with boot of each of a main processor and a second processor of the management controller to a baseline queue, and during each subsequent boot of the management controller, writing run-time processor domain status information associated with boot of each of the main processor and the second processor to a run-time queue, determining if a deviation exists between the run-time queue and the baseline queue, and responsive to the deviation existing between the run-time queue and the baseline queue, taking one or more responsive actions.

Abstract: In one embodiment, a method for validating a partition of a device communicably coupled to an information handling system includes: determining platform attributes associated with the information handling system; identifying a platform key associated with the information handling system; generating a trusted platform key for the information handling system based on the platform attributes and the platform key; determining partition attributes associated with the partition of the device; generating a storage root key for the partition of the device based on the partition attributes and the trusted platform key; generating a trusted boot signature for the partition of the device based on the trusted platform key and the storage root key; and storing the trusted boot signature in the partition of the device to validate the partition.

Abstract: An orbital computation engine is used to provide ancillary computational data processing on an orbital vehicle and is mounted to or integral with the orbital vehicle. A computation circuit receives power from the orbital vehicle and is responsive to power availability from the orbital vehicle to selectively withdraw power for data processing from the orbital vehicle. A communication circuit provides communication with a terrestrial source, and may be a discrete circuit or integrated with the host satellite's communication system. The computation engine withdraws power for data processing from the orbital vehicle and provides the orbital computation engine with available power for ancillary computational data processing from the orbital computation engine's native power supply.

Abstract: An asset includes physical computing resources and a physical computing resources manager. The physical computing resources manager obtains a resource update for the asset; makes a determination that the resource update requires a reset of a portion of the physical computing resources; and, based on the determination, resets the portion of the physical computing resources during a low resource consumption reboot of the asset without resetting a second portion of the physical computing resources, the second portion of the physical computing resources are not reset as part of the low resource consumption reboot.

Abstract: A power switch device includes a switch, a control unit, and a communication interface. The switch includes a power input terminal, which is configured to receive an external power; and a power output terminal, which is configured to output the external power. The switch normally remains open. The control unit is turned on when receiving the external power via the power input terminal, and transmits a start request via the communication interface. The control unit determines whether the communication interface receives a busy message within a delay time period. If the busy message is not received within the delay time period, the control unit controls the switch to be closed, and sets a start process time period. Within the start process time period, if the communication interface receives another start request, the control unit generates another busy message to respond to the another start request via the communication interface.

Abstract: A system, method and apparatus to authenticate an endpoint having a secure memory device. For example, at boot time of the endpoint, a cryptographic hash value of the boot loader stored in the memory device is used to generate a device identifier of the memory device; and identification data of multiple components of the endpoint is used with the device identifier of the memory device to generate a first key pair key and a second key. A counter value is retrieved from a monotonic counter to generate a certificate signed using a private key in the first key pair. The certificate can be sent over the computer network to a remote server for authentication using a public key in the first key pair. The second key pair can be authenticated and used to establish encryption for a communication connection between the endpoint and the server.

Abstract: In general, this disclosure describes techniques for using a random number generator to affect the lengths of clock cycles in a clock waveform that drives the timing of operations performed by processing circuitry. In one example, the processing circuitry includes a central processing unit and a clock generator. The clock generator is configured, upon receiving an indication of a boot command for the processing circuitry, generate a random number using a true random number generator and generate, based at least in part on the random number, an output clock waveform indicating at least a length of a clock cycle for the central processing unit. The central processing unit is configured to execute a boot sequence for at least the processing circuitry using the output clock waveform.

Abstract: [Object] To provide an information processing apparatus, an information processing method, and a program that are capable of improving the convenience of the communication connection to an external apparatus. [Solution] An information processing apparatus including: a control unit configured to detect an external apparatus in a wireless communication scheme, and perform control such that power ON request data is transmitted to the external apparatus in accordance with a detection result within a certain time from a detection processing start for the external apparatus, the power ON request data requesting the external apparatus to be powered on.

Abstract: Techniques facilitating security hardening systems that host containers are provided. In one example, a system comprises: a memory that stores computer executable components; and a processor that executes computer executable components stored in the memory. The computer executable components comprise: a boot component performs a portion of a trusted boot sequence to securely boot the system to a defined secure state wherein one or more types of administrative access to a container memory are deactivated. The computer executable components also comprise: a core service component started as a part of the trusted boot sequence and that securely obtains one or more decryption keys for use with the container memory; and a runtime decryption component that uses the one or more decryption keys to perform runtime decryption of one or more files accessed by a container associated with the container memory.

Abstract: According to one embodiment, an electric power supply system includes a processor, a power circuit and an embedded controller. The processor includes a first controller configured to modify an operating frequency of the processor and a second controller configured to modify an operating power of the processor. The power circuit and the embedded controller detect a presence or an absence of a battery in parallel. The power circuit instructs the first controller to modify the operating frequency when removal of the battery is detected. The embedded controller causes the second controller to modify the operating power via a Basic Input/Output System (BIOS) when the removal of the battery is detected, and causes the first controller to stop modify the operating power via the power circuit.

Abstract: A removable device and method for automatically booting a computer running a standard operating system (OS) into an alternative OS. The method comprises a user inserting the removable device into the computer, and the user launching an application stored on the removable device for booting guidance. The user directs the application to boot the computer into the alternative OS, whereupon the application determines a first booting technique to be used on the computer and configures the computer accordingly. The application restarts the computer in an attempt to boot into the alternative OS. If booting the alternative OS fails, the computer boots back into the standard OS, whereupon the application determines a next best booting technique and configures the computer accordingly. This process continues until the alternative OS is successfully booted, or, failing that, the user is given manual booting direction.

Abstract: A computer system includes one or more memory devices, non-resettable memory elements and a processor. The first memory device is configured to store in the one or more memory devices (i) a first version of a multi-stage bootstrap program for bootstrapping the computer system, the bootstrap program including a self-test program that tests the bootstrap program, and (ii) a second version of the bootstrap program known to be trustworthy. The non-resettable memory elements are configured to store non-resettable indicators including at least a self-test-request indicator and a self-test-passed indicator. The processor is configured to retrieve the first version of the bootstrap program, and, if the first version is at least as recent as the trustworthy second version, to bootstrap the computer system securely using the first version and the non-resettable indicators.

Abstract: In one embodiment, a gaming system, method, and device may have a memory having a plurality of power management rules and a processor configured to receive a power status information from another device, retrieve at least one power management rule from the memory, and configure a power state of the gaming device or its peripheral device based on the power status information and the at least one power management rule.

Abstract: An information processing apparatus having at least a first controller and a second controller. The second controller includes a CPU and a first storage for storing, in a non-volatile manner, a first program to be executed by the CPU. When the information processing apparatus is started up, the first controller verifies a presence or absence of alteration of the first program stored in the first storage, and causes the CPU to start up after confirming by the verification that the first program has not been altered.

Abstract: An integrated-circuit device comprises a source register in a reset domain, a destination circuit outside the reset domain, and a reset checking circuit. The checking circuit comprises a buffer outside the reset domain for receiving data values output by the source register, a reset detector, and reset checking logic. The checking logic detects a new data value output by the source register, checks whether a reset of the reset domain has been detected, and contingently outputs a control signal for controlling whether the destination circuit receives the new data value from the buffer. The reset detector signals whether a reset has been detected by using a feedback path to hold a predetermined value in a resettable latch until the latch receives a reset signal, and to hold a different value in the latch after receiving a reset signal.

Abstract: An apparatus includes a subsystem, a first processor, a memory, a circuit and a second processor. The first processor is to execute bootstrap instructions, and the memory is to store second instructions. The circuit is to hold the first processor in reset in response to the apparatus being powered on; and the second processor is to, while the first processor is held in reset, execute the second instructions to initialize the subsystem.