Abstract: An ESD protection circuit with tunable gate-bias coupled between a first and second pads for receiving power supply voltages. The ESD protection circuit includes a diode, a resistor coupled between the cathode of the diode and the first pad, a capacitor coupled between the cathode of the diode and the second pad, a first transistor of a first conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the second pad, a second transistor of a second conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the first pad, and a third transistor of the first conductivity type having a gate coupled to the anode of the diode, a drain coupled to the first pad and a source coupled to the second pad.

Abstract: A method of making tungsten plug of integrated circuit is disclosed. The present invention is structured to deposit W metal by CVD onto the wafer which has Ti/TiN sputtered on as its top layer by employing quartz clamp rings of different sizes in two CVD chambers. The method can eliminate the Volcano phenomena in Ti, TiN or W metals and prevent peeling.

Abstract: A digital technique for pulse width modulation (PWM) utilizes a tapped delay line 304 receiving a reference clock and generating a plurality of time delayed reference clock transitions having finer time resolution than the reference clock signal. A multiplexer 120 receives the plurality of time delayed reference clock transitions as an input thereto and producing an output when one of the plurality of time delayed reference clock transitions is addressed. An accumulator circuit 524 generates control timing signals associated with the input signal sampling rate Fsample that are used to select outputs from the delay line 304 representing a pulse width modulated output signal.

Abstract: A cladding structure includes a plurality of serial buses, an insulating covering layer surrounding the serial buses, a metallic plating layer mounted on the covering layer, and a metallic protective layer mounted on the plating layer. Thus, the cladding structure can prevent an electromagnetic interference efficiently. In addition, the cladding structure has a steady signal transmission.

Abstract: An electrostatic discharge protection circuit. The electrostatic discharge (ESD) circuit utilizes inductors and resistors added to sources of multiple fingers of the NMOS transistor, which is triggered by some feedback circuit uniformly. When under an ESD zapping, a finger MOS transistor is trigger initially to snapback region owing to its layout or other causes, a voltage drop across the inductor or the resistor connected to the source of the finger MOS transistor is occurred and presented to gates of the other finger MOS transistors by the feedback circuit. Thus, the other finger MOS transistors are turned on.

Abstract: A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads, and the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads that does not electrically connect to anyone of the first pads electrically connects to the interconnection-wiring layer. In another case, a shielding portion, which electrically connects the interconnection-wiring layer, is provided around the second pad that doesn't electrically connect to anyone of the first pads. Furthermore, this invention also discloses a semiconductor device including the substrate.

Abstract: A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads while the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads isn't electrically connected with anyone of the first pads, and other second pads that located adjacent to this second pad, which is not electrically connected with the first pads, electrically connect to the interconnection-wiring layer. Furthermore, this invention also discloses a semiconductor device including the substrate.

Abstract: An electrostatic discharge protection circuit. The electrostatic discharge protection circuit utilizes the non-uniform triggering of multi-finger gate-grounded NMOS. The source of the finger which has the potential to trigger on is coupled to the base terminal of all the parasitic bipolar transistor of all the other multi-finger gate-ground NMOS structures. Thus, the finger which has the potential to be triggered can be used as a triggering device to trigger the other finger devices during an ESD event. By using this method, the ESD protection NMOS or PMOS, realized with multi-finger layout structure, can be uniformally triggered on to discharge ESD current. Therefore, it can have a high ESD robustness in a small layout area.

Abstract: A method for translating two-dimensional data of a DWT system has a stairway scan way with a border extension to translate a two-dimensional data to at least two one-dimensional data to be able to execute in the Wavelet transform. The one-dimensional data with less extension data in executing the wavelet transform not only uses small size memory but also has high transforming speed. Therefore the two-dimensional data is compressed by the wavelet transform with the boundary extension process according to the present invention has good compressed rate.

Abstract: A resilient exercise hoop includes a resilient hoop body, two pressing members, and a resistance member. The resilient hoop body is circular in shape but deformed to be elliptic while pressed by an external force. While the external force is eliminated, the hoop body will recover the circular shape. The two pressing members face in opposite directions for pressing by the user to deform the resilient hoop body. The resistance member has two ends, which are respectively connected to two predetermined opposite sides of the resilient hoop body, with resilience for resisting the two opposite sides of the hoop body from outward extension and deformation. In addition, the resilience of the resistance can be variated by the user.

Abstract: An low-voltage triggered PNP device for input signals with voltage level larger than VDD or less than VSS. The ESD protection device provides an ESD path from a first to a second node for protection of an internal circuit. The device comprises a substrate of a first conductivity type coupled to the first node, a first doped region of a second conductivity type in the substrate, wherein the first doped region is floated, a second doped region of the first conductivity type in the first doped region coupled to the second node, and a third doped region in the substrate, adjacent to the first doped region, to have a low trigger voltage.

Abstract: The present invention relates to a device for protecting high frequency RF integrated circuits from ESD damage. The device comprises at least one varactor-LC circuit tank stacked to avoid the power gain loss by the parasitic capacitance of ESD circuit. The varactor-LC tank could be designed to resonate at the RF operating frequency to avoid the power gain loss from the parasitic capacitance of ESD circuit. Multiple LC-tanks could be stacked for further reduction in the power gain loss. A reverse-biased diode is used as the varactor for both purposes of impedance matching and effective ESD current discharging. Because the inductor is made of metal, both the inductor and the varactor can discharge ESD current when ESD condition happens. It has a high enough ESD level to prevent ESD discharge.

Abstract: The present invention discloses an airflow capture booth with single-plate windbreak comprising an extracting means for extracting polluted air having an opening for air contamination extracting through and a crosswind device for simulating crosswind, the improvement comprises that said crosswind device having a single-plate windbreak perpendicular to an airflow direction of said crosswind having a specific distance to said opening of said extracting means for forming a capture zone, wherein the airflow of said capture zone is not easy to be shed and is extracted mostly by said extracting means.

Abstract: A connection of the sound bowl and connecting portion of a loudspeaker is disclosed. The connection area is adhered with the elastic materials similar to the materials of sound bowl and connecting portion in order to beautify the appearance of loudspeaker and enhance the adhesion. Thereby the tolerance of the loudspeaker is enhanced. Thus, the loudspeaker is tolerable to vibration and produces sound with precise tunes, and stabilizes the quality of sound.

Abstract: A diode string with very low leakage current is used in power supply ESD clamp circuits. By adding an CMOS-Controlled Lateral SCR device into the cascaded diode string, the leakage current of this new diode string with 6 cascaded diodes under 5 Volts (3.3 Volts) forward bias can be controlled below 2.1 (1.07) nA at a temperature of 125° C. in a 0.35 &mgr;m silicide CMOS process. The holding voltage of this design with the CMOS-Controlled Lateral SCR can be linearly adjusted by changing the number of the cascaded diodes in the diode string for the application among the power lines with different voltage levels. The ESD level of this ESD clamp circuit is greater than 8,000 Volts in the Human-Body-Model ESD test. The diodes string is suitable for portable or low-power CMOS Integrated Circuit (IC) devices.

Abstract: An electrostatic discharge (ESD) protection scheme. The scheme utilizes traces in a package substrate to bridge a power ESD clamp circuit and a protected circuit, and comprises a conductive trace in a package substrate and a chip die. The chip die has a protected circuit powered by a first high power rail and a first low power rail, and a power ESD clamp circuit coupled between a second high power rail and a second low power rail. The first high, first low, second high and second low power rails are all fabricated on the IC chip die. The first high power rail is separated from the second high power rail on the chip die, and, during an ESD event, is coupled to the second high power rail through the conductive trace in the package substrate.

Abstract: The present invention discloses an airflow capture booth with single-plate windbreak comprising an extracting means for extracting polluted air having an opening for air contamination extracting through and a crosswind device for simulating crosswind, the improvement comprises that said crosswind device having a single-plate windbreak perpendicular to an airflow direction of said crosswind having a specific distance to said opening of said extracting means for forming a capture zone, wherein the airflow of said capture zone is not easy to be shed and is extracted mostly by said extracting means.

Abstract: An ESD protection circuit for Mixed-Voltage I/O by using stacked NMOS transistors with substrate triggering technique is disclosed. The ESD protection circuit contains a set of stacked NMOS transistors with a first NMOS transistor and a second NMOS transistor, a parasitic lateral bipolar transistor, a substrate current generating circuit, and a parasitic substrate resistor. The drain of the first NMOS transistor connects to an I/O pad. The gate of the first NMOS transistor connects to a first working voltage. The source of the first NMOS transistor connects to the drain of the second NMOS transistor. The gate of the second NMOS transistor connects to an internal circuit. The source of the second NMOS transistor connects to a second working voltage. The collector of the parasitic lateral bipolar transistor connects to the drain of the first NMOS transistor and its emitter connects to the source of the second NMOS transistor.

Abstract: The invention provides shuttle vectors, and methods of using shuttle vectors, capable of expression in, at least, a mammalian cell. Furthermore, the shuttle vectors are capable of replication in at least yeast, and optionally, bacterial cells. Also provided is a method wherein yeast are transformed with a shuttle vector as provided herein. Heterologous nucleic acids flanked by 5′ and 3′ ends identical to a homologous recombination site within the shuttle vector are introduced to the transformed yeast and allowed to homologously recombine with the shuttle vector such that they are inserted into the vector by the yeast organism. The shuttle vector is then recovered and transferred to a mammalian cell for expression.

Abstract: An assistant training equipment mainly for helping people to do sit-ups, which comprises a connecting shaft, a supporting assembly and a holding assembly. The connecting shaft consists of a main tube and two sliding shafts slidable receive in the opposite ends of the main tube respectively. Each of the sliding shafts has an elastic bottom, which is to engage to openings on the main tube for locking the connecting shaft in a specific length. The supporting assembly is secured at one end of the connecting shaft for user to put his/her feet thereon. The holding assembling is secured at the other end of the connecting shaft for user to hold it by hands. Thus, when user do sit-ups with the assistance of the present invention, the loading of the user's back will reduce by user's hands exerting on the holding assembly.