Patents by Inventor ADARSH
ADARSH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250126293Abstract: A device for decoding point cloud data includes: one or more memories configured to store the point cloud data; and processing circuitry coupled to the one or more memories, wherein the processing circuitry is configured to: apply a first process to a reference point cloud frame to generate a first level processed frame; apply a second process to the first level processed frame to generate a second level processed frame; inter-prediction decode geometry data of points of a current point cloud frame using the first level processed frame; and inter-prediction decode attribute data of points of the current point cloud frame using the second level processed frame.Type: ApplicationFiled: October 10, 2024Publication date: April 17, 2025Inventors: Adarsh Krishnan Ramasubramonian, Geert Van der Auwera, Marta Karczewicz
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Publication number: 20250122855Abstract: Techniques for detecting failures associated with fuel distribution systems. The techniques may include receiving first oil pressure data associated with an engine of a machine and receiving second oil pressure data associated with a high-pressure pump supplying fuel to the engine. Based at least in part on the first oil pressure data and the second oil pressure data, an impending failure associated with the high-pressure pump may be determined. For instance, utilizing the first oil pressure data and the second oil pressure data, a difference between a first oil pressure value associated with the engine and a second oil pressure value associated with the high-pressure pump may be calculated. The difference in the oil pressure values and the second oil pressure value may be indicative of the impending failure. In some instances, an action may be performed based on detecting the impending failure.Type: ApplicationFiled: October 16, 2023Publication date: April 17, 2025Applicant: Progress Rail Locomotive IncInventor: Adarsh Gopinathan Nair
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Publication number: 20250121516Abstract: According to a first aspect there is disclosed a housing assembly comprising: a housing body defining an interior space configured to receive a switch, and an aperture configured to provide access to the interior space from an exterior of the housing body; a soft sealing element disposed in the aperture and bonded to the housing body so as to seal the aperture between the interior space and the exterior of the housing body, the soft sealing element configured to be elastically deformable to actuate the switch when disposed in the housing body; and a hard island fixed to the soft sealing element, wherein the hard island is separate from, and moveable relative to, the housing body into the interior space so as to elastically deform the soft sealing element to actuate the switch when disposed in the housing body.Type: ApplicationFiled: September 12, 2022Publication date: April 17, 2025Inventors: NIELS SCHIPPER, KARST HENDRIK DE VRIES, ADARSH SHRIVASTAVA
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Publication number: 20250121959Abstract: Implementations of the disclosed subject matter may provide an adaptive thrust structure for a space launch vehicle that may include an interface block that is fluidically coupled to a fuel supply, a fuel manifold, an oxidizer supply, and an oxidizer manifold. A first adapter plate may be coupled to a first engine assembly. First adapter lines may be fluidically coupled to the first engine assembly and the interface block, via the first adapter plate. A second engine assembly, second adapter lines, and a second adapter plate are capable of replacing the first engine assembly, first adapter lines, and first adapter plate. Implementations of the disclosed subject matter may provide a reusable and reconfigurable launch vehicle that may include a reusable second stage, and a reusable and reconfigurable transporter having a plurality of zones that are configurable to transport cargo, one or more passengers, and/or one or more satellites.Type: ApplicationFiled: October 7, 2024Publication date: April 17, 2025Inventors: Juha NIEMINEN, Adarsh RAJGURU, Nicholas ORENSTEIN, Enzo BLEZE
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Publication number: 20250117329Abstract: Methods and apparatus relating to an instruction and/or micro-architecture support for decompression on core are described. In an embodiment, decode circuitry decodes a decompression instruction into a first micro operation and a second micro operation. The first micro operation causes one or more load operations to fetch data into one or more cachelines of a cache of a processor core. Decompression Engine (DE) circuitry decompresses the fetched data from the one or more cachelines of the cache of the processor core in response to the second micro operation. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: November 14, 2024Publication date: April 10, 2025Applicant: Intel CorporationInventors: Jayesh Gaur, Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney, Wajdi Feghali
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Publication number: 20250119581Abstract: A device for decoding encoded mesh data is configured to receive, in a bitstream of the encoded mesh data, one or more syntax elements; determine an offset value based on the one or more syntax elements; determine a set of transform coefficients; apply the offset to the set of transform coefficients to determine a set of updated transform coefficients; inverse transform the set of updated transform coefficients to determine a set of displacement vectors; and determine a decoded mesh based on the set of displacement vectors.Type: ApplicationFiled: September 11, 2024Publication date: April 10, 2025Inventors: Reetu Hooda, Geert Van der Auwera, Anique Akhtar, Adarsh Krishnan Ramasubramonian, Marta Karczewicz
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Publication number: 20250117350Abstract: Systems, apparatuses, and methods for serial peripheral interfaces are provided, particularly for PVT compensated serial peripheral interfaces with slow transition serial interface IO transmitter with reduced delay. The serial peripheral interfaces may include driver circuitry, pre-driver circuitry, PVT compensated current sink circuitry, and PVT compensated current source circuit. The PVT compensated current sink circuitry and PVT compensated current source circuit may generate and transmit signals compensating for PVT to the pre-driver circuitry, which may generate and transmit signals controlling IO data signals generated by the driver circuitry. The IO data signals generated may be compensated for process, voltage, and temperature. The compensation may provide IO data signals with slower transition times and with reduced delays.Type: ApplicationFiled: July 30, 2024Publication date: April 10, 2025Inventors: Manoj Kumar TIWARI, Paras GARG, Sandeep KAUSHIK, Adarsh Kumar SINGH
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Patent number: 12271992Abstract: A method including receiving (S605) a request for a depth map, generating (S625) a hybrid depth map based on a device depth map (110) and downloaded depth information (105), and responding (S630) to the request for the depth map with the hybrid depth map (415). The device depth map (110) can be depth data captured on a user device (515) using sensors and/or software. The downloaded depth information (105) can be associated with depth data, map data, image data, and/or the like stored on a remote (to the user device) server (505).Type: GrantFiled: September 1, 2021Date of Patent: April 8, 2025Assignee: GOOGLE LLCInventors: Eric Turner, Adarsh Prakash Murthy Kowdle, Bicheng Luo, Juan David Hincapie Ramos
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Publication number: 20250110965Abstract: An example method may include executing, using an integration plugin installed on a first cloud-based automation platform running in a first management node, a schedule job to obtain an API response from a second management node executing a second cloud-based automation platform. The API response may include a custom form schema of a first form associated with the second cloud-based automation platform in a first defined data format. Further, the method may include parsing the custom form schema to determine form fields and dependency of the form fields. Furthermore, the method may include translating the custom form schema into a second defined data format supported by the first cloud-based automation platform based on the parsed custom form schema. Further, the method may include persisting the translated custom form schema in a database associated with the first cloud-based automation platform.Type: ApplicationFiled: September 18, 2024Publication date: April 3, 2025Inventors: AMIT KOLKAR, KALYAN DEVARAKONDA, MURALI SAMPANGIRAMAIAH, ADARSH SUPARNA
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Patent number: 12267527Abstract: An example device for coding point cloud data includes a memory configured to store point cloud data; and one or more processors implemented in circuitry and configured to: determine whether inter prediction data is coded for a current node of an octree of the point cloud data; determine whether planar mask data is coded for the current node; when at least one of the inter prediction data or the planar mask data is coded for the current node, avoid coding a single occupancy value for the current node, the single occupancy value indicating whether only a single sub-node of the current node includes a point; and code the current node. The processors may also be configured to determine a context for entropy coding the planar mask data according to planar mask data for a collocated node in a reference frame when the planar mask data is coded.Type: GrantFiled: June 30, 2022Date of Patent: April 1, 2025Assignee: QUALCOMM IncorporatedInventors: Luong Pham Van, Geert Van der Auwera, Adarsh Krishnan Ramasubramonian, Marta Karczewicz
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Publication number: 20250099014Abstract: The embodiments of the present disclosure herein address unresolved problems of quality of signals in real time for wearables to provide optimal signals which can be used for brain signal based applications. Further, conventional techniques fail to provide real-time calibration of wearable devices, to understand the quality of the signals from the wearable device. Embodiments herein provide a method and system for a real-time calibration of one or more Electroencephalography (EEG) signals received from a wearable Ear-EEG device. The system is leveraging quality of signals in real time for wearables to provide optimal signals which can be used for early detection of neurodegenerative disease and brain-computer interface (BCI) applications. Further, the system is able to detect electrodes in the wearable device where the EEG signals have not been collected because the contact was not established.Type: ApplicationFiled: September 3, 2024Publication date: March 27, 2025Applicant: Tata Consultancy Services LimitedInventors: Jayavardhana Rama GUBBI LAKSHMINARASIMHA, Tanuja JAYAS, Kartik MURALIDHARAN, Adarsh ANAND, Ramesh Kumar RAMAKRISHNAN, Arpan PAL
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Patent number: 12261080Abstract: A method of forming a structure includes forming an alternating stack of first material layers and second material layers over a substrate, forming a mask layer over the alternating stack, forming a cavity in the mask layer, forming a first cladding liner on a sidewall of the cavity in the mask layer, and forming a via opening the alternating stack by performing an anisotropic etch process that transfers a pattern of the cavity in the mask layer through the alternating stack using a combination of the first cladding liner and the mask layer as an etch mask.Type: GrantFiled: March 31, 2022Date of Patent: March 25, 2025Assignee: Sandisk Technologies, Inc.Inventors: Roshan Jayakhar Tirukkonda, Monica Titus, Senaka Kanakamedala, Raghuveer S. Makala, Rahul Sharangpani, Adarsh Rajashekhar
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Publication number: 20250093942Abstract: Power sources provide power in a range with a maximum supply voltage provided under zero-load current conditions. Power circuits in an IC receive and aggregate indications of load current from processor circuits in processor circuit clusters and, reduce power consumption in the IC during zero or low load current conditions by generating a voltage control signal to reduce the supply voltage. Reducing the no-load voltage also reduces stress on gate oxides of transistors in the IC to increase oxide longevity. Based on the aggregated load current indications, which is periodically updated, the no-load supply voltage may be incrementally reduced down to a voltage threshold over the course of multiple periods. In some examples, the power circuits receive throttle signals when the processor circuits are throttled due to a voltage droop, and such signals may cause the power circuits to generate a control signal to increase the no-load voltage.Type: ApplicationFiled: September 19, 2023Publication date: March 20, 2025Inventors: Mahadevamurty Nemani, Adarsh Baraka Ravi, Nitin Makhija, Pradeep Kanapathipillai
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Publication number: 20250093931Abstract: Autonomously managing core cluster frequencies using performance statistics in processor devices is disclosed herein. In some aspects, a cluster power management circuit of a processor device collects Activity Management Unit (AMU) statistics for multiple processor cores for each of one or more frequency operating points over a time interval. Based on the AMU statistics, the cluster power management circuit generates a performance model representing processor performance as a function of frequency, and uses the performance model and a power consumption measurement to generate an energy-per-instruction (EI) model representing energy per instruction as a function of frequency. The cluster power management circuit then generates an advantage model based on a first rate of change of the performance model as a function of frequency and a second rate of change of the EI model as a function of frequency, and identifies a target frequency operating point based on the advantage model.Type: ApplicationFiled: September 15, 2023Publication date: March 20, 2025Inventors: Mahadevamurty Nemani, Anubhav Mishra, Arun Sukheja, Nitin Makhija, Adarsh Baraka Ravi
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Publication number: 20250093234Abstract: A crack detection system for a cylinder head associated with an internal combustion engine of a locomotive is disclosed. The crack detection system comprises: a closed-loop coolant system for cooling the cylinder head; a sensor assembly including a pressure sensor, and a speed sensor; and a controller in communication with the sensor assembly. The controller is configured to monitor a coolant pressure feedback and an engine duty cycle of the internal combustion engine. The controller is further configured to communicate an alert signal indicative of an existence of a crack in the cylinder head when: coolant pressure signals are greater than or equal to a first threshold and less than a second threshold; a pressure decay is calculated greater than a third threshold.Type: ApplicationFiled: September 14, 2023Publication date: March 20, 2025Applicant: Progress Rail Lomotive Inc.Inventors: Adarsh G. NAIR, Raji REXAVIER
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Patent number: 12256096Abstract: A device to code a point cloud data that includes a memory configured to store data representing points of a point cloud, and one or more processors implemented in circuitry and configured to: determine height values of points in a point cloud; code a data structure including data that represents a top threshold and a bottom threshold; classify points having height values between the top threshold and the bottom threshold into the set of ground points; classify points having height values above the top threshold or below the bottom threshold into the set of object points. The one or more processors code the ground points and the object points according to the classifications. The one or more processors code a geometry data unit header that includes data that overrides or refines the data of the data structure for the at least one of the top threshold or the bottom threshold.Type: GrantFiled: April 1, 2024Date of Patent: March 18, 2025Assignee: QUALCOMM IncorporatedInventors: Luong Pham Van, Adarsh Krishnan Ramasubramonian, Bappaditya Ray, Geert Van der Auwera, Marta Karczewicz
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Patent number: 12255242Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel, a memory film in contact with the vertical semiconductor channel, and a vertical stack of tubular dielectric spacers laterally surrounding the memory film. The tubular dielectric spacers may include tubular graded silicon oxynitride portions having a composition gradient such that an atomic concentration of nitrogen decreases with a lateral distance from an outer sidewall of the memory film, or may include tubular composite dielectric spacers including a respective tubular silicon oxide spacer and a respective tubular dielectric metal oxide spacer. Each of the electrically conductive layers has a hammerhead-shaped vertical cross-sectional profile.Type: GrantFiled: January 28, 2022Date of Patent: March 18, 2025Assignee: Sandisk Technologies Inc.Inventors: Adarsh Rajashekhar, Raghuveer S. Makala, Koichi Matsuno
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Patent number: 12248064Abstract: Smart glasses including a first audio device, a second audio device, a frame including a first portion, a second portion, and a third portion, the second portion and the third portion are moveable in relation to the first portion, the second portion including the first audio device and the third portion including the second audio device, and a processor configured to cause the first audio device to generate a signal, receive the signal via the second audio device, estimate a distance based on the received signal, and determine a configuration of the frame.Type: GrantFiled: February 15, 2022Date of Patent: March 11, 2025Assignee: GOOGLE LLCInventors: Dongeek Shin, Adarsh Prakash Murthy Kowdle, Jingying Hu, Andrea Colaco
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Publication number: 20250077212Abstract: A system includes a computing hardware system, a network storage, and one or more data sources. A local processor of a data collector node associated with each data source is configured to collect and store incremental application data to the network storage and transmit a file path of the application data to a data API of the computing hardware system. A processor of the computing hardware system is configured to access the received file path and load the application data into a local memory. The processor is configured to generate a compute thread comprising compute queue and data queue and associate the compute thread to the host application. The processor updates the incremental application data from the local memory to the GPU memory through the compute thread and subsequently to local storage. In addition, the processor updates the application data without restarting the host application.Type: ApplicationFiled: August 31, 2023Publication date: March 6, 2025Applicant: Innoplexus AGInventor: Adarsh Jain
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Publication number: 20250078081Abstract: A method for identifying fraudulent cryptographic currency transactions using a deep neural network includes: receiving, by a receiver of a processing server, a source dataset, the source dataset including labeled source data associated with a plurality of source features and being associated with a source domain; receiving, by the receiver of the processing server, a target dataset, the target dataset including unlabeled target data associated with a plurality of target features and being associated with a target domain; combining, by a processor of the processing server, at least a subset of the plurality of source features and at least a subset of the plurality of target features into a combined data layer; training, by the processor of the processing server, a deep neural network using a domain adaptation algorithm and the combined data layer to identify a set of final features.Type: ApplicationFiled: September 5, 2023Publication date: March 6, 2025Applicant: Mastercard International IncorporatedInventors: Soumyadeep GHOSH, Adarsh PATANKAR, Rohit JAIN, Deepak YADAV