Patents by Inventor ADARSH

ADARSH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240276725
    Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, each including a respective vertical semiconductor channel and a vertical stack of memory elements, a contact via structure contacting a reference electrically conductive layer that is one of the electrically conductive layers, and at least one silicon oxide liner laterally surrounding a cylindrical portion of the contact via structure and contacting a laterally protruding portion of the contact via structure.
    Type: Application
    Filed: March 26, 2024
    Publication date: August 15, 2024
    Inventors: Adarsh RAJASHEKHAR, Senaka KANAKAMEDALA, Koichi MATSUNO
  • Publication number: 20240262709
    Abstract: According to various embodiments, a method of quickly and inexpensively forming a crystallographically-stable, highly durable, cobalt-free, lithium-substituted, lithium-rich metal oxide (S-LRMO) material is provided, where the element that is used to replace lithium is some combination of Na, K, Ca, and Mg, and is above the levels commonly thought of as doping. In some embodiments, a cathode active material comprising a lithium-substituted, lithium-rich metal oxide is provided. For example, in some embodiments, the cathode active material comprises a chemical formula Li[LixAyMz]Ob, where A comprises at least one of Na, K, Ca and/or Mg. In some embodiments, (x+y) is greater than 0 and less than 0.3, y>0.05, z=1?(x+y), M includes Mn and Ni, and b is greater than or equal to 1.8 and less than or equal to 2.2.
    Type: Application
    Filed: January 31, 2024
    Publication date: August 8, 2024
    Applicant: Stratus Materials Inc.
    Inventors: Jay F. Whitacre, Jared Mitchell, Adarsh Rajesh Dave
  • Patent number: 12056103
    Abstract: The present application describes a database performance and usage footprint monitoring and analysis platform and related user application, which may provide insights across the whole of an enterprise's database inventory to increase visibility, accountability, and efficiency. The platform and related application may provide insight into enterprise database footprint and utilization, including displaying the data and associated metrics and analysis in a customizable interface. The platform may ingest and capture performance data and events to provide resource properties and cost analyses across enterprise groups. Future performance may be predicted by the platform, future data trends identified, and platform may provide usage prediction, perform root cause analysis to recommend action items, and provide alerts, among other functions.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: August 6, 2024
    Assignee: Target Brands, Inc.
    Inventors: Saravanan Kandasamy, Prajakta Deshpande, Deepa Sarasamma, Payal Verma, Sudha Adarsh
  • Publication number: 20240256446
    Abstract: Techniques for implementing a hardware-based cache controller in, e.g., a tiered memory computer system are provided. In one set of embodiments, the cache controller can flexibly operate in a number of different modes that aid the OS/hypervisor of the computer system in managing and optimizing its use of the system's memory tiers. In another set of embodiments, the cache controller can implement a hardware architecture that enables it to significantly reduce the probability of tag collisions, decouple cache capacity management from cache lookup and allocation, and handle multiple concurrent cache transactions.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Inventors: Andreas Georg Nowatzyk, Pratap Subrahmanyam, Isam Wadih Akkawi, Adarsh Seethanadi Nayak, Nishchay Dua
  • Publication number: 20240256459
    Abstract: A memory hierarchy includes a first memory and a second memory that is at a lower position in the memory hierarchy than the first memory. A method of managing the memory hierarchy includes: observing, over a first period of time, accesses to pages of the first memory; in response to determining that no page in a first group of pages was accessed during the first period of time, moving each page in the first group of pages from the first memory to the second memory; and in response to determining that the number of pages in other groups of pages of the first memory, which were accessed during the first period of time, is less than a threshold number of pages, moving each page in the other group of pages, that was not accessed during the first period of time from the first memory to the second memory.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Inventors: Pratap SUBRAHMANYAM, Venkata Subhash Reddy PEDDAMALLU, Isam Wadih AKKAWI, Andreas Georg NOWATZYK, Rajesh VENKATASUBRAMANIAN, Yijiang YUAN, Adarsh Seethanadi NAYAK, Nishchay DUA, Sreekanth SETTY
  • Publication number: 20240256727
    Abstract: Systems, articles of manufacture, apparatus, and methods are disclosed for machine-learning based hole plug validation. An example apparatus includes at least one memory, machine-readable instructions, and processor circuitry to at least one of execute or instantiate the machine-readable instructions to at least execute a machine-learning model based on an image of an aircraft component to generate an output representative of first identifications of first hole plugs in the aircraft component. The processor circuitry is further to determine one or more differences between the first identifications of the first hole plugs in the image and second identifications of second hole plugs in a reference model of the aircraft component. Additionally, the processor circuitry is to cause an operation associated with an aircraft to occur based on the one or more differences.
    Type: Application
    Filed: January 16, 2023
    Publication date: August 1, 2024
    Inventors: Seema Chopra, Ganesha P. Saralikana, Chandrashekhar, Adarsh Vittal Shetty, SK Sahariyaz Zaman
  • Publication number: 20240256453
    Abstract: Techniques for implementing a hardware-based cache controller in, e.g., a tiered memory computer system are provided. In one set of embodiments, the cache controller can flexibly operate in a number of different modes that aid the OS/hypervisor of the computer system in managing and optimizing its use of the system's memory tiers. In another set of embodiments, the cache controller can implement a hardware architecture that enables it to significantly reduce the probability of tag collisions, decouple cache capacity management from cache lookup and allocation, and handle multiple concurrent cache transactions.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Inventors: Andreas Georg Nowatzyk, Pratap Subrahmanyam, Isam Wadih Akkawi, Adarsh Seethanadi Nayak, Nishchay Dua
  • Publication number: 20240256439
    Abstract: Techniques for implementing a hardware-based cache controller in, e.g., a tiered memory computer system are provided. In one set of embodiments, the cache controller can flexibly operate in a number of different modes that aid the OS/hypervisor of the computer system in managing and optimizing its use of the system's memory tiers. In another set of embodiments, the cache controller can implement a hardware architecture that enables it to significantly reduce the probability of tag collisions, decouple cache capacity management from cache lookup and allocation, and handle multiple concurrent cache transactions.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Inventors: Andreas Georg Nowatzyk, Pratap Subrahmanyam, Isam Wadih Akkawi, Adarsh Seethanadi Nayak, Nishchay Dua
  • Patent number: 12052247
    Abstract: A system receives an access token generated by a user performing authentication via an authentication device, for example, a smart card. The system obtains a personalized virtual machine assigned to the user. The system exchanges the access token for a temporary certificate having an expiry time. The system provides the temporary certificate that includes verifiable user identity to a personalized virtual machine. The system provides the user with access to the personalized virtual machine. The system allows the user to present verifiable user identity and connect to any of a plurality of systems without requiring the user to authenticate again using the authentication device. After the expiry time of the temporary certificate is exceeded, the system denies subsequent requests from the user to connect to any of the plurality of systems.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: July 30, 2024
    Assignee: Salesforce, Inc.
    Inventors: Adarsh Khare, Shruthi Chikkanna, Peixuan Jiang, Isaac Westlund, Hideyuki Komaki, Hayk Baluyan, Giridharan Sridharan, Mitchell Brent DiNicola, Ajay Thargan
  • Publication number: 20240251097
    Abstract: A device to code a point cloud data that includes a memory configured to store data representing points of a point cloud, and one or more processors implemented in circuitry and configured to: determine height values of points in a point cloud; code a data structure including data that represents a top threshold and a bottom threshold; classify points having height values between the top threshold and the bottom threshold into the set of ground points; classify points having height values above the top threshold or below the bottom threshold into the set of object points. The one or more processors code the ground points and the object points according to the classifications. The one or more processors code a geometry data unit header that includes data that overrides or refines the data of the data structure for the at least one of the top threshold or the bottom threshold.
    Type: Application
    Filed: April 1, 2024
    Publication date: July 25, 2024
    Inventors: Luong Pham Van, Adarsh Krishnan Ramasubramonian, Bappaditya Ray, Geert Van der Auwera, Marta Karczewicz
  • Patent number: 12042794
    Abstract: In one aspect a high frequency ultrasonic microfluidic flow control device is disclosed. The device includes an array of ultrasonic transducers arranged to direct ultrasound to a microfluidic channel. The device further includes one or more driver circuits. Each ultrasonic transducer is associated with one of the one or more driver circuits, and each ultrasonic transducer is driven by a driver signal from the associated driver circuit. The array of ultrasonic transducers and one or more driver circuits are produced in the same semiconductor fabrication process. The device further includes one or more electrical contacts associated with each ultrasonic transducer in the array if ultrasonic transducers, wherein the one or more electrical contacts associated with each ultrasonic transducer applies the driver signal from the associated ultrasonic driver circuit.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: July 23, 2024
    Assignee: CORNELL UNIVERSITY
    Inventors: Amit Lal, Adarsh Ravi, Alexander Ruyack, Justin Kuo
  • Patent number: 12042250
    Abstract: In alternative embodiments, provided are compositions, medical devices or products of manufacture, systems, diagnostic tools, and methods, including computer implemented methods, for predicting the response of patients with dyssynchronous heart failure (DHF) to cardiac resynchronization therapy (CRT), comprising: measuring or determining the fraction of the LV/septum performing negative work (MNW); and measuring or determining the coefficient of variation of external work density (COVW), wherein the MNW fraction performing negative work and coefficient of variation COVW (sd/mean) correlated strongly with observed reduction in end-systolic volume after CRT.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: July 23, 2024
    Assignee: The Regents of the University of California
    Inventors: Andrew D. McCulloch, Adarsh Krishnamurthy, Christopher Villongco, David Krummen, Sanjiv Narayan, Jeffrey Omens, Roy Kerckhoffs
  • Patent number: 12046072
    Abstract: This disclosure describes systems and techniques for synchronizing cameras and tagging images for face authentication. For face authentication by a facial recognition model, a dual infrared camera may generate an image stream by alternating between capturing a “flood image” and a “dot image” and tagging each image with metadata that indicates whether the image is a flood or a dot image. Accurately tagging images can be difficult due to dropped frames and errors in metadata tags. The disclosed systems and techniques provide for the improved synchronization of cameras and tagging of images to promote accurate facial recognition.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: July 23, 2024
    Assignee: Google LLC
    Inventors: Zhijun He, Wen Yu Chien, Po-Jen Chang, Xu Han, Adarsh Prakash Murthy Kowdle, Jae Min Purvis, Lu Gao, Gopal Parupudi, Clayton Merrill Kimber
  • Publication number: 20240241944
    Abstract: Various systems and methods are described for implementing security intents for the execution of workloads in cloud-to-edge (C2E) and cloud-native execution environments. An example technique for implementing security intents for a workload on a computing node of a cluster includes: identifying a workload for execution on the computing node; identifying security intents that define levels of respective security requirements for the execution of the workload on the computing node; adapting an execution environment of the computing node, based on the identified security intents; and controlling the execution of the workload within the execution environment, based on the identified security intents, to dynamically monitor and adapt to changing security conditions during the execution of the workload.
    Type: Application
    Filed: March 28, 2024
    Publication date: July 18, 2024
    Inventors: Ned M. Smith, Kshitij Arun Doshi, Adrian Hoban, Eric W. Multanen, Malini Bhandaru, Sunil Cheruvu, Thijs Metsch, Manjunath Ranganathaiah, Anahit Tarkhanyan, Sharad Mishra, Igor Duarte Cardoso, Todd Malsbary, Bruno Vavala, Adarsh Chittilapplly, Subin John, Alpesh Ramesh Rodage
  • Publication number: 20240233196
    Abstract: A method of encoding point cloud data includes receiving, for a first encoding process, geometry data of the point cloud data of a source point cloud; encoding, in accordance with the first encoding process, the geometry data to generate encoded geometry data of a target point cloud and a geometry bitstream; decoding the encoded geometry data to generate reconstructed geometry data; performing an attribute recomputing process on attribute data of the point cloud data of the source point cloud based on the reconstructed geometry data to generate recomputed, reconstructed point cloud data of the target point cloud; and encoding, in accordance with a second encoding process, the recomputed, reconstructed point cloud data to generate an attribute bitstream.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Inventors: Anique Akhtar, Geert Van der Auwera, Adarsh Krishnan Ramasubramonian, Marta Karczewicz
  • Publication number: 20240237346
    Abstract: A method of forming a memory device includes forming an alternating stack of insulating layers including a first insulating material and sacrificial material layers including a first sacrificial material over a substrate, forming a memory opening through the alternating stack, performing a first selective material deposition process that selectively grows a second sacrificial material from physically exposed surfaces of the sacrificial material layers to form a vertical stack of sacrificial material portions; forming a memory opening fill structure in the memory opening, where the memory opening fill structure includes a vertical stack of memory elements and a vertical semiconductor channel, and replacing a combination of the vertical stack of sacrificial material portions and the sacrificial material layers with electrically conductive layers.
    Type: Application
    Filed: July 20, 2023
    Publication date: July 11, 2024
    Inventors: Rahul SHARANGPANI, Raghuveer S. MAKALA, Adarsh RAJASHEKHAR, Fei ZHOU, Bing ZHOU, Senaka KANAKAMEDALA, Roshan Jayakhar TIRUKKONDA, Kartik SONDHI
  • Publication number: 20240233199
    Abstract: Example devices, systems, and techniques are described. An example technique includes determining that resampling is to be applied to a first reference frame for a slice of point cloud data or a frame of the point cloud data. The technique includes applying resampling to the first reference frame to generate a resampled reference frame. The technique includes determining one or more inter prediction candidates based on the resampled reference frame. The technique includes processing the slice of the point cloud data or the frame of the point cloud data based on the one or more inter prediction candidates.
    Type: Application
    Filed: November 14, 2023
    Publication date: July 11, 2024
    Inventors: Adarsh Krishnan Ramasubramonian, Geert Van der Auwera, Marta Karczewicz
  • Publication number: 20240226568
    Abstract: Methods and systems for closed loop feedback control of electrical neuromodulation are described. Closed loop feedback control is based on sensed electrical potentials, which are used as reference control variables in a feedback control algorithm to adjust the electrical stimulation based on one or more control algorithm parameters. The performance of the closed loop feedback control algorithm may be evaluated, and the feedback algorithm may be adjusted based on its performance. In some instances, the feedback algorithm may be adjusted based on an indication state of the patient.
    Type: Application
    Filed: December 21, 2023
    Publication date: July 11, 2024
    Inventors: Andrew Haddock, Adarsh Jayakumar, Max Witwer, Keron Greene
  • Patent number: 12033360
    Abstract: A method of encoding a point cloud includes determining, by one or more processors, a quantity of lasers used to capture light detection and ranging (LIDAR) data that represents the point cloud; and encoding, by the one or more processors, a laser index for a current node of the point cloud, wherein encoding the laser index comprises: obtaining a predicted laser index value of the current node; determining a residual laser index value for the current node, wherein determining the residual laser index value comprises constraining a sum of the residual laser index value and the predicted laser index value to be less than or equal to the determined quantity of lasers minus one; and encoding, in a bitstream, one or more syntax elements that represent the residual laser index value.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: July 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Adarsh Krishnan Ramasubramonian, Bappaditya Ray, Geert Van der Auwera, Marta Karczewicz
  • Patent number: D1037522
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: July 30, 2024
    Assignee: Eaton Intelligent Power Limited
    Inventors: Anzar Pandurang Rade, Christopher G. Henley, Adarsh Mishra