Patents by Inventor Akio Nakamura

Akio Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040178996
    Abstract: An input device and a driving device able to be made thin and secure sufficiently large vibration amplitude are provided. The input device comprises an input panel, a current conducting element for conducting a driving current, and a magnetic field application unit for applying a magnetic field on the current conducting element. Both of the current conducting element and the magnetic field application unit are arranged in the peripheral region of the input panel. The magnetic field applied by the magnetic field application unit is parallel to the input panel and intersects the current conducting element. When the input panel is touched, a driving current is fed into the current conducting element, and a force is imposed on the current conducting element and the magnetic field application unit, making them move. This movement further drives the input panel to vibrate. Consequently, input operations can be recognized by feeling the vibration of the input panel.
    Type: Application
    Filed: October 3, 2003
    Publication date: September 16, 2004
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Shigemi Kurashima, Nobuyoshi Shimizu, Akio Nakamura, Yuriko Nishiyama, Shinichiro Akieda, Takashi Arita
  • Publication number: 20040166391
    Abstract: A fuel cell device is disclosed that is capable of being made compact when being transported and in storage. The fuel cell device includes a fuel cell unit including a number of fuel cells arranged sequentially in a case. The case includes a holder frame for holding the fuel cells, a first hemi-case, and a second hemi-case. The width of the case is adjustable in the direction in which the fuel cells are arranged in a line. When the fuel cell device is being transported or in storage, the first hemi-case and the second hemi-case are pushed to approach each other, making the size of the case small. When the fuel cell device is used to generate electrical power, the first hemi-case and the second hemi-case are pulled apart from each other and, accordingly, the fuel cells are separated from each other by a springy plate.
    Type: Application
    Filed: October 3, 2003
    Publication date: August 26, 2004
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Akio Nakamura, Takashi Arita
  • Patent number: 6781158
    Abstract: A GaAsP-base light emitting element capable of sustaining an excellent light emission property for a long period, and a method for manufacturing thereof are provided. The light emitting element 1 has a p-n junction interface responsible for light emission formed between a p-type GaAs1-aPa layer 9 and an n-type GaAs1-aPa layer 8, and has a nitrogen-doped zone 8c formed in a portion including the p-n junction interface between such p-type GaAs1-aPa layer 9 and n-type GaAs1-aPa layer 8. Such element can be manufactured by fabricating a plurality of light emitting elements by varying nitrogen concentration Y of the nitrogen-doped zone 8c while keeping a mixed crystal ratio a of the p-type GaAs1- aPa layer 9 and n-type GaAs1-aPa layer 8 constant; finding an emission luminance/nitrogen concentration relationship by measuring emission luminance of the individual light emitting elements; and adjusting the nitrogen concentration of the nitrogen-doped zone 8c so as to fall within a range from 1.05Yp to 1.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: August 24, 2004
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akio Nakamura, Masayuki Shinohara, Masahisa Endo
  • Publication number: 20040161910
    Abstract: The sealing resin of a semiconductor device is prevented from being peeled off from the substrate of the semiconductor device. A semiconductor device according to the present invention has a semiconductor substrate containing a central portion having a first thickness and a peripheral portion having a second thickness that is smaller than the first thickness, an electrode pad formed on the semiconductor substrate, a sealing resin for sealing the semiconductor substrate, a protruded electrode formed on the sealing resin, and a wire which electrically connects the electrode pad to the protruded electrode.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 19, 2004
    Inventor: Akio Nakamura
  • Patent number: 6770543
    Abstract: The sealing resin of a semiconductor device is prevented from being peeled off from the substrate of the semiconductor device. A semiconductor device according to the present invention has a semiconductor substrate containing a central portion having a first thickness and a peripheral portion having a second thickness that is smaller than the first thickness, an electrode pad formed on the semiconductor substrate, a sealing resin for sealing the semiconductor substrate, a protruded electrode formed on the sealing resin, and a wire which electrically connects the electrode pad to the protruded electrode.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: August 3, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura
  • Patent number: 6764254
    Abstract: A throwaway insert for a pin mirror cutter in which eight corners can be used and which the cutting performance and machining accuracy can be increased by making positive the axial rake angle of the peripheral cutting edge. Side faces of a negative insert of a parallelogrammic shape are formed by two surfaces connecting to each other at an angle so as to have a first included angle and a second included angle. Further, independent arcuate surfaces are provided at the intersections between the arcuate corner sides of each of the side faces and the top and bottom surfaces and the intersections between the obtuse corner sides and the top and bottom surfaces.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: July 20, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shigenori Emoto, Jun Maeda, Akio Nakamura
  • Publication number: 20040130014
    Abstract: What is invented is a semiconductor device (10) comprising a pellet (12) having a ground electrode (18), an outside signal terminal (15) connected to the pellet (12), so as to receive signal which is likely to include noise. Therein, said outside signal terminal (15) is surrounded with a ground terminal (17) connected to said ground electrode (18) in at least a half periphery.
    Type: Application
    Filed: November 14, 2003
    Publication date: July 8, 2004
    Inventor: Akio Nakamura
  • Publication number: 20040074660
    Abstract: A cross substrate and a method of mounting a semiconductor element are provided in which semiconductor elements can be mounted at a high density. Element side electrodes of a circuit forming surface of a semiconductor element and conductive filaments of a cross substrate are connected in a one-to-one correspondence by solder bumps. Thereafter, sealing is carried out by using a molten epoxy-based resin. In this way, a circuit forming surface side of the semiconductor element is sealed with sealing resin of the cross substrate, with the element side electrodes of the mounted semiconductor element electrically connected to conductive filaments which are wires of a cross substrate.
    Type: Application
    Filed: December 3, 2003
    Publication date: April 22, 2004
    Inventor: Akio Nakamura
  • Patent number: 6724206
    Abstract: A device carrier capable of reliably measuring electric characteristics of the device with accuracy and an auto-handle are provided. The device carrier holds an IC having terminals on a lower face thereof at multiple positions, and allows the terminals to be brought into contact with contacts provided on an IC socket, wherein the device carrier comprises an opening through which the device can pass, a support part disposed on the opening for supporting the lower face of the IC, and a hinge part for turnably supporting the support part, wherein said supporter part is turned to release the support of the device when the socket approaches thereto. The supporter part engages with the release pins as the device carrier approaches to the IC socket to be turned so as to release the support of the lower face of the IC. The IC which has been released from being supported by the supporter part passes through the opening and is placed on the IC socket.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: April 20, 2004
    Assignee: Ando Electric Co., Ltd.
    Inventors: Osamu Arakawa, Akio Nakamura
  • Patent number: 6706558
    Abstract: A plurality of posts 12 having electrical conductivity are formed on a side of a plate member 11. A buffer layer 14 is formed on the side of the plate member 11 so that top ends of the posts 12 are protruded from the buffer layer 14. The semiconductor pellet 17 is mounted on a predetermined position on the top ends of the posts 12. The electrodes of the semiconductor pellet 17 are connected to the top ends of the posts 12 by means of wires 18. A resin portion 20 is formed on the buffer layer 14 so that the resin portion 20 encapsulates the posts 12, the wires 18 and the semiconductor pellet 17. The plate member 11 is removed from the buffer layer 14 and the posts 12, so that the posts 12 are electrically separated from each other. Solder balls 23 are bonded to the bottom ends 21 of the posts 12.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: March 16, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura
  • Publication number: 20040014258
    Abstract: A semiconductor device comprises a semiconductor IC chip provided with bond pads on its first surface, a wiring substrate provided with a through hole extending between the opposite surfaces thereof, conductive members electrically connecting the bond pads of the semiconductor IC chip to the conductive lines formed on the wiring substrate respectively, and a sealing resin coating coating the first surface of the semiconductor IC chip and the conductive members, and bonding the side surface of the semiconductor IC chip to the side surface of the through hole of the wiring substrate.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 22, 2004
    Inventor: Akio Nakamura
  • Patent number: 6674008
    Abstract: A cross substrate and a method of mounting a semiconductor element are provided in which semiconductor elements can be mounted at a high density. Element side electrodes of a circuit forming surface of a semiconductor element and conductive filaments of a cross substrate are connected in a one-to-one correspondence by solder bumps. Thereafter, sealing is carried out by using a molten epoxy-based resin. In this way, a circuit forming surface side of the semiconductor element is sealed with sealing resin of the cross substrate, with the element side electrodes of the mounted semiconductor element electrically connected to conductive filaments which are wires of a cross substrate.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: January 6, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura
  • Publication number: 20030235940
    Abstract: A plurality of posts 12 having electrical conductivity are formed on a side of a plate member 11. A buffer layer 14 is formed on the side of the plate member 11 so that top ends of the posts 12 are protruded from the buffer layer 14. The semiconductor pellet 17 is mounted on a predetermined position on the top ends of the posts 12. The electrodes of the semiconductor pellet 17 are connected to the top ends of the posts 12 by means of wires 18. A resin portion 20 is formed on the buffer layer 14 so that the resin portion 20 encapsulates the posts 12, the wires 18 and the semiconductor pellet 17. The plate member 11 is removed from the buffer layer 14 and the posts 12, so that the posts 12 are electrically separated from each other. Solder balls 23 are bonded to the bottom ends 21 of the posts 12.
    Type: Application
    Filed: January 16, 2003
    Publication date: December 25, 2003
    Inventor: Akio Nakamura
  • Publication number: 20030197251
    Abstract: This invention provides a resin-sealed type semiconductor device capable of decreasing a generation of a simultaneous switching noise even in using a further highly integrated semiconductor LSI. More specifically, this invention provides a resin-type semiconductor device wherein a signal lead frame 105, a power supply lead frame 104 and a grand lead frame 103 are accumulated via an electric insulating layer between layers. The power supply lead frame 104 and the grand lead frame 103 have a mesh shape with a plurality of openings in a plane electric conductor.
    Type: Application
    Filed: May 19, 2003
    Publication date: October 23, 2003
    Inventor: Akio Nakamura
  • Patent number: 6636334
    Abstract: A semiconductor device comprises a semiconductor IC chip provided with bond pads on its first surface, a wiring board provided with a through hole extending between the opposite surfaces thereof, conductive members electrically connecting the bond pads of the semiconductor IC chip to those formed on the wiring board, and a sealing resin coating coating the surface of the semiconductor IC chip and the conductive members, and bonding the side surfaces of the semiconductor IC chip to the side surfaces of the through hole of the wiring board.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: October 21, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura
  • Publication number: 20030154951
    Abstract: An air intake device for use with an internal combustion engine has an air cleaner case adapted to be mounted on the engine to extend longitudinally along an upper wall of the engine. An opening is formed in a longitudinal end portion of a bottom wall of the air cleaner case. An air cleaner body has an open end that is connected to the opening of the bottom wall of the air cleaner case thereby to communicate an interior of the air cleaner body with that of the air cleaner case. An air cleaner element is put between the air cleaner body and the air cleaner case in a manner to extend across the opening of the bottom wall of the air cleaner case.
    Type: Application
    Filed: February 14, 2003
    Publication date: August 21, 2003
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Akio Nakamura, Hideaki Miyamoto, Kouji Yamashita, Shinsuke Kitabayashi
  • Patent number: 6590296
    Abstract: A semiconductor device having electrodes formed along a peripheral part thereof in a staggered arrangement of lines including inside-line electrodes, central-line electrodes and outside-line electrodes. The inside-line electrodes are hexagonal shaped with hypotenuses on the central-line electrodes sides thereof. The central-line electrodes are hexagonal shaped with hypotenuses on the inside-line electrode sides thereof. The maximum width of the outside-line electrode wires immediately between the hypotenuses of adjacent inside-line and central-line electrodes depends on the distance between the centers of the inside-line and central-line electrodes, the minimum lengths of the inside-line and central-line electrodes and the electrode protective film, and the minimum length of the corresponding wire. The position and form of the central line electrodes are thus determinable based on the given relationship and the necessary value of current.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: July 8, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura
  • Publication number: 20030122223
    Abstract: A semiconductor device provided with one or more semiconductor pellets arranged on the bottom surface of a recess produced along a surface of a semiconductor plate having wirings arranged on the surface thereof, wirings extending toward the surface of the recess, and the recess being buried with a layer of a resin which is inclined to inflate, while it is hardened, resultantly producing a stress in the resin layer to expand toward the side wall of the recess engraved in the semiconductor plate, resultantly preventing breakage from happening for an interface between the side wall of the recess engraved in the semiconductor plate and the surface of the resin layer contacting the side wall, and remarkably improving the thermal conductivity efficiency to reduce the magnitude of a temperature rise of the semiconductor device, resultantly preventing a delay from happening for the operation speed of the semiconductor device.
    Type: Application
    Filed: February 3, 2003
    Publication date: July 3, 2003
    Inventor: Akio Nakamura
  • Publication number: 20030080840
    Abstract: This high-frequency relay comprises a body containing a contact unit having contact states switched according as an energization to a coil, and a base covering at least a bottom surface of the body. The contact unit is connected with at least one contact terminal. The contact terminal is protruded from the bottom surface of the body. The base has a grounding function and includes a conductive layer.
    Type: Application
    Filed: May 22, 2002
    Publication date: May 1, 2003
    Applicant: FUJITSU COMPONENT LIMITED
    Inventors: Akio Nakamura, Yoshinori Kurata, Hirofumi Saso
  • Patent number: 6538322
    Abstract: A semiconductor device provided with one or more semiconductor pellets arranged on the bottom surface of a recess produced along a surface of a semiconductor plate having wirings arranged on the surface thereof, wirings extending toward the surface of the recess, and the recess being buried with a layer of a resin which is inclined to inflate, while it is hardened, resultantly producing a stress in the resin layer to expand toward the side wall of the recess engraved in the semiconductor plate, resultantly preventing breakage from happening for an interface between the side wall of the recess engraved in the semiconductor plate and the surface of the resin layer contacting the side wall, and remarkably improving the thermal conductivity efficiency to reduce the magnitude of a temperature rise of the semiconductor device, resultantly preventing a delay from happening for the operation speed of the semiconductor device.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: March 25, 2003
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Akio Nakamura