Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of the plurality of agents and a center controller. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchanging messages. The center controller is programmed to control a speed ratio of a flow of time in the target world to a flow of time in a real world. Each of the plurality of agent simulators calculates an index value corresponding to a remainder time rate. The remainder time rate is a rate of a remainder time to an update time interval for updating a state of a target agent to be simulated. The center controller controls the speed ratio based on the index value calculated by each of the plurality of agent simulators.

Abstract: The multi-agent simulation system includes a plurality of back-end servers provided for each of a plurality of service systems and a plurality of agent simulators provided for each of the plurality of agents. Each of the plurality of service systems provides a service used in the target world. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchange of first messages. The plurality of back-end servers and the plurality of agent simulators are programmed to simultaneously simulate a plurality of services by exchanging second messages different from the first messages.

Abstract: A multi-agent simulation system performs a simulation of a target world in which a plurality of agents interacting with each other exist. The multi-agent simulation system includes: a plurality of agent simulators configured to perform simulations of the plurality of agents, respectively; and a center controller configured to communicate with the plurality of agent simulators. The center controller performs message filtering based on a processing time interval of each agent simulator. More specifically, the center controller sets the number of the delivery message delivered per unit time to the agent simulator whose processing time interval is relatively long to be relatively small.

Abstract: A multi-agent simulation system performs a simulation of a target world in which a plurality of agents interacting with each other exist. The multi-agent simulation system includes: a plurality of agent simulators configured to perform simulations of the plurality of agents, respectively; and a center controller configured to communicate with the plurality of agent simulators. Operation modes of the center controller include: a first mode that does not perform message filtering; and a second mode that performs the message filtering. When the number of messages that the center controller receives per unit time is equal to or less than a threshold, the center controller selects the first mode. On the other hand, when the number of result messages that the center controller receives per unit time exceeds the threshold, the center controller selects the second mode.

Abstract: The multi-agent simulation system includes a plurality of agent simulators provided for each of the plurality of agents and a center controller. The plurality of agent simulators are programmed to simulate a state of each of the plurality of agents while causing the plurality of agents to interact with each other by exchanging messages. The center controller is programmed to manage participation of the plurality of agent simulators in a simulation of the target world and separation of the plurality of agent simulators from the simulation of the target world. The center controller separates an agent simulator whose processing does not keep up with a flow of time in the target world from the simulation of the target world.

Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor, a normally-on transistor, a first diode, and a Zener diode; a first terminal provided on the semiconductor package; a plurality of second terminals provided on the semiconductor package, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package; a plurality of fourth terminals provided on the semiconductor package; and a plurality of fifth terminals provided on the semiconductor package, and the fifth terminals being lined up in the first direction.

Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.

Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap larger than the first nitride semiconductor layer, a first electrode provided on the second nitride semiconductor layer, a second electrode provided on the second nitride semiconductor layer, a first insulating film provided between the first electrode and the second electrode on the second nitride semiconductor layer, the first insulating film being in connect with the second nitride semiconductor layer and including a first insulating material, a second insulating film provided on the second nitride semiconductor layer between the first electrode and the first insulating film, on the first insulating film, and on the second nitride semiconductor layer between the first insulating film and the second electrode, the second insulating film including a second insulating material, a third electrode pro

Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno

Abstract: Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.

Abstract: A semiconductor device has a first and a second nitride semiconductor layer and a first and a second electrode thereon. A gate electrode is between the first and second electrodes. A gate field plate is on the gate electrode. A first field plate is above a position between the gate field plate and the second electrode. A second field plate is between the first field plate and the gate field plate. A distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to the portion of the gate field plate that protrudes the most towards the second electrode. The distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to an end surface of the first field plate on a first electrode side.

Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on t

Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.

Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.

Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno

Abstract: Provided is a semiconductor device including: a normally-off transistor having a first electrode, a second electrode, and a first control electrode; a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode; a first capacitor having a first end and a second end electrically connected to the second control electrode; a Zener diode having a first anode and a first cathode, the first anode being electrically connected to the second end and the second control electrode, and the first cathode being electrically connected to the third electrode; a first resistor having a third end and a fourth end electrically connected to the first control electrode; a first diode having a second anode and a second cathode, the second anode being electrically connected to the third end; a second resistor having a fifth end electrically connected to the second cathode and a sixth end electrically connected to the fourth end and the first cont

Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.

Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno

Abstract: A semiconductor device includes first and second nitride semiconductor layers, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a gate electrode between the first and second electrodes, a first field plate electrode electrically connected to the first electrode, a second field plate electrode between the gate electrode and the second electrode and electrically connected to the first electrode, a first conductive layer on the gate electrode, and a second conductive layer on the first conductive layer. A distance between the gate electrode and the second field plate electrode in a lateral direction is shorter than a distance between the first conductive layer and the second field plate electrode in the lateral direction, and is equal to or shorter than a distance between the second conductive layer and the second field plate electrode.

Abstract: A data collection system includes a server device and at least one probe vehicle. The server device includes a storage unit configured to store a master map in which a necessity of data collection for each of a plurality of unit ranges included in a plurality of segments is represented by a binary value; and a server control unit configured to extract from the master map a segment corresponding to a position of the probe vehicle, and to transmit the segment to the probe vehicle as a partial map. The probe vehicle includes a data obtaining unit configured to obtain the data; and a vehicle control unit configured to identify a unit range requiring data collection based on the partial map received from the server device, and to transmit the data obtained in the unit range to the server device.