Patents by Inventor Akira Yoshioka

Akira Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140284610
    Abstract: According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
    Type: Application
    Filed: August 30, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira YOSHIOKA, Yasunobu SAITO, Hidetoshi FUJIMOTO, Takeshi UCHIHARA, Naoko YANASE, Toshiyuki NAKA, Tetsuya OHNO, Tasuku ONO
  • Publication number: 20140284613
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer, a gate electrode provided above the nitride semiconductor layer, a source electrode provided above the nitride semiconductor layer, a drain electrode provided above the nitride semiconductor layer at a side opposite to the source electrode with respect to the gate electrode, a first silicon nitride film provided above the nitride semiconductor layer between the drain electrode and the gate electrode, and a second silicon nitride film provided between the nitride semiconductor layer and the gate electrode, an atomic ratio of silicon to nitrogen in the second silicon nitride film being lower than an atomic ratio of silicon to nitrogen in the first silicon nitride film.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Kuraguchi, Akira Yoshioka, Miki Yumoto, Hisashi Saito, Kohei Oasa, Toru Sugiyama
  • Publication number: 20140246700
    Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a first electrode, a second electrode and a third electrode. The first, second and fourth semiconductor layers include a nitride semiconductor. The second semiconductor layer is provided on the first semiconductor layer, has a band gap not less than that of the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The third semiconductor layer is GaN. The fourth semiconductor layer is provided on the third semiconductor layer to have an interspace on a part of the third semiconductor layer, has a band gap not less than that of the second semiconductor layer. The first electrode is provided on a portion of the third semiconductor layer. The fourth semiconductor layer is not provided on the portion.
    Type: Application
    Filed: May 12, 2014
    Publication date: September 4, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu SAITO, Hidetoshi FUJIMOTO, Tetsuya OHNO, Akira YOSHIOKA, Wataru SAITO
  • Patent number: 8759878
    Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a first electrode, a second electrode and a third electrode. The first, second and fourth semiconductor layers include a nitride semiconductor. The second semiconductor layer is provided on the first semiconductor layer, has a band gap not less than that of the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The third semiconductor layer is GaN. The fourth semiconductor layer is provided on the third semiconductor layer to have an interspace on a part of the third semiconductor layer, has a band gap not less than that of the second semiconductor layer. The first electrode is provided on a portion of the third semiconductor layer. The fourth semiconductor layer is not provided on the portion.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno, Akira Yoshioka, Wataru Saito
  • Publication number: 20140133812
    Abstract: A composition for jacketing an optical fiber including a modified PPE resin containing a polyphenylene ether resin and a thermoplastic resin compatible with the polyphenylene ether resin, and a non halogen-based flame retardant, in which a nitrogen compound is included as the non halogen-based flame retardant and the content of nitrogen element in the composition is in the range of 100000 to 300000 ppm as measured by an elementary analysis.
    Type: Application
    Filed: June 14, 2012
    Publication date: May 15, 2014
    Applicant: MITSUBISHI RAYON CO., LTD.
    Inventors: Tsuyoshi Kimura, Yoshihiro Tsukamoto, Kouji Asano, Akira Yoshioka, Rie Akihara
  • Patent number: 8697899
    Abstract: There is provided a method for producing iron methacrylate being inexpensive, and being high in activity and selectivity and good in solubility to a reaction liquid when being used in production of a hydroxyalkyl methacrylate as a catalyst. The method for producing iron methacrylate for production of a hydroxyalkyl methacrylate according to the present invention includes subjecting a mixture of a metallic iron having an oxygen atom content by XRF analysis of the surface thereof of 6% by mass or lower, and methacrylic acid to a heat treatment at 95° C. or higher and lower than 110° C. for 100 to 600 min. The method for producing a hydroxyalkyl methacrylate according to the present invention includes reacting an alkylene oxide with methacrylic acid to produce the hydroxyalkyl methacrylate, wherein iron methacrylate produced by the method according to the present invention is used as a catalyst.
    Type: Grant
    Filed: December 26, 2011
    Date of Patent: April 15, 2014
    Assignee: Mitsubishi Rayon Co., Ltd.
    Inventors: Naoshi Murata, Kuniyoshi Ogura, Takeshi Matsuo, Akira Yoshioka
  • Publication number: 20140097505
    Abstract: According to one embodiment, a second nitride semiconductor layer is provided on a first nitride semiconductor layer and has a band gap wider than that of the first nitride semiconductor layer. A third nitride semiconductor layer is provided above the second nitride semiconductor layer. A fourth nitride semiconductor layer is provided on the third nitride semiconductor layer and has a band gap wider than that of the third nitride semiconductor layer. A fifth nitride semiconductor layer is provided between the second and the third nitride semiconductor layers. A first electrode contacts the second, the third and the fourth nitride semiconductor layers. A second electrode is provided on the fourth nitride semiconductor layer. A gate electrode is provided on a gate insulating layer between the first and the second electrodes. A third electrode is in contact with the second nitride semiconductor layer.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 10, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira YOSHIOKA, Yasunobu SAITO, Wataru SAITO
  • Publication number: 20140077263
    Abstract: According to one embodiment, a semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer, a third nitride semiconductor layer, an insulating film, an ohmic electrode, and a Schottky electrode. A surface region of the third nitride semiconductor layer between the ohmic electrode and the Schottky electrode contains an element heterogeneous with the constituent element of the third nitride semiconductor layer at a higher concentration than a region of the third nitride semiconductor layer of the second nitride semiconductor layer side.
    Type: Application
    Filed: March 5, 2013
    Publication date: March 20, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira YOSHIOKA, Yasunobu SAITO, Hidetoshi FUJIMOTO, Tetsuya OHNO, Toshiyuki NAKA
  • Publication number: 20140077217
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a first semiconductor region, a second semiconductor region, a first electrode, a first electrode and a conducting section. The substrate includes a conductive region and has a first surface. The first semiconductor region is provided on the first surface side of the substrate and includes AlXGa1-XN (0?X?1). The second semiconductor region is provided on a side opposite to the substrate of the first semiconductor region and includes AlYGa1-YN (0?Y?1, X?Y). The first electrode is provided on a side opposite to the first semiconductor region of the second semiconductor region and ohmically connects to the second semiconductor region. The conducting section electrically connects between the first electrode and the conductive region.
    Type: Application
    Filed: August 20, 2013
    Publication date: March 20, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno, Akira Yoshioka, Wataru Saito, Toshiyuki Naka
  • Patent number: 8664696
    Abstract: According to one embodiment, a nitride semiconductor device includes a first, a second and a third semiconductor layer, a first and a second main electrode and a control electrode. The first layer made of a nitride semiconductor of a first conductivity type is provided on a substrate. The second layer made of a nitride semiconductor of a second conductivity type is provided on the first layer. The third layer made of a nitride semiconductor is provided on the second layer. The first electrode is electrically connected with the second layer. The second electrode is provided at a distance from the first electrode and electrically connected with the second layer. The control electrode is provided within a first trench via an insulating film. The first trench is disposed between the first and the second main electrodes, penetrates the third and the second layers, and reaches the first layer.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: March 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Wataru Saito, Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno
  • Publication number: 20140035004
    Abstract: According to one embodiment, a semiconductor device has a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer and formed of a non-doped or n-type nitride semiconductor having a band gap wider than that of the first nitride semiconductor layer, a heterojunction field effect transistor having a source electrode, a drain electrode, and a gate electrode, a Schottky barrier diode having an anode electrode and a cathode electrode, and first and second element isolation insulating layers. The first element isolation insulating layer has a first end contacting with the drain electrode and the anode electrode, and a second end located in the first nitride semiconductor layer. The second element isolation insulating layer has a third end contacting with the cathode electrode, and a fourth end located in the first nitride semiconductor layer.
    Type: Application
    Filed: October 8, 2013
    Publication date: February 6, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru SAITO, Yasunobu SAITO, Hidetoshi FUJIMOTO, Akira YOSHIOKA, Tetsuya OHNO, Toshiyuki NAKA
  • Publication number: 20130341641
    Abstract: A rectifier circuit has a rectifier element and a unipolar field-effect transistor connected in series between a first terminal and a second terminal. The rectifier element comprises a first electrode and a second electrode disposed in a direction of a forward current flowing from the first terminal to the second terminal. The field-effect transistor has a gate electrode having a potential identical to a potential at the first electrode, and a source electrode and a drain electrode connected in series to the rectifier element and passing a current depending on the potential at the gate electrode. A breakdown voltage between the gate electrode and drain electrode of the field-effect transistor in a reverse bias mode, where a potential at the second terminal is higher than a potential at the first terminal, being set higher than a breakdown voltage of the rectifier element.
    Type: Application
    Filed: February 28, 2013
    Publication date: December 26, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tatsuya NISHIWAKI, Akira YOSHIOKA, Yasunobu SAITO, Masatoshi ARAI
  • Patent number: 8581301
    Abstract: According to one embodiment, a nitride semiconductor device has an electroconductive substrate, a first nitride semiconductor layer provided directly on the electroconductive substrate or provided on the electroconductive substrate through a buffer layer and formed of a non-doped nitride semiconductor, a second nitride semiconductor layer provided on the first nitride semiconductor layer and formed of a non-doped or n-type nitride semiconductor having a band gap wider than that of the first nitride semiconductor layer, a heterojunction field effect transistor having a source electrode, a drain electrode, and a gate electrode, a Schottky barrier diode having an anode electrode and a cathode electrode, first and second element isolation insulating layers, and a frame electrode. The frame electrode is electrically connected to the source electrode and the electroconductive substrate, and surrounds outer peripheries of the heterojunction field effect transistor and the Schottky barrier diode.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Yasunobu Saito, Hidetoshi Fujimoto, Akira Yoshioka, Tetsuya Ohno, Toshiyuki Naka
  • Patent number: 8575656
    Abstract: According to one embodiment, a semiconductor device having a semiconductor substrate, first to fourth semiconductor layers of nitride, first to third electrodes and a gate electrode is provided. The first semiconductor layer is provided directly on the semiconductor substrate or on the same via a buffer layer. The second semiconductor layer is provided so as to be spaced apart from the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer and has a band gap wider than that of the second semiconductor layer. The fourth semiconductor layer insulates the first and second semiconductor layers. The first electrode forms an ohmic junction with the first to the third semiconductor layers. The second electrode is provided on the third semiconductor layer. The gate electrode is provided between the first and the second electrodes. The third electrode forms a Schottky junction with the first semiconductor layer.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: November 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Yasunobu Saito, Wataru Saito
  • Publication number: 20130248873
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate; semiconductor stacked layers including a nitride semiconductor provided on the substrate, and having a buffer layer, a carrier running layer provided on the buffer layer, and a barrier layer provided on the carrier running layer; a source electrode and a drain electrode provided on the semiconductor stacked layers and in contact with the semiconductor stacked layers; and a gate electrode provided on the semiconductor stacked layers and provided between the source electrode and the drain electrode. The gate electrode has a stacked structure, and a gate metal layer, a barrier metal layer, a first interconnection layer, and a second interconnection layer including Al are sequentially stacked from a side of a surface of the semiconductor stacked layers in the stacked structure.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masahiko KURAGUCHI, Akira Yoshioka, Yoshiharu Takada
  • Publication number: 20130248931
    Abstract: According to one embodiment, a nitride semiconductor device has an electroconductive substrate, a first nitride semiconductor layer provided directly on the electroconductive substrate or provided on the electroconductive substrate through a buffer layer and formed of a non-doped nitride semiconductor, a second nitride semiconductor layer provided on the first nitride semiconductor layer and formed of a non-doped or n-type nitride semiconductor having a band gap wider than that of the first nitride semiconductor layer, a heterojunction field effect transistor having a source electrode, a drain electrode, and a gate electrode, a Schottky barrier diode having an anode electrode and a cathode electrode, first and second element isolation insulating layers, and a frame electrode. The frame electrode is electrically connected to the source electrode and the electroconductive substrate, and surrounds outer peripheries of the heterojunction field effect transistor and the Schottky barrier diode.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Wataru SAITO, Yasunobu SAITO, Hidetoshi FUJIMOTO, Akira YOSHIOKA, Tetsuya OHNO, Toshiyuki NAKA
  • Publication number: 20130248928
    Abstract: According to one embodiment, a semiconductor device having a semiconductor substrate, first to fourth semiconductor layers of nitride, first to third electrodes and a gate electrode is provided. The first semiconductor layer is provided directly on the semiconductor substrate or on the same via a buffer layer. The second semiconductor layer is provided so as to be spaced apart from the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer and has a band gap wider than that of the second semiconductor layer. The fourth semiconductor layer insulates the first and second semiconductor layers. The first electrode forms an ohmic junction with the first to the third semiconductor layers. The second electrode is provided on the third semiconductor layer. The gate electrode is provided between the first and the second electrodes. The third electrode forms a Schottky junction with the first semiconductor layer.
    Type: Application
    Filed: September 6, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira YOSHIOKA, Yasunobu Saito, Wataru Saito
  • Publication number: 20130240899
    Abstract: According to one embodiment a nitride semiconductor device includes a first, a second and a third semiconductor layer, a first and a second main electrode and a control electrode. The first layer made of a nitride semiconductor of a first conductivity type is provided on a substrate. The second layer made of a nitride semiconductor of a second conductivity type is provided on the first layer. The third layer made of a nitride semiconductor is provided on the second layer. The first electrode is electrically connected with the second layer. The second electrode is provided at a distance from the first electrode and electrically connected with the second layer. The control electrode is provided within a first trench via an insulating film. The first trench is disposed between the first and the second main electrodes, penetrates the third and the second layers, and reaches the first layer.
    Type: Application
    Filed: April 29, 2013
    Publication date: September 19, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Wataru Saito, Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno
  • Publication number: 20130172591
    Abstract: There is provided a method for producing iron methacrylate being inexpensive, and being high in activity and selectivity and good in solubility to a reaction liquid when being used in production of a hydroxyalkyl methacrylate as a catalyst. The method for producing iron methacrylate for production of a hydroxyalkyl methacrylate according to the present invention includes subjecting a mixture of a metallic iron having an oxygen atom content by XRF analysis of the surface thereof of 6% by mass or lower, and methacrylic acid to a heat treatment at 95° C. or higher and lower than 110° C. for 100 to 600 min. The method for producing a hydroxyalkyl methacrylate according to the present invention includes reacting an alkylene oxide with methacrylic acid to produce the hydroxyalkyl methacrylate, wherein iron methacrylate produced by the method according to the present invention is used as a catalyst.
    Type: Application
    Filed: December 26, 2011
    Publication date: July 4, 2013
    Applicant: MITSUBISHI RAYON CO., LTD.
    Inventors: Naoshi Murata, Kuniyoshi Ogura, Takeshi Matsuo, Akira Yoshioka
  • Publication number: 20130069117
    Abstract: A nitride semiconductor device includes a substrate, a first Inx1Ga1-x1-y1Aly1N layer, a second Inx2Ga1-x2-y2Aly2N layer, an interlayer insulating film, a source electrode, a drain electrode, a first gate electrode, a Schottky electrode, a second gate electrode, an interconnection layer. The second Inx2Ga1-x2-y2Aly2N layer is provided on a surface of the first Inx1Ga1-x1-y1Aly1N layer. The second Inx2Ga1-x2-y2Aly2N layer has a wider band gap than the first Inx1Ga1-x1-y1Aly1N layer. The first gate electrode is provided between the source electrode and the drain electrode on a surface of the second Inx2Ga1-x2-y2Aly2N layer. The Schottky electrode is provided on the second Inx2Ga1-x2-y2Aly2N layer between the first gate electrode and the drain electrode. The second gate electrode is provided on the second Inx2Ga1-x2-y2Aly2N layer between the Schottky electrode and the drain electrode. The interconnection layer electrically connects the source electrode, the Schottky electrode, and the second gate electrode.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akira YOSHIOKA, Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno, Wataru Saito