Patents by Inventor Akira Yoshioka

Akira Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200295171
    Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura
  • Patent number: 10771057
    Abstract: A semiconductor device of embodiments includes a first normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode via a first wiring, a fourth electrode, and a second control electrode, a second normally-off transistor having a fifth electrode, a sixth electrode electrically connected to the third electrode via a second wiring, and a third control electrode, a first diode having a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a capacitor having a first end portion connected to the first anode and the second control electrode and a second end portion.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: September 8, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hung Hung, Yasuhiro Isobe
  • Publication number: 20200091331
    Abstract: A semiconductor device includes first and second nitride semiconductor layers, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a gate electrode between the first and second electrodes, a first field plate electrode electrically connected to the first electrode, a second field plate electrode between the gate electrode and the second electrode and electrically connected to the first electrode, a first conductive layer on the gate electrode, and a second conductive layer on the first conductive layer. A distance between the gate electrode and the second field plate electrode in a lateral direction is shorter than a distance between the first conductive layer and the second field plate electrode in the lateral direction, and is equal to or shorter than a distance between the second conductive layer and the second field plate electrode.
    Type: Application
    Filed: March 1, 2019
    Publication date: March 19, 2020
    Inventors: Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA
  • Patent number: 10552458
    Abstract: A data transmission device that transmits data to another node, the data transmission device including: data storing unit for storing data; summary information storing unit for classifying data stored in the data storing unit into prescribed groups and for storing summary information that represents the number of pieces of data for each group; receiving unit for receiving summary information from the other node; selecting unit for selecting data to be transmitted based on the summary information received from the other node; and transmitting unit for transmitting the data selected by the selecting unit. The selecting unit favorably preferentially selects data included in a group with a smaller number of pieces of data based on the summary information received from the other node. Due to such a configuration, information with a high possibility of not being possessed by a communication partner can be selected and transmitted in a data sharing system.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: February 4, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Ryokichi Onishi, Makiko Matsumoto, Akira Yoshioka
  • Patent number: 10074739
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: September 11, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira Yoshioka, Kohei Oasa, Hung Hung, Yasuhiro Isobe
  • Publication number: 20180076311
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Application
    Filed: February 24, 2017
    Publication date: March 15, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu SAITO, Kohei OASA, Takuo KIKUCHI, Junji KATAOKA, Tatsuya SHIRAISHI, Akira YOSHIOKA, Kazuo SAKI
  • Patent number: 9917182
    Abstract: A semiconductor device includes: a first nitride semiconductor layer, a second nitride semiconductor layer that is provided on the first nitride semiconductor layer and has a band gap larger than a band gap of the first nitride semiconductor layer, a gate electrode that is provided on the first nitride semiconductor layer, a first electrode that is electrically connected to the first nitride semiconductor layer, a second electrode disposed such that the gate electrode is positioned between the first electrode and the second electrode, and electrically connected to the first nitride semiconductor layer, and a first insulation layer that is provided between the gate electrode and the second electrode, disposed such that the second nitride semiconductor layer is positioned between the first nitride semiconductor layer and the first insulation layer, and including silicon oxide having an oxygen-to-silicon atomic ratio (O/Si) of 1.50 or more and 1.85 or less.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: March 13, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Kohei Oasa, Takuo Kikuchi, Junji Kataoka, Tatsuya Shiraishi, Akira Yoshioka, Kazuo Saki
  • Patent number: 9887281
    Abstract: A semiconductor device includes a first stacked portion above a substrate, the first stacked portion comprising a first nitride semiconductor layer containing aluminum and a second nitride semiconductor layer containing carbon, a third nitride semiconductor layer on the first stacked portion, the third nitride semiconductor layer containing carbon and having a greater thickness than each of the first and second nitride semiconductor layers, the third nitride semiconductor layer having a lower carbon concentration than the second nitride semiconductor layer, a second stacked portion on the third nitride semiconductor, the second stacked portion comprising a fourth nitride semiconductor layer containing aluminum and a fifth nitride semiconductor layer containing carbon, a sixth nitride semiconductor layer on the second stacked portion, a seventh nitride semiconductor layer on the sixth nitride semiconductor layer and containing aluminum, and a first electrode on the seventh nitride layer.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: February 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Isobe, Hung Hung, Akira Yoshioka
  • Publication number: 20170271493
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, a third nitride semiconductor layer with an aluminum concentration higher than that of the second nitride semiconductor layer located on the second nitride semiconductor layer, a drain electrode and a source electrode provided on one of the second nitride semiconductor layer and on the third nitride semiconductor layer, and a gate electrode located between the drain electrode and the source electrode.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 21, 2017
    Inventors: Akira YOSHIOKA, Takuo KIKUCHI, Junji KATAOKA, Naoharu SUGIYAMA, Hung HUNG, Yasuhiro ISOBE
  • Publication number: 20170271495
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer containing aluminum located on the first nitride semiconductor layer, one or more nitride layers containing aluminum located on the second nitride semiconductor layer, a source electrode located on the second nitride semiconductor layer, a drain electrode located on one of the second nitride semiconductor layer or the nitride layer, and a gate electrode located between the source electrode and the drain electrode. An end of the nitride layer on the source electrode side thereof is located between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 21, 2017
    Inventors: Akira YOSHIOKA, Kohei OASA, Hung HUNG, Yasuhiro ISOBE
  • Publication number: 20170263741
    Abstract: A semiconductor device includes a first stacked portion above a substrate, the first stacked portion comprising a first nitride semiconductor layer containing aluminum and a second nitride semiconductor layer containing carbon, a third nitride semiconductor layer on the first stacked portion, the third nitride semiconductor layer containing carbon and having a greater thickness than each of the first and second nitride semiconductor layers, the third nitride semiconductor layer having a lower carbon concentration than the second nitride semiconductor layer, a second stacked portion on the third nitride semiconductor, the second stacked portion comprising a fourth nitride semiconductor layer containing aluminum and a fifth nitride semiconductor layer containing carbon, a sixth nitride semiconductor layer on the second stacked portion, a seventh nitride semiconductor layer on the sixth nitride semiconductor layer and containing aluminum, and a first electrode on the seventh nitride layer.
    Type: Application
    Filed: August 8, 2016
    Publication date: September 14, 2017
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA
  • Publication number: 20170256637
    Abstract: A semiconductor device includes a substrate, and a stacked portion over the substrate, the stacked structure including a first nitride semiconductor layer containing aluminum, a second nitride semiconductor layer containing carbon, and a third nitride semiconductor layer whose carbon concentration is lower than carbon concentration of the second nitride semiconductor layer. A fourth nitride semiconductor layer whose carbon concentration is lower than carbon concentration of the second nitride semiconductor layer and whose thickness is greater than the thickness of each of the first to third nitride semiconductor layers is provided on an upper surface of the stacked portion. A fifth nitride semiconductor layer containing aluminum is provided on an upper surface of the fourth nitride semiconductor layer. A first electrode is provided on an upper surface of the fifth nitride semiconductor layer.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 7, 2017
    Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA
  • Patent number: 9698141
    Abstract: A semiconductor device includes a first nitride semiconductor layer having a first region, a second nitride semiconductor layer that is on the first nitride semiconductor layer and contains carbon and silicon, a third nitride semiconductor layer that is on the second nitride semiconductor layer and has a second region, a fourth nitride semiconductor layer on the third nitride semiconductor layer, the fourth nitride semiconductor layer having a band gap that is wider than a band gap of the third nitride semiconductor layer, a source electrode that is on the fourth nitride semiconductor layer and is electrically connected to the first region, a drain electrode that is on the fourth nitride semiconductor layer and is electrically connected to the second region, and a gate electrode that is on the fourth nitride semiconductor layer and is between the source electrode and the drain electrode.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: July 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Toshiyuki Naka, Akira Yoshioka
  • Patent number: 9696168
    Abstract: A travel time information providing apparatus includes a probability distribution storage unit configured to store first probability distribution data which expresses an embarkation waiting time for each location where the waiting time occurs and second probability distribution data which expresses a travel time for each location where the travel time occurs; a route acquiring unit configured to acquire a route connecting a point of origin and a destination; a travel time calculating unit configured to calculate a probability distribution of a total travel time by convoluting all probability distribution data corresponding to an embarkation waiting time which occurs on the route and a travel time which occurs on the route; and an information providing unit configured to determine an estimated travel time based on the calculated probability distribution, and output the estimated travel time.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: July 4, 2017
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keiko Shimazaki, Akira Yoshioka, Masahiro Kuwahara, Takayuki Kusajima
  • Patent number: 9627504
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, source and drain electrodes over the second semiconductor layer, a gate electrode, and a first field plate electrode. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion thinner than the first semiconductor portion. The source and drain electrodes are electrically connected to the second semiconductor layer. The gate electrode is provided over the second semiconductor layer between the source electrode and the drain electrode. The first field plate electrode is provided over the second semiconductor layer and includes a portion that extends from a location over the gate electrode toward the drain electrode and has an end portion that is positioned over the second semiconductor portion.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: April 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohei Oasa, Akira Yoshioka, Yasuhiro Isobe
  • Patent number: 9627489
    Abstract: A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer containing an n-type dopant, on the first semiconductor layer, a third semiconductor layer having a resistance greater than a resistance of the second semiconductor layer, on the second semiconductor layer, a fourth semiconductor layer containing a nitride semiconductor, on the third semiconductor layer, and a fifth semiconductor layer containing a nitride semiconductor having a band gap greater than a band gap of the fourth semiconductor layer, on the fourth semiconductor layer.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: April 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hung Hung, Yasuhiro Isobe, Kohei Oasa, Akira Yoshioka
  • Publication number: 20170077241
    Abstract: According to embodiments, a semiconductor device includes a first laminated nitride semiconductor layer in which first nitride semiconductor layers and second nitride semiconductor layers are alternately laminated; a third nitride semiconductor layer; a fourth nitride semiconductor layer; a drain electrode; a source electrode; and a gate electrode. The first nitride semiconductor layer is carbon-containing gallium nitride. The second nitride semiconductor layer contains aluminum indium nitride. The third nitride semiconductor layer is on the first laminated nitride semiconductor layer and includes gallium nitride. The fourth nitride semiconductor layer is on the third nitride semiconductor layer and contains aluminum gallium nitride. The drain electrode and the source electrode are on the fourth nitride semiconductor layer. The gate electrode is between the drain electrode and the source electrode.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Inventors: Akira Yoshioka, Hung Hung, Yasuhiro Isobe
  • Publication number: 20170069623
    Abstract: A semiconductor device includes a first nitride semiconductor layer having a first region, a second nitride semiconductor layer that is on the first nitride semiconductor layer and contains carbon and silicon, a third nitride semiconductor layer that is on the second nitride semiconductor layer and has a second region, a fourth nitride semiconductor layer on the third nitride semiconductor layer, the fourth nitride semiconductor layer having a band gap that is wider than a band gap of the third nitride semiconductor layer, a source electrode that is on the fourth nitride semiconductor layer and is electrically connected to the first region, a drain electrode that is on the fourth nitride semiconductor layer and is electrically connected to the second region, and a gate electrode that is on the fourth nitride semiconductor layer and is between the source electrode and the drain electrode.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 9, 2017
    Inventors: Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA
  • Patent number: 9543146
    Abstract: According to one embodiment, a manufacturing method of a semiconductor device, comprising: forming a first nitride semiconductor layer on a substrate using a first temperature; decreasing a substrate temperature to a second temperature lower than the first temperature, after the forming the first nitride semiconductor layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer using the second temperature; increasing the substrate temperature to a third temperature higher than the first temperature, after the forming the second nitride semiconductor layer; and forming a third nitride semiconductor layer on the second nitride semiconductor layer using the third temperature.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: January 10, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoharu Sugiyama, Yasuhiro Isobe, Hung Hung, Akira Yoshioka
  • Patent number: 9466705
    Abstract: A semiconductor device according to one embodiment includes an n-type first GaN-based semiconductor layer, a p-type second GaN-based semiconductor layer on the first GaN-based semiconductor layer. The second GaN-based semiconductor layer includes a low impurity concentration region and a high impurity concentration region. An n-type third GaN-based semiconductor layer is provided on the second GaN-based semiconductor layer. The device includes a gate electrode being located adjacent to the third GaN-based semiconductor layer, the low impurity concentration region, and the first GaN-based semiconductor layer intervening a gate insulating film. The device includes a first electrode on the third GaN-based semiconductor layer, a second electrode on the high impurity concentration region, and a third electrode on the opposite side of the first GaN-based semiconductor layer from the second GaN-based semiconductor layer.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: October 11, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Toru Sugiyama, Yasunobu Saito, Kunio Tsuda