Patents by Inventor Akira Yoshioka

Akira Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160268130
    Abstract: According to one embodiment, a manufacturing method of a semiconductor device, comprising: forming a first nitride semiconductor layer on a substrate using a first temperature; decreasing a substrate temperature to a second temperature lower than the first temperature, after the forming the first nitride semiconductor layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer using the second temperature; increasing the substrate temperature to a third temperature higher than the first temperature, after the forming the second nitride semiconductor layer; and forming a third nitride semiconductor layer on the second nitride semiconductor layer using the third temperature.
    Type: Application
    Filed: September 1, 2015
    Publication date: September 15, 2016
    Inventors: Naoharu Sugiyama, Yasuhiro Isobe, Hung Hung, Akira Yoshioka
  • Publication number: 20160268408
    Abstract: A semiconductor device includes a first compound semiconductor layer on a substrate, a second compound semiconductor layer on the first compound semiconductor layer which has a band gap greater than the band gap of the first compound semiconductor layer, and a gate electrode on the second compound semiconductor layer. The gate length of the gate electrode is more twice as great as the thickness of the first compound semiconductor layer, and is equal to or smaller than five times as great as the thickness of the first compound semiconductor layer.
    Type: Application
    Filed: August 31, 2015
    Publication date: September 15, 2016
    Inventors: Kohei OASA, Yoshiharu TAKADA, Akira YOSHIOKA, Yasuhiro ISOBE, Hung HUNG
  • Patent number: 9412857
    Abstract: According to one embodiment, a nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a third electrode, a first insulating film and a second insulating film. The first semiconductor layer includes a nitride semiconductor. The second semiconductor layer is provided on the first layer, includes a nitride semiconductor, and includes a hole. The first electrode is provided in the hole. The second electrode is provided on the second layer. The third electrode is provided on the second layer so that the first electrode is disposed between the third and second electrodes. The first insulating film is provided between the first electrode and an inner wall of the hole and between the first and second electrodes, and is provided spaced from the third electrode. The second insulating film is provided in contact with the second layer between the first and third electrodes.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Yasunobu Saito, Hidetoshi Fujimoto, Tetsuya Ohno, Wataru Saito, Toru Sugiyama
  • Patent number: 9412825
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takaaki Yasumoto, Naoko Yanase, Kazuhide Abe, Takeshi Uchihara, Yasunobu Saito, Toshiyuki Naka, Akira Yoshioka, Tasuku Ono, Tetsuya Ohno, Hidetoshi Fujimoto, Shingo Masuko, Masaru Furukawa, Yasunari Yagi, Miki Yumoto, Atsuko Iida, Yukako Murakami, Takako Motai
  • Publication number: 20160211335
    Abstract: A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer containing an n-type dopant, on the first semiconductor layer, a third semiconductor layer having a resistance greater than a resistance of the second semiconductor layer, on the second semiconductor layer, a fourth semiconductor layer containing a nitride semiconductor, on the third semiconductor layer, and a fifth semiconductor layer containing a nitride semiconductor having a band gap greater than a band gap of the fourth semiconductor layer, on the fourth semiconductor layer.
    Type: Application
    Filed: August 20, 2015
    Publication date: July 21, 2016
    Inventors: Hung HUNG, Yasuhiro ISOBE, Kohei OASA, Akira YOSHIOKA
  • Publication number: 20160211357
    Abstract: A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer comprising a nitride semiconductor doped with p-type dopants on the first semiconductor layer, a third semiconductor layer comprising an undoped nitride semiconductor on the second semiconductor layer, a fourth semiconductor layer comprising an undoped nitride semiconductor on the third semiconductor layer, and a fifth semiconductor layer on the fourth semiconductor layer, the fifth semiconductor layer comprising a nitride semiconductor having a band gap greater than a band gap of the fourth semiconductor layer.
    Type: Application
    Filed: August 20, 2015
    Publication date: July 21, 2016
    Inventors: Hung HUNG, Yasuhiro ISOBE, Kohei OASA, Akira YOSHIOKA
  • Publication number: 20160211358
    Abstract: A semiconductor device includes a first semiconductor layer on a substrate, a second semiconductor layer on the first semiconductor layer, the second semiconductor layer including a nitride semiconductor doped with carbon, a third semiconductor layer on the second semiconductor layer, the third semiconductor layer including a nitride semiconductor doped with indium, and a fourth semiconductor layer on the third semiconductor layer, the fourth semiconductor layer including a nitride semiconductor having a band gap larger than a band gap of the third semiconductor layer. The concentration of indium in the third semiconductor layer is higher than 1×1018 cm?3 and lower than 1×1019 cm?3.
    Type: Application
    Filed: August 20, 2015
    Publication date: July 21, 2016
    Inventors: Hung HUNG, Yasuhiro ISOBE, Akira YOSHIOKA
  • Patent number: 9337300
    Abstract: A semiconductor device according to an embodiment includes a nitride semiconductor layer, a gate electrode provided above the nitride semiconductor layer, a source electrode provided above the nitride semiconductor layer, a drain electrode provided above the nitride semiconductor layer at a side opposite to the source electrode with respect to the gate electrode, a first silicon nitride film provided above the nitride semiconductor layer between the drain electrode and the gate electrode, and a second silicon nitride film provided between the nitride semiconductor layer and the gate electrode, an atomic ratio of silicon to nitrogen in the second silicon nitride film being lower than an atomic ratio of silicon to nitrogen in the first silicon nitride film.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: May 10, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Kuraguchi, Akira Yoshioka, Miki Yumoto, Hisashi Saito, Kohei Oasa, Toru Sugiyama
  • Publication number: 20160079406
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, source and drain electrodes over the second semiconductor layer, a gate electrode, and a first field plate electrode. The second semiconductor layer includes a first semiconductor portion and a second semiconductor portion thinner than the first semiconductor portion. The source and drain electrodes are electrically connected to the second semiconductor layer. The gate electrode is provided over the second semiconductor layer between the source electrode and the drain electrode. The first field plate electrode is provided over the second semiconductor layer and includes a portion that extends from a location over the gate electrode toward the drain electrode and has an end portion that is positioned over the second semiconductor portion.
    Type: Application
    Filed: March 2, 2015
    Publication date: March 17, 2016
    Inventors: Kohei OASA, Akira YOSHIOKA, Yasuhiro ISOBE
  • Patent number: 9287368
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate; semiconductor stacked layers including a nitride semiconductor provided on the substrate, and having a buffer layer, a carrier running layer provided on the buffer layer, and a barrier layer provided on the carrier running layer; a source electrode and a drain electrode provided on the semiconductor stacked layers and in contact with the semiconductor stacked layers; and a gate electrode provided on the semiconductor stacked layers and provided between the source electrode and the drain electrode. The gate electrode has a stacked structure, and a gate metal layer, a barrier metal layer, a first interconnection layer, and a second interconnection layer including Al are sequentially stacked from a side of a surface of the semiconductor stacked layers in the stacked structure.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: March 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiko Kuraguchi, Akira Yoshioka, Yoshiharu Takada
  • Publication number: 20160042639
    Abstract: In order to obtain a traffic flow when a specific condition is given to a target transportation network, transportation condition data which is data representing time constraints of traveling by first transportation means whose operation is not scheduled, a transportation parameter which is a parameter related to an operation of second transportation means whose operation is scheduled, and a travel demand which is data representing the number of traveling users for each desired arrival time and destination are respectively acquired. In addition, a template for generating a mathematical model representing travel of users between nodes is stored. By applying the transportation condition data, the transportation parameter, and the travel demand to the template, a mathematical model representing travel of users between nodes is generated. A traffic flow is obtained by solving an optimization problem that is formulated by the mathematical model.
    Type: Application
    Filed: November 14, 2013
    Publication date: February 11, 2016
    Inventors: Ryokichi ONISHI, Keiko SHIMAZAKI, Akira YOSHIOKA, Takayuki KUSAJIMA
  • Publication number: 20160027909
    Abstract: A semiconductor device according to one embodiment includes an n-type first GaN-based semiconductor layer, a p-type second GaN-based semiconductor layer on the first GaN-based semiconductor layer. The second GaN-based semiconductor layer includes a low impurity concentration region and a high impurity concentration region. An n-type third GaN-based semiconductor layer is provided on the second GaN-based semiconductor layer. The device includes a gate electrode being located adjacent to the third GaN-based semiconductor layer, the low impurity concentration region, and the first GaN-based semiconductor layer intervening a gate insulating film. The device includes a first electrode on the third GaN-based semiconductor layer, a second electrode on the high impurity concentration region, and a third electrode on the opposite side of the first GaN-based semiconductor layer from the second GaN-based semiconductor layer.
    Type: Application
    Filed: October 6, 2015
    Publication date: January 28, 2016
    Inventors: Akira Yoshioka, Toru Sugiyama, Yasunobu Saito, Kunio Tsuda
  • Publication number: 20150379114
    Abstract: A data transmission device that transmits data to another node, the data transmission device including: data storing unit for storing data; summary information storing unit for classifying data stored in the data storing unit into prescribed groups and for storing summary information that represents the number of pieces of data for each group; receiving unit for receiving summary information from the other node; selecting unit for selecting data to be transmitted based on the summary information received from the other node; and transmitting unit for transmitting the data selected by the selecting unit. The selecting unit favorably preferentially selects data included in a group with a smaller number of pieces of data based on the summary information received from the other node. Due to such a configuration, information with a high possibility of not being possessed by a communication partner can be selected and transmitted in a data sharing system.
    Type: Application
    Filed: February 27, 2014
    Publication date: December 31, 2015
    Inventors: Ryokichi ONISHI, Makiko MATSUMOTO, Akira YOSHIOKA
  • Publication number: 20150364590
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type, and a second semiconductor layer of a second conductivity type provided on the first semiconductor layer. The device further includes a third semiconductor layer of the first conductivity type provided on the second semiconductor layer, and a fourth semiconductor layer in contact with the first, second and third semiconductor layers. The device further includes a fifth semiconductor layer provided on a semi-polar face of the fourth semiconductor layer, and a control electrode provided on the fifth semiconductor layer through an insulating layer.
    Type: Application
    Filed: March 10, 2015
    Publication date: December 17, 2015
    Inventors: Tetsuya Ohno, Akira Yoshioka
  • Publication number: 20150357455
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type, and a second semiconductor layer of a second conductivity type provided on the first semiconductor layer. The device further includes a third semiconductor layer of the first conductivity type or an intrinsic type provided on the second semiconductor layer, and a fourth semiconductor layer provided on the first semiconductor layer. The device further includes a fifth semiconductor layer of the second conductivity type provided on the fourth semiconductor layer, and a control electrode provided on the second semiconductor layer through an insulating layer and electrically connected to the fifth semiconductor layer.
    Type: Application
    Filed: March 10, 2015
    Publication date: December 10, 2015
    Inventors: Tetsuya Ohno, Akira Yoshioka
  • Patent number: 9184258
    Abstract: A semiconductor device according to one embodiment includes an n-type first GaN-based semiconductor layer, a p-type second GaN-based semiconductor layer on the first GaN-based semiconductor layer. The second GaN-based semiconductor layer includes a low impurity concentration region and a high impurity concentration region. An n-type third GaN-based semiconductor layer is provided on the second GaN-based semiconductor layer. The device includes a gate electrode being located adjacent to the third GaN-based semiconductor layer, the low impurity concentration region, and the first GaN-based semiconductor layer intervening a gate insulating film. The device includes a first electrode on the third GaN-based semiconductor layer, a second electrode on the high impurity concentration region, and a third electrode on the opposite side of the first GaN-based semiconductor layer from the second GaN-based semiconductor layer.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: November 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Toru Sugiyama, Yasunobu Saito, Kunio Tsuda
  • Publication number: 20150308844
    Abstract: A travel time information providing apparatus includes a probability distribution storage unit configured to store first probability distribution data which expresses an embarkation waiting time for each location where the waiting time occurs and second probability distribution data which expresses a travel time for each location where the travel time occurs; a route acquiring unit configured to acquire a route connecting a point of origin and a destination; a travel time calculating unit configured to calculate a probability distribution of a total travel time by convoluting all probability distribution data corresponding to an embarkation waiting time which occurs on the route and a travel time which occurs on the route; and an information providing unit configured to determine an estimated travel time based on the calculated probability distribution, and output the estimated travel time.
    Type: Application
    Filed: November 21, 2013
    Publication date: October 29, 2015
    Inventors: Keiko SHIMAZAKI, Akira YOSHIOKA, Masahiro KUWAHARA, Takayuki KUSAJIMA
  • Patent number: 9165922
    Abstract: According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Yasunobu Saito, Hidetoshi Fujimoto, Takeshi Uchihara, Naoko Yanase, Toshiyuki Naka, Tetsuya Ohno, Tasuku Ono
  • Publication number: 20150263103
    Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer including a first nitride semiconductor, a second semiconductor layer on the first semiconductor layer including a second nitride semiconductor, a source electrode, a drain electrode, a first gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode having a schottky junction, a second gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the source electrode and the first gate electrode, electrically connected with the first gate electrode, and a third gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the drain electrode and the first gate electrode, electrically connected with the first gate electrode.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Hidetoshi Fujimoto, Akira Yoshioka, Takeshi Uchihara, Takaaki Yasumoto, Naoko Yanase, Tasuku Ono
  • Publication number: 20150263152
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 17, 2015
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Takako MOTAI