Patents by Inventor An-Cheng Chang

An-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240155663
    Abstract: A radio resource allocation method and a radio resource allocation system are provided. The radio resource allocation method includes: obtaining quality parameters of each of resource blocks, in which the quality parameters correspond to weight coefficients, respectively; adjusting the weight coefficients for a service requirement of each of network slices, and calculating, according to the weight coefficients and the quality parameters of each of the resource blocks, priority indices used to allocate the resource blocks to the network slices, respectively; and generating priority orders for allocating the resource blocks to the network slices, and configuring the base station to allocate the resource blocks to the network slices according to the priority orders.
    Type: Application
    Filed: November 18, 2022
    Publication date: May 9, 2024
    Inventors: CHENG-CHANG CHEN, LI-SHENG CHEN
  • Publication number: 20240155185
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Chia-Hao CHANG, You-Tsai JENG, Kai-Wen YEH, Yi-Cheng CHEN, Te-Chuan WANG, Kai-Wen CHENG, Chin-Lung LIN, Tai-Lai TUNG, Ko-Yin LAI
  • Publication number: 20240154025
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20240154632
    Abstract: A switching circuit and a method of providing the switching circuit are provided. The switching circuit includes a first transmission amplifier, a second transmission amplifier, a third transmission amplifier, and a fourth transmission amplifier. The first transmission amplifier amplifies a first signal at a first connection port and transmits the first signal to a second connection port in a first mode. The second transmission amplifier amplifies a second signal at a third connection port and transmits the second signal to a fourth connection port in the first mode. The third transmission amplifier amplifies the first signal at the first connection port and transmits the first signal to the fourth connection port in the second mode. The fourth transmission amplifier amplifies the second signal at the third connection port and transmits the second signal to the second connection port in the second mode.
    Type: Application
    Filed: December 16, 2022
    Publication date: May 9, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Teng Chang, Yu-Cheng Hsu
  • Publication number: 20240154469
    Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment includes a magnetic attraction member and a connecting structure. The magnetic attraction member is independent from the lid and adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. At least a portion of the connecting structure is fixed to the container.
    Type: Application
    Filed: May 17, 2023
    Publication date: May 9, 2024
    Inventors: JUI-CHEN LU, CHING-YU WANG, YU-TING HUNG, YU-CHANG CHIANG, CHENG-CHE HO
  • Publication number: 20240153958
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a plurality of semiconductor layers having a first group of semiconductor layers, a second group of semiconductor layers disposed over and aligned with the first group of semiconductor layers, and a third group of semiconductor layers disposed over and aligned with the second group of semiconductor layers. The structure further includes a first source/drain epitaxial feature in contact with a first number of semiconductor layers of the first group of semiconductor layers and a second source/drain epitaxial feature in contact with a second number of semiconductor layers of the third group of semiconductor layers. The first number of semiconductor layers of the first group of semiconductor layers is different from the second number of semiconductor layers of the third group of semiconductor layers.
    Type: Application
    Filed: January 7, 2024
    Publication date: May 9, 2024
    Inventors: Jung-Hung CHANG, Zhi-Chang LIN, Shih-Cheng CHEN, Chien Ning YAO, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240154014
    Abstract: The present disclosure provides a forksheet structure in a semiconductor device and methods of manufacturing thereof. The forksheet structure according to the present disclosure includes a dielectric wall disposed between two channel regions inside a gate structure and without extending through the sidewall spacers to the source/drain regions. In some embodiments, a cut metal gate (CMG) dielectric structure is formed in the gate structure along with the dielectric walls. A gate dielectric layer is in contact with the dielectric wall. In some embodiments, the dielectric layer surrounds semiconductor channels in the channel region. In other embodiments, the gate dielectric layer surrounds a portion of the semiconductor channels in the channel region, for example forming a ?-shape cross sectional profile around the semiconductor channel.
    Type: Application
    Filed: February 7, 2023
    Publication date: May 9, 2024
    Inventors: Kuan-Ting PAN, Kuo-Cheng CHIANG, Shi Ning JU, Chia-Hao CHANG, Chih-Hao WANG
  • Publication number: 20240148301
    Abstract: The present invention provides a smart wearable device, which is held on an upper body of a wearer by a plurality of contact pad sets, and has a connection unit, a first sensing module, a second sensing module, and an extension unit.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 9, 2024
    Inventors: Chien-Hsiang Chang, Yang-Cheng Lin, Wei-Chih Lien, Tseng-Ping Chiu, Pei-Yun Wu, Bo Liu
  • Publication number: 20240149403
    Abstract: A socket includes multiple protrusions and grooves alternatively formed in the inner periphery of the central hole of the socket. Each protrusion has an encounter face formed on the distal end thereof. The encounter face includes two inclined faces which intersect at a peak point by a top angle. Each protrusion includes two lateral sides which respectively face the grooves corresponding thereto. The two inclined faces respectively intersect the two lateral sides at a corner by a corner angle which is an obtuse angle. An angle of 2 to 9 degrees is defined between each of the inclined face and a chord that passes the peak point and is perpendicular to an axis of the protrusion. The center angle between the two lateral sides of each protrusion is 25 to 44 degrees and the engagement between the two inclined faces and the worn object can be enhanced.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Inventors: Kuo-Cheng Wu, Chih-Chao Chang
  • Publication number: 20240154555
    Abstract: A propulsion system for a device includes an electric motor configured to generate torque to propel the device. A controller is in communication with the electric motor and is adapted to select at least one harmonic order for a harmonic current command. The controller is adapted to define a plurality of operating regions, including a first operating region, a second operating region and a third operating region, each associated with a respective objective function for generating the harmonic current command. The controller is adapted to operate the harmonic current command with four degrees of freedom by selectively varying a q-axis current magnitude, a d-axis current magnitude, a q-axis phase and a d-axis phase as a function of the torque and a motor speed.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 9, 2024
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Vinod Chowdary Peddi, Cheng Gong, Le Chang, Song He
  • Publication number: 20240151346
    Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment is configured to be disposed on the lid or the body portion and includes a magnetic attraction member and a connecting structure. The magnetic attraction member is adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. The connecting structure includes a fastening member, and the fastening member is adapted to be detachably fastened to the body portion or the lid.
    Type: Application
    Filed: June 9, 2023
    Publication date: May 9, 2024
    Inventors: JUI-CHEN LU, CHING-YU WANG, YU-TING HUNG, YU-CHANG CHIANG, CHENG-CHE HO
  • Publication number: 20240152679
    Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Rachid Salik, Chin-Chang Hsu, Cheng-Chi Wu, Chien-Wen Chen, Wen-Ju Yang
  • Publication number: 20240153887
    Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Patent number: 11980037
    Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gate stacks separate from FE capacitors of these cells. An example memory cell may be implemented as an IC device that includes a support structure (e.g., a substrate) and a transistor provided over the support structure and including a gate stack. The IC device also includes a FE capacitor having a first capacitor electrode, a second capacitor electrode, and a capacitor insulator of a FE material between the first capacitor electrode and the second capacitor electrode, where the FE capacitor is separate from the gate stack (i.e., is not integrated within the gate stack and does not have any layers that are part of the gate stack). The IC device further includes an interconnect structure, configured to electrically couple the gate stack and the first capacitor electrode.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: May 7, 2024
    Assignee: Intel Corporation
    Inventors: Nazila Haratipour, Shriram Shivaraman, Sou-Chi Chang, Jack T. Kavalieros, Uygar E. Avci, Chia-Ching Lin, Seung Hoon Sung, Ashish Verma Penumatcha, Ian A. Young, Devin R. Merrill, Matthew V. Metz, I-Cheng Tung
  • Patent number: 11979158
    Abstract: An integrated circuit (IC) device includes a master latch circuit having a first clock input and a data output, a slave latch circuit having a second clock input and a data input electrically coupled to the data output of the master latch circuit, and a clock circuit. The clock circuit is electrically coupled to the first clock input by a first electrical connection configured to have a first time delay between the clock circuit and the first clock input. The clock circuit is electrically coupled to the second clock input by a second electrical connection configured to have a second time delay between the clock circuit and the second clock input. The first time delay is longer than the second time delay.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yu Lin, Yung-Chen Chien, Jia-Hong Gao, Jerry Chang Jui Kao, Hui-Zhong Zhuang
  • Publication number: 20240142361
    Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventors: YEN-CHANG CHU, CHENG-NAN TSAI, CHIH-MING SUN
  • Publication number: 20240140742
    Abstract: A detecting method of a sheet detection device includes: generating, by a first magnetic sensing element, a first voltage signal corresponding to a magnetic element; generating, by a second magnetic sensing element, a second voltage signal corresponding to the magnetic element; determining, by a processing element, a first relative position of the magnetic element relative to the first magnetic sensing element according to the first voltage signal; determining, by the processing element, a second relative position of the magnetic element relative to the second magnetic sensing element according to the second voltage signal; determining, by the processing element, a stopping position of the magnetic element according to the first relative position and the second relative position; determining, by the processing element, a paper size of a paper abutted by a paper guide according to the stopping position. A sheet detection device is also disclosed.
    Type: Application
    Filed: December 6, 2022
    Publication date: May 2, 2024
    Inventors: Tzu-Cheng CHANG, Wei-Chun JAU
  • Publication number: 20240143141
    Abstract: The present disclosure generally relates to underwater user interfaces.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Benjamin W. BYLENOK, Alan AN, Richard J. BLANCO, Andrew CHEN, Maxime CHEVRETON, Kyle B. CRUZ, Walton FONG, Ki Myung LEE, Sung Chang LEE, Cheng-I LIN, Kenneth H. MAHAN, Anya PRASITTHIPAYONG, Alyssa RAMDYAL, Eric SHI, Xuefeng WANG, Wei Guang WU
  • Publication number: 20240145304
    Abstract: An interconnect structure is provided. The interconnect structure includes a transistor on a substrate, a first dielectric layer over the transistor, a first metal line through the first dielectric layer, a second dielectric layer over the first dielectric layer, and a via through the second dielectric layer and on the first metal line. A first side surface of the first dielectric layer includes a first portion in direct contact with the first metal line and a second portion in direct contact with the via, and the first portion of the first side surface of the first dielectric layer is aligned with the second portion of the first side surface of the first dielectric layer.
    Type: Application
    Filed: December 22, 2023
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Han LIN, Che-Cheng CHANG
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin