Abstract: An embodiment of the present invention provides a picture processing method in an embedded system. The picture processing method includes: performing a bit setting operation on an input/output register corresponding to a communication GPIO port of a camera module in the embedded system, so as to improve a picture collection speed of the camera module; compressing a collected picture using a preset picture compression algorithm and transmitting the compressed picture to a picture preprocessing unit in the embedded system; and filtering out, by the picture preprocessing unit, a picture background using a preset filtering algorithm to obtain picture features of a target object in the picture. With the picture processing method, requirements for an occupied memory resource are balanced while a picture collection speed and a picture data processing speed are increased.

Abstract: In a method of manufacturing a semiconductor device, initial connection patterns are prepared, initial cutting patterns for cutting the initial connection patterns are prepared, non-functional connection patterns at least from the initial connection patterns are identified, final cutting patterns are prepared from the initial cutting patterns and the non-functional connection patterns, a photo mask is prepared from the final cutting patterns, a photo resist pattern is formed over a target layer by a lithography operation using the photo mask, the target layer is patterned to form openings in the target layer by using the photo resist pattern, and connection layers are formed by filling the openings with a conductive material.

Abstract: An ether-bridged dication is provided with two monovalent cations bonded via a carbon chain having ether group(s). The ether-bridged dication, monovalent cations, and anions are contained together within an ionic liquid electrolyte which is applied to a charge storage device. The ether-bridged dication, the ionic liquid electrolyte, and the charge storage device have operational abilities at room temperatures or below, and a reachable working potential of 3.5 V.

Abstract: An automatic detection method for a paper size is disclosed. a plurality of mark points is set on a paperweight along a paperweight direction that is different from a feeding direction. The disclosure senses a plurality of row images combining into a scan image during a paper passing between the paperweight and an image sensor, determines an edge length of the paper based on a range of the mark points covered by the paper, and determines a paper size based on the edge length. The disclosure can effectively detect the paper size without any additional sensors.

Abstract: A glass clamping model based on microscopic displacement experiment, including a frame, a transparent silicone sleeve having a horizontal through hole, a piston, a piston cap arranged on the frame, a connecting plate, a screw compression bracket, a clamp support, a glass sheet entirety placed in the transparent silicone sleeve, a boss, a light source and a microscope. The transparent silicone sleeve is sheathed on the piston cap, the piston penetrates through the horizontal penetration hole; the connecting plate and the clamp support are respectively connected to both ends of the frame, the end of the screw compression bracket is clamped between the frame and the connecting plate, and the piston and the frame are connected with the clamp support; an emptying channel and an inlet passage are respectively arranged at both ends of the piston, and an outlet passage is arranged at an end of the piston.

Abstract: The present invention provides a mountable arm assembly for fitness equipment, comprising two arm members and a connector for pivot connection of the two arm members. The two arm members respectively provide a plurality of assembly portions for length adjustment of the tension arm. The connector is formed with a pivot connection portion and a plurality of eccentric positioning portions. Specifically, an adjustable disposing angle is formed between the two arm members, and at least one of the two arm members sets the disposing angle through at least one eccentric positioning portion. The arm assembly can be mounted on fitness equipment and can swing back and forth through the pivot connection portion. The users can select one assembly portion on each of the two arm members for required tension arm lengths and add an applied force and a resistance force respectively on the two assembly portions.

Abstract: A semiconductor device includes a substrate, a fin protruding from the substrate, and a gate stack over the substrate and engaging the fin. The fin having a first end and a second end. The semiconductor device also includes a dielectric layer abutting the first end of the fin and spacer features disposed on sidewalls of the gate stack and on a top surface of the dielectric layer.

Abstract: A method is performed by using a master smart scale with a master-slave mode, a remote communication device and a slave smart scale to manage multiple chemicals from a remote place. The master smart scale performs an initialization procedure to obtain an initial weight of one chemical; generate an identification information by reading a radio frequency tag of the chemical; use the identification information to inform the remote communication device to open an input page for users to input a basic information into the master smart scale; and mark the basic information and the initial weight with the identification information. In the master-slave mode, the master smart scale allows receiving the information of the chemical from its slave smart scale. For inquiry, a specific page is opened with the remote communication device to receive and display a statistical data generated from the master smart scale.

Abstract: The present invention discloses a method for comprehensive evaluation of shale fracability under the geology-engineering “double-track” system, comprising the following steps: S1: Divide the target horizontal fracturing interval into multiple sampling sections; S2: Establish the reservoir property evaluation factor of each sampling section, and calculate the geological evaluation index of the target horizontal fracturing interval according to the reservoir property evaluation factor of each sampling section; S3: Establish the brittleness factor, natural fracture factor and natural fracture opening factor of each sampling section, and then establish the engineering evaluation index of each sampling section according to these factors; S4: Calculate the engineering evaluation index of the target horizontal fracturing interval according to the engineering evaluation factor of each sampling section; S5: Evaluate the fracability of the target horizontal fracturing interval according to the geological evaluation ind

Abstract: One aspect of this description relates to a memory array. The memory array includes a plurality of N-stack pass gates, a plurality of enable lines, a plurality of NMOS stacks, a plurality of word lines, and a matrix of resistive elements. Each N-stack pass gate includes a stage-1 PMOS core device and a stage-N PMOS core device in series. Each stage-1 PMOS is coupled to a voltage supply. Each enable line drives a stack pass gate. Each N-stack selector includes a plurality of NMOS stacks. Each NMOS stack includes a stage-1 NMOS core device and a stage-N NMOS core device in series. Each stage-1 NMOS core device is coupled to a ground rail. Each word line is driving a stack selector. Each resistive element is coupled between a stack pass gate and a stack selector. Each voltage supply is greater than a breakdown voltage for each of the core devices.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming at least one epitaxial layer over a substrate; forming a mask over the epitaxial layer; patterning the epitaxial layer into a semiconductor fin; depositing a semiconductor capping layer over the semiconductor fin and the mask, wherein the semiconductor capping layer has a first portion that is amorphous on a sidewall of the mask; performing a thermal treatment such that the first portion of the semiconductor capping layer is converted from amorphous into crystalline; forming an isolation structure around the semiconductor fin; and forming a gate structure over the semiconductor fin.

Abstract: In some embodiments, a field effect transistor (FET) structure comprises a body structure, dielectric structures, a gate structure and a source or drain region. The gate structure is formed over the body structure. The source or drain region is embedded in the body structure beside the gate structure, and abuts and is extended beyond the dielectric structure. The source or drain region contains stressor material with a lattice constant different from that of the body structure. The source or drain region comprises a first region formed above a first level at a top of the dielectric structures and a second region that comprises downward tapered side walls formed under the first level and abutting the corresponding dielectric structures.

Abstract: Disclosed is a test system including a transmitter, a receiver, a measuring circuit, and a control circuit. The transmitter is coupled to the receiver in a DC coupling manner, and includes: a signal input circuit determining an output signal according to an input signal; a current source coupled between the signal input circuit and a low power-supply terminal and configured to determine a total current passing through the signal input circuit in a non-open/short-circuited condition; and a signal output wire circuit outputting the output signal for a performance test. The receiver includes: an impedance circuit coupled to the signal output wire circuit; and a coupling circuit coupling the impedance circuit with a high power-supply terminal. The measuring circuit measures a target current/voltage between the high power-supply terminal and low power-supply terminal to generate a measurement result.

Abstract: A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a stop layer formed over a substrate and a fin structure formed over the stop layer. The FinFET device structure includes a gate structure formed over the fin structure and a source/drain (S/D) structure adjacent to the gate structure. A bottom surface of the S/D structure is located at a position that is higher than or level with a bottom surface of the stop layer.

Abstract: This disclosure is directed to an automatic feeding and scanning device having a scanning module, a paper feeding module and a cleaning module. The scanning module has a carrying platen, a scanning platen, and a scanner, the carrying platen and the scanning platen are light transmissive plates, two surfaces of the scanning platen are a bottom surface and a top surface opposite to the bottom surface, the scanner is arranged corresponding to the bottom surface of the scanning platen. The cleaning module has a brush and an actuating assembly connected to the brush and driving the brush. The brush is arranged corresponding to the top surface of the scanning platen, the actuating assembly drives the brush to scrape the top surface of the scanning platen.

Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.

Abstract: A memory device is disclosed, including a bit cell storing a bit data. The bit cell includes multiple first transistors coupled to a node, multiple second transistors each coupled in series to a corresponding one of the first transistors, and at least one third transistor. The first transistors are turned on in response to a control signal. The second transistors are turned on in response to a first word line signal. The at least one third transistor has a control terminal to receive a second word line signal. In a programming mode of the memory device, the at least one third transistor provides, in response to the second word line signal, an adjust voltage to the node. The adjust voltage is associated with a voltage level of a first terminal of the at least one third transistor.

Abstract: Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photosensors.

Abstract: A dual-axle linkage detection structure includes a first object, a second object, a sensor body, and a shielding element. The first object is movably connected to a base. The second object is movably connected to the first object. The sensor body is disposed on the first object and includes detecting positions. The shielding element includes a shielding part. When the second object covers the first object and the first object covers the base, the shielding part moves into the detecting position. When the second object moves away from the first object, or when the first object moves away from the base and drives the shielding element to rotate, the shielding part moves out of the detecting position.