Patents by Inventor An-Cheng Chang

An-Cheng Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11494619
    Abstract: A device includes first wires, second wires, resistors, and a processor. Input signals are transmitted from the first wires through the resistors to the second wires. The processor receives a sum value of the input signals from one of the second wires, and shifts the sum value by a nonlinear activation function to generate a shifted sum value. The processor calculates a backpropagation value based on the shifted sum value and a target value, and generates a pulse number based on a corresponding input signal of the input signal and the backpropagation value. Each of a value of the corresponding input signal and the backpropagation value is higher than or equal to a threshold value. The processor applies a voltage pulse to one of the resistors related to the corresponding input signal based on the pulse number.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: November 8, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Tuo-Hung Hou, Chih-Cheng Chang
  • Patent number: 11495390
    Abstract: A buildup board structure incorporating magnetic induction coils and flexible boards is disclosed. The buildup board structure includes at least one first buildup unit or at least one second buildup unit. The first buildup unit includes at least one first buildup body, the second buildup unit includes at least one second buildup body. Any two adjacent buildup bodies are separated by a covering layer provided with a central hole for electrical insulation. All central holes are aligned. Each buildup body includes a plurality of flexible boards, and each flexible board is embedded with a plurality of magnetic induction coils surrounding the corresponding central hole and connected through connection pads. The first and/or second buildup bodies are easily laminated in any order by any number as desired such that the effect of magnetic induction provided by the magnetic induction coils embedded in the buildup board structure are addable to greatly enhance the overall effect of magnetic induction.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: November 8, 2022
    Assignee: KINSUS INTERCONNECT TECHNOLOGY CORP.
    Inventors: Ting-Hao Lin, Chiao-Cheng Chang, Yi-Nong Lin
  • Publication number: 20220352230
    Abstract: Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photo sensors.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 3, 2022
    Inventors: Po-Han CHEN, Kuo-Cheng Lee, Fu-Cheng Chang
  • Publication number: 20220352333
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Application
    Filed: November 11, 2021
    Publication date: November 3, 2022
    Inventors: Min-Kun DAI, Wei-Gang CHIU, I-Cheng CHANG, Cheng-Yi WU, Han-Ting TSAI, Tsann LIN, Chung-Te LIN
  • Patent number: 11484368
    Abstract: A method for intraoperatively planning and facilitating a revision arthroplasty procedure. The method includes capturing positions of a tracked probe as the tracked probe contacts an interface area between a bone and a primary implant component implanted on the bone, intraoperatively generating a virtual boundary corresponding to a portion of the interface area to be removed to detach the primary implant component from the bone using the positions of the tracked probe and without use of pre-operative medical imaging, facilitating removal of the primary implant component from the bone by providing a constraint on operation of a cutting tool while the cutting tool removes the portion of the interface area, the constraint based on a relationship between the cutting tool and the virtual boundary.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: November 1, 2022
    Assignee: MAKO Surgical Corp.
    Inventors: Viktor Krebs, Hyosig Kang, Snehal Kasodekar, Matt Harrow, Jienan Ding, Ta-Cheng Chang, Min Wu, Jean Gonzalez, Peter Ebbitt
  • Patent number: 11484340
    Abstract: Disclosed is an arthroscopic cannula to solve the problem of more wounds being created due to the use of a plurality of cannulas in a conventional arthroscopic surgery. The arthroscopic cannula includes a cannula body, a spacer provided inside the cannula body and extending axially along the cannula body to divide an internal space of the cannula body into a first chamber and a second chamber, and a joint connected to one end of the cannula body. The interior of the joint intercommunicates with the first chamber and the second chamber.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: November 1, 2022
    Assignee: KAOHSIUNG MEDICAL UNIVERSITY
    Inventors: Pei-hsi Chou, Cheng-chang Lu, Yu-chuan Lin
  • Patent number: 11490496
    Abstract: An interactive display system includes a display device and a user device. The display device includes a controlling unit and lighting units, and the controlling unit transmits a color signal to the lighting units. When the user device emits an active light signal to the lighting units, the lighting unit that receives the active light signal lights up according to the color signal. Namely, when the user uses the user device to emit the active light signal to the lighting units of the display device, the lighting units illuminated by the active light signal can light up. Therefore, the user can use the display device as a canvas, and the user can draw a picture or write a memo on the display device for interacting with the display device of the interactive display system.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: November 1, 2022
    Assignee: Power Mos Electronic Limited
    Inventor: Cheng-Chang Lai
  • Publication number: 20220341965
    Abstract: An electronic device with function of recording falling and hitting events is provided. The electronic device includes a gravity sensing unit, a computing unit, and a memory unit. The gravity sensing unit is configured to generate a gravity sensing signal. The computing unit is electrically connected to the gravity unit and is configured to: continuously receive the gravity sensing signal; determine, based on the gravity sensing signal, whether the electronic device enters a falling state or not; determine, based on the gravity sensing signal, whether the electronic device encounters a hitting within a predetermined period of time or not after entering the falling state; and output a falling and hitting record when it is determined that the electronic device encounters a hitting. The memory unit is electrically connected to the computing unit and configured to store the falling and hitting record.
    Type: Application
    Filed: March 1, 2022
    Publication date: October 27, 2022
    Inventors: Chieh KAO, Yi- Cheng CHANG, Jheng-Siou CAI, Kai Yu HSU
  • Patent number: 11481929
    Abstract: Disclosed herein includes a system, a method, and a device for compressing image data. The device includes one or more processors, coupled to memory, configured to identify a plurality of sub-blocks of a block of image data including a first sub-block and a second sub-block. The one or more processors are configured to identify a first data characteristic of data of the first sub-block and a second data characteristic of data of the second sub-block, determine a first compression technique based at least on the first data characteristic of the first sub-block, determine a second compression technique based at least on the second data characteristic of the second sub-block, and compress the first sub-block using the first compression technique and the second sub-block using the second compression technique.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: October 25, 2022
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Cheng Chang, Richard Lawrence Greene, Richard Webb
  • Publication number: 20220336671
    Abstract: A planar insulating spacer layer is formed over a substrate, and a vertical stack of a gate electrode, a gate dielectric layer, and a first semiconducting metal oxide layer may be formed thereabove. The first semiconducting metal oxide layer includes atoms of a first n-type dopant at a first average dopant concentration. A second semiconducting metal oxide layer is formed over the first semiconducting metal oxide layer. Portions of the second semiconducting metal oxide layer are doped with the second n-type dopant to provide a source-side n-doped region and a drain-side n-doped region that include atoms of the second n-type dopant at a second average dopant concentration that is greater than the first average dopant concentration. Various dopants may be introduced to enhance performance of the thin film transistor.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 20, 2022
    Inventors: Min-Kun Dai, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin, Wei-Gang Chiu
  • Publication number: 20220336279
    Abstract: A method for forming an interconnect structure is provided. The method for forming the interconnect structure includes forming a first dielectric layer over a substrate, forming a first conductive feature through the first dielectric layer, etching the first conductive feature to form a recess over the first conductive feature, forming a second dielectric layer over the first dielectric layer and filling the recess, etching the second dielectric layer to form an opening exposing an upper surface of the first conductive feature, and forming a second conductive feature in the opening.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Han LIN, Che-Cheng CHANG
  • Publication number: 20220336374
    Abstract: A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. A hole is formed on a surface of the substrate, wherein the hole is located within projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material, surrounding the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate, are exposed by the molding material.
    Type: Application
    Filed: July 4, 2022
    Publication date: October 20, 2022
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Publication number: 20220328116
    Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.
    Type: Application
    Filed: September 24, 2021
    Publication date: October 13, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Jimmy Lee, Yih Wang
  • Publication number: 20220328662
    Abstract: A manufacturing process and device are provided in which a first opening in formed within a substrate. The first opening is reshaped into a second opening using a second etching process. The second etching process is performed with a radical etch in which neutral ions are utilized. As such, substrate push is reduced.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Inventors: Bo-Feng Young, Po-Chi Wu, Che-Cheng Chang
  • Publication number: 20220328356
    Abstract: Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a substrate. The semiconductor device also includes a first fin and a second fin over the substrate. The semiconductor device further includes a first gate electrode and a second gate electrode traversing over the first fin and the second fin, respectively. In addition, the semiconductor device includes a gate dielectric layer between the first fin and the first gate electrode and between the second fin and the second gate electrode. Further, the semiconductor device includes a dummy gate electrode over the substrate, and the dummy gate electrode is between the first gate electrode and the second gate electrode. An upper portion of the dummy gate electrode is wider than a lower portion of the dummy gate electrode.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 13, 2022
    Inventors: Che-Cheng Chang, Chang-Yin Chen, Jr-Jung Lin, Chih-Han Lin, Yung-Jung Chang
  • Patent number: 11469672
    Abstract: Disclosed is an interleaved buck-boost converter. The interleaved buck-boost converter includes a master switching stage and a slave switching stage that are controlled by a pulse-width-modulation (PWM) controller.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: October 11, 2022
    Assignee: Silego Technology Inc.
    Inventor: Kevin Yi Cheng Chang
  • Patent number: 11467202
    Abstract: The disclosure provides an electronic device and a diagnosis method of a light-emitting device. The light-emitting device includes at least one region, and each region of the at least one region has a plurality of light-emitting units. The diagnosis method includes the following steps. A plurality of light-emitting units of one of the at least one region are illuminated by a current. A voltage value corresponding to the current is compared with a first standard voltage value corresponding to a first standard current corresponding to the one of the at least one region. Whether the one of the at least one region is abnormal is determined according to a result of comparing the voltage value with the first standard voltage value. Therefore, the diagnosis method of the disclosure may effectively diagnose whether the at least one region of the light-emitting device is abnormal.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: October 11, 2022
    Assignee: Innolux Corporation
    Inventors: Yu-Ming Huang, Yi-Cheng Chang, Chia-Huan Huang
  • Publication number: 20220319865
    Abstract: An interconnect structure for insertion loss reduction in signal transmission and a method thereof are disclosed. In an embodiment, an interconnect is formed on a substrate by chemical etching process, and when the interconnect is protected by photoresist in chemical etching process, the etching direction of etching solution is not oriented, so undercut areas are respectively formed on both sides of a bottom of the interconnect at contact of the interconnect and the substrate because of etching solution residue after the etching process. An included angle formed in the undercut area between the interconnect and the substrate is defined as an etch angle, and a length of the portion, exposing in the undercut area, of the substrate is defined as an etch length. Controlling sizes of the etch angle and the etch length can reduce an insertion loss in signal transmission.
    Type: Application
    Filed: August 31, 2021
    Publication date: October 6, 2022
    Inventors: Cheng EN HO, Shun Cheng CHANG, Jun Chou YU, Cheng Yu LEE, Chien Chang HUANG
  • Publication number: 20220313006
    Abstract: A beverage manufacturing machine includes a heating mechanism, a brewing mechanism and a cooling mechanism. The heating mechanism heats up drinking water and sends the hot drinking water to the brewing mechanism. There are two brewing mechanisms for brewing a hot drink, and the hot drink in a primary cooling bushing exchanges heat with room temperature water to realize a first cooling. The drink after the first cooling reaches a secondary cooling bushing to exchange heat with a low temperature coolant to realize a second cooling to produce an iced drink. The coolant after the heat exchange enters into a coolant buffer and then reflows to a coolant container, and a compressor drives the heat exchanger to lower the temperature of the coolant. Without requiring high skill, this machine makes good-tasted beverages with appropriate concentration or original iced liquid beverage with great aroma.
    Type: Application
    Filed: January 18, 2021
    Publication date: October 6, 2022
    Inventor: Wen-Cheng CHANG
  • Publication number: 20220318298
    Abstract: An image retrieval system receives an image for which to identify relevant images from an image repository. Relevant images may be of the same environment or object and features and other characteristics. Images in the repository are represented in an image retrieval graph by a set of image nodes connected by edges to other related image nodes with edge weights representing the similarity of the nodes to each other. Based on the received image, the image traversal system identifies an image in the image retrieval graph and alternatively explores and traverses (also termed “exploits”) the image nodes with the edge weights. In the exploration step, image nodes in an exploration set are evaluated to identify connected nodes that are added to a traversal set of image nodes. In the traversal step, the relevant nodes in the traversal set are added to the exploration set and a query result set.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 6, 2022
    Inventors: Maksims Volkovs, Cheng Chang, Guangwei Yu, Chundi Liu