Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method is disclosed of testing a plurality of non-volatile memory cells in an array of non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bit line, and wherein each word line is selectively coupled to a row decoder and each bit line is selectively coupled to a column decoder, the method comprising asserting, by the row decoder, all word lines in the array; asserting, by the column decoder, all bit lines in the array; performing a deep programming operation on the array of non-volatile memory cells; and measuring a total current received from the bit lines.

Abstract: Methods of forming a stack without damaging underlying layers are discussed. The encapsulation layer and dielectric layer are highly conformal, have low etch rates, and good hermeticity. These films may be used to protect chalcogen materials in PCRAM devices or any substrates sensitive to oxygen or moisture. Some embodiments utilize a two-step process comprising a first ALD process to form an encapsulation layer and oxidation process to form a dielectric layer.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes one or more interconnect dielectric layers arranged over a substrate. A bottom electrode is disposed over a conductive structure and extends through the one or more interconnect dielectric layers. A top electrode is disposed over the bottom electrode. A ferroelectric layer is disposed between and contacts the bottom electrode and the top electrode. The ferroelectric layer includes a first lower horizontal portion, a first upper horizontal portion arranged above the first lower horizontal portion, and a first sidewall portion and coupling the first lower horizontal portion to the first upper horizontal portion.

Abstract: The present disclosure relates to a memory device. The memory device includes an access device arranged on or within a substrate and coupled to a word-line and a source line. A plurality of lower interconnects are disposed within a lower dielectric structure over the substrate. A first electrode is coupled to the plurality of lower interconnects. The plurality of lower interconnects couple the access device to the first electrode. A second electrode is over the first electrode. One or more upper interconnects are disposed within an upper dielectric structure laterally surrounding the second electrode. The one or more upper interconnects couple the second electrode to a bit-line. A data storage structure is disposed between the first electrode and the second electrode. The data storage structure includes one or more metals having non-zero concentrations that change as a distance from the substrate varies.

Abstract: The present disclosure relates to optimized nucleic acid probes, nucleic acid chips, and assays and methods for detection of an analyte of interest in a sample, for example, an allergen in a food sample.

Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.

Abstract: An actuator system for a vehicle transmission includes an actuating unit and an electric motor drivingly connected to the actuating unit. The actuating unit is configured for displacement by the electric motor between an engagement mode where the transmission is connected to a propulsion unit and a disengagement mode where the transmission is disconnected from the propulsion unit. A clutch unit between the actuating unit and the electric motor is connected to a drive shaft of the electric motor. The clutch unit is configured for connecting the actuating unit to the electric motor when displacing the actuating unit between the engagement disengagement modes. The clutch unit disconnects the actuating unit from the electric motor in the engagement mode. The system further includes an oil pump unit driven by the electric motor at least in the engagement mode.

Abstract: A method for executing a process may include: receiving a process comprising data to execute from a sub-system; identifying a process graph for the process to execute, the process graph comprising a plurality of nodes connected by edges, each of the plurality of nodes in the process graph represents a type of operation to perform, an identification of data input, and an address for a handler; retrieve the identified process graph from a process graph source; traverse the identified process graph to a first node; call a first handler identified by the first node with the data; receive a first result; select, based on the result, one of a plurality of edges from the first node to a second node; call a second handler identified by the second node with the first result and the data; receive a second result; and output the second result to the sub-system.

Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

Abstract: A friction reduction system includes a housing including a central axis and a central passage, a valve disposed in the housing and including a first valve body and a second valve body wherein the first valve body is permitted to rotate relative to the second valve body, and a mandrel coupled to the second valve body and permitted to travel axially relative to the housing, wherein a first net pressure force is applied against the mandrel that corresponds to a drilling fluid pressure of a drilling fluid in response to flowing the drilling fluid through the valve and transitioning the valve from a closed configuration to an open configuration, and wherein a second net pressure force is applied against the mandrel that corresponds to a wellbore fluid pressure in response to flowing the drilling fluid through the valve and transitioning the valve from the open configuration to the closed configuration.

Abstract: A method and system for irrigating a field adjacent a watercourse is disclosed comprising a plurality of pumps along the watercourse and measuring from time to time at a plurality of measuring locations the salinity, the pH, the temperature and the turbidity of the water. The measuring locations are different from the pumping locations. A real time salinity, pH, temperature and turbidity at the pumping locations is predicted from the measured values and the pumps selectively disabled or enabled on the predicted salinity, pH, temperature and/or the turbidity. Additionally, there is disclosed an Alternate Wetting and Drying (AWD) method/system for irrigating a field using a pump comprising an outlet supplying water to the field and an inlet connected to a water source. The method/system comprises a sensor placed at a location in the field for sensing a water depth below a surface of the field and transmitting the water depth to a controller located remotely from the sensing location using a wireless connection.

Abstract: An system, method and software for controlling processes of an auto-refill system of an ampoule including one or more sensors configured to determine one or more liquid level heights within the ampoule. The auto-refill system having a state machine configured to control the auto-refill system, the state machine having one or more states for refilling the ampoule.

Abstract: In some embodiments, the present disclosure relates to a memory device including a semiconductor substrate, a first electrode disposed over the semiconductor substrate, a ferroelectric layer disposed between the first electrode and the semiconductor substrate, and a first stressor layer separating the first electrode from the ferroelectric layer. The first stressor layer has a coefficient of thermal expansion greater than that of the ferroelectric layer.

Abstract: A semiconductor device includes a bottom electrode, a top electrode, a switching layer and a diffusion harrier layer. The top electrode is over the bottom electrode. The switching layer is between the bottom electrode and the top electrode, and configured to store data. The diffusion barrier layer is between the bottom electrode and the switching layer to obstruct diffusion of ions between the switching layer and the bottom electrode.

Abstract: Ferroelectric stacks are disclosed herein that can improve retention performance of ferroelectric memory devices. An exemplary ferroelectric stack has a ferroelectric switching layer (FSL) stack disposed between a first electrode and a second electrode. The ferroelectric stack includes a barrier layer disposed between a first FSL and a second FSL, where a first crystalline condition of the barrier layer is different than a second crystalline condition of the first FSL and/or the second FSL. In some embodiments, the first crystalline condition is an amorphous phase, and the second crystalline condition is an orthorhombic phase. In some embodiments, the first FSL and/or the second FSL include a first metal oxide, and the barrier layer includes a second metal oxide. The ferroelectric stack can be a ferroelectric capacitor, a portion of a transistor, and/or connected to a transistor in a ferroelectric memory device to provide data storage in a non-volatile manner.

Abstract: Embodiments disclosed herein are directed to a flow pulsing system including a rotor, a stator, a dart which is configured to releasably couple with the rotor, and a nozzle releasably coupled to the rotor which is configured to control a fluid flow through the rotor. In some embodiments, the system uses a screen disposed therein which includes an inner bore in fluid communication with a plurality of lobe cavities along the rotor. In some embodiments, the system uses a stationary valve and an oscillating valve having a plurality of oscillating valve ports which are in fluid communication with the plurality of lobe cavities.

Abstract: Antibodies, fragments thereof, and chimeric proteins comprising same are presented that have specific binding activity against CD30. Advantageously, contemplated molecules can be used in pharmaceutical compositions for immune therapy, particularly in individuals diagnosed with hematopoietic malignancies, including Hodgkin lymphoma, CD30-positive B cell lymphomas, CD30-positive T cell lymphomas, CD30-positive NK cell lymphomas.

Abstract: Disclosed are example methods, systems, and devices that allow for the generation and provisioning of digital credentials, which may demonstrate that a trusted entity has validated individual identity attributes, or sets of attributes, of a user. Digital credentials may also demonstrate one or more extrapolations resulting from deductions or inductions from validated identity attributes. A receiver device may indicate which identity attributes or extrapolations are sought by displaying a QR or other code and/or via a transmission using NFC or other wireless communication, and a user device may access corresponding digital attributes in an ID wallet to be provisioned via code or transmission. Digital credentials may restrict uses and usability of identity attributes. Cryptographic keys and/or distributed ledger records may allow recipients to verify authenticity of digital credentials. The same identity attribute may be proven by showing validation by multiple selectable trusted entities.

Abstract: Various embodiments of the present disclosure are directed towards a memory cell including a data storage structure disposed between a top electrode and a bottom electrode. The data storage structure includes a lower switching layer overlying the bottom electrode, and an upper switching layer overlying the lower switching layer. The lower switching layer comprises a dielectric material doped with a first dopant.

Abstract: A computer-implemented method, system and computer program product is provided for optimizing a document change or provenance scoring system by weighting sections of a document, scoring the changes for each section, and then combining the change scores for each section to generate an overall change score. An associated report may also be generated that catalogs all of the various scoring elements. The weighted score is stored in a document management system and provides a human document reviewer a level of detail to evaluate document changes. Accordingly, the weighted score reveals whether a document's changes require a brief or detailed review before the document's changes are approved for a next document version.