Abstract: A storage device with self-status detection and an inspection method thereof are provided. The storage device includes a plurality of storage areas (i.e., block tables), a plurality of memory blocks, and a status detection unit. The storage areas respectively have a corresponding weight value, and the addresses of memory blocks which have the same number of error correct codes (ECCs) are recorded in the same storage area. The status detection unit obtains a status of the storage device according to the number of addresses of the memory blocks recorded in a storage area and the corresponding weight value of the storage area.

Abstract: A method for fabricating an image sensor is described. A substrate is provided. Multiple photoresist patterns are formed over the substrate, and then a thermal reflow step is performed to convert the photoresist patterns into multiple microlenses arranged in an array. The focal length of the microlens increases from the center of the array toward the edge of the array.

Abstract: A backlight module control system includes a plurality of backlight sub-modules, a control signals output unit, a voltage converter and a plurality of current control units. The control signals output circuit is for providing a voltage control signal, a current control signal and a plurality of PWM signals; the voltage converter is coupled to the control signals output circuit and the backlight sub-modules, and is for outputting an output voltage to the backlight sub-modules according to the voltage control signal; the current control units are coupled to the backlight sub-modules, respectively, and each current control unit is for determining a current of its corresponding backlight sub-module according to the current control signal, and each current control unit is further utilized for determining whether its corresponding backlight sub-module is enabled or not according to its corresponding PWM signal. In addition, only one backlight module is enabled at a same time.

Abstract: A docking station for connecting a notebook computer includes a supporting frame, a connector for electrically connecting to the notebook computer, and a handle pivoted to the supporting frame. A first slot is formed on the handle, and the handle includes a pushing part for pushing the connector in a first direction. The docking station includes a first stopper, and one end of the first stopper is disposed inside the first slot of the handle. The first stopper does not stop the connector when the handle is located in a first position. The pushing part pushes the connector in the first direction so that the connector is connected to the notebook computer, and the first slot drives the first stopper in a second direction so that the first stopper stops a side of the connector when the handle rotates from a first position to a second position.

Abstract: A phase-locked loop (PLL) includes a charge pump, a frequency divider, a voltage detector, a control module, and a calibration module. When a predetermined current amount and a predetermined frequency dividing amount are provided, the voltage detector measures a voltage associated with an output frequency of the PLL to generate a first reference voltage. When a test current amount and the predetermined frequency dividing amount are provided, the voltage detector again measures the voltage to generate a second reference voltage. When the predetermined current amount and a test frequency dividing amount are provided, the voltage detector again measures the voltage to generate a third reference voltage. The control module estimates a loop gain of the PLL according to the current amounts, the frequency dividing amounts and the reference voltages. The calibration module calibrates the PLL according to the loop gain.

Abstract: A method for fabricating a charge trapping memory device includes providing a substrate; forming a first oxide layer on the substrate; forming a number of BD regions in the substrate; nitridizing the interface of the first oxide layer and the substrate via a process; forming a charge trapping layer on the first oxide layer; and forming a second oxide layer on the charge trapping layer.

Abstract: A phase-locked loop (PLL) including an active filter, a voltage-controlled oscillator (VCO), two phase detectors, a charge pump and a digital-to-analog converter (DAC) is provided. The VCO generates an oscillation signal according to a control signal provided at an output of the active filter. The first phase detector generates a phase difference signal according to a reference signal and a feedback signal associating with the oscillation signal. The charge pump provides a charging current to a first input of the active filter according to the phase difference. The second phase detector generates a digital reference signal according to the phase difference between the reference signal and the feedback signal. The DAC converts the digital reference signal to an analog reference voltage and provides the analog reference voltage to the second input of the active filter.

Abstract: A method for managing a memory block is provided. In this method, a plurality of block tables having different storing priorities is provided. In addition, the number of error correction bits in the memory block is checked. Thereby, in the present invention, data can be stored into the memory block in a block table according to the number of error correction bits in the memory block so that the sequence in which the memory block is used for storing data is determined.

Abstract: The present invention provides a Schmitt trigger-based FinFET static random access memory (SRAM) cell, which is an 8-FinFET structure. A FinFET has the functions of two independent gates. The new SRAM cell uses only 8 FinFET per cell, compared with the 10-FinFET structure in previous works. As a result, the cell structure of the present invention can save chip area and raise chip density. Furthermore, this new SRAM cell can effectively solve the conventional problem that the 6T SRAM cell is likely to have read errors at a low operating voltage.

Abstract: A control circuit of universal serial bus (USB) port includes a charge control unit providing a first operating voltage and a second operating voltage to a first operating voltage end and a second operating voltage end of the USB port, and a first circuit unit coupled to the charge control unit. Furthermore, the first circuit includes a first output end and a second output end. When a external apparatus is inserted into the USB port, the charge control unit connects the first output end and the second output end to a differential positive end and a differential negative end of the USB port, respectively, to enter a rapid charging mode.

Abstract: An automatic power control system, an automatic power control method, a down sampling circuit and a down sampling method. The automatic power control system is incorporated in an optical disc drive comprising a laser diode for receiving a control signal to generate a laser beam; and a photodetector for detecting the laser beam to generate an analog input signal. The automatic power control system comprises an analog-to-digital converter, a down sampling circuit, a comparator, and a digital-to-analog converter. The analog-to-digital converter converts the analog input signal to digital data. The down sampling circuit, coupled to the analog-to-digital converter, comprises a down sampler, a counter, and a controller. The down sampler receives a predetermined amount of digital data to generate representation data. The counter, coupled to the down sampler, calculates the amount of digital data, and resets the down sampler when the amount equals or exceeds the predetermined count.

Abstract: This invention discloses a color temperature controller and a color temperature control method of a light emitting diode (LED). The color temperature controller applied in an LED lamp includes touch switches and a control element. After a color of a color pattern on any touch switch is clicked and selected by a user, a signal of the color is outputted to the control element, and the control element outputs a corresponding pulse width modulation (PWM) signal to control either the current or the voltage of a three-color LED in the LED lamp, so that the LED lamp produces a same color temperature change of the signal of the color to improve the color temperature control of a conventional LED lamp, and provides a flexible color change of the LED lamp.

Abstract: The present invention provides a method of thinning a wafer. First, a wafer is provided. The wafer includes an active surface, a back surface and a side surface. The active surface is disposed opposite to the back surface. The side surface is disposed between the active surface and the back surface and encompasses the peripheral of the wafer. Next, a protective structure is formed on the wafer to at least completely cover the side surface. Last, a thinning process is performed upon the wafer from the back surface.

Abstract: A light emitting diode illuminator includes at least one light emitting diode, a power supply, an illumination control interface and a controller. The power supply is electrically connected to the at least one light emitting diode so as to provide a current to the at least one light emitting diode. The illumination control interface is configured to sense a touch time from a user so as to generate a control signal. The controller is electrically connected to the illumination control interface and the power supply so as to generate a modulation signal according to the control signal. The power supply adjusts strength of the current according to the modulation signal so that the at least one light emitting diode generates a corresponding illumination according to the strength of the current.

Abstract: A signal processing device with high efficiency of teletext information processing is provided. The signal processing device is configured to receive and encode a transport stream for display, wherein the transport stream provides teletext information associated with a plurality of teletext lines and video information associated with a plurality of video lines. The video signal processing device includes a memory configured to store line enable signals and line data associated with the teletext lines and the video lines, a VBI controller coupled to the memory, configured to read the memory to obtain the line data associated with enabled teletext lines of the teletext lines, and an TV encoder coupled to the VBI controller, configured to receive and encode the line data associated with the enabled teletext lines for display.

Abstract: A light-guide apparatus for accompanying an edge light source to form a backlight module for an LCD display includes an upper light-distributing layer, a middle light-guiding layer and a lower reflective layer. The light-guiding layer further defines a light-introducing surface for allowing lights emitted from the edge light source to enter the light-guiding layer. The reflective layer reflects the lights back to the light-guiding layer. A light-exiting surface for allowing at least a portion of the lights to leave the light-guiding layer is defined on the top surface of the light-distributing layer and is perpendicular to the light-introducing surface. The light-distributing layer, the light-guiding layer and the reflective layer are manufactured integrally into a unique piece by a co-extrusion process so as to avoid possible existence of air spacing in between. Three-dimensional micro-structures are constructed on a reflective surface interfacing the reflective layer and the light-guiding layer.

Abstract: A uniform reflective light-guide for accompanying an edge light source to form a backlight module for an LCD display includes a light-guiding layer and a reflective layer. The light-guiding layer further defines a light-introducing surface and a light-exiting surface. The light-introducing surface is to allow lights emitted from the edge light source to enter the light-guiding layer. The light-exiting surface perpendicular to the light-introducing surface is to allow at least a portion of the lights to leave the light-guiding layer. The reflective layer is to reflect the incident lights back to the light-guiding layer. The reflective layer and the light-guiding layer are manufactured integrally into a unique piece by a co-extrusion process so as to avoid possible existence of an air spacing in between. A reflective surface is defined to interface the reflective layer and the light-guiding layer, and a three-dimensional micro-structure is constructed on the reflective surface.

Abstract: An integrated circuit with improved intrinsic gettering ability is described, having a bulk micro-defect (BMD) density of 3.85×105-3.38×109/cm3 through first and second annealing steps. The first annealing step is performed at a first temperature in an atmosphere containing at least one of oxygen gas and nitrogen gas. The second annealing step is performed at a second temperature higher than the first temperature in the atmosphere.

Abstract: A uniform reflective light-guide apparatus can accompany an optional edge light source and includes a light-guiding layer, a reflective layer and a light-exiting surface. The light-guiding layer further has a lateral side to define a light-introducing surface for allowing entrance of lights from the edge light source. The reflective layer is to reflect incident lights back to the light-guiding layer. The light-exiting surface perpendicular to the light-introducing surface is to allow at least a portion of the lights in the light-guiding layer to leave the light-guide apparatus. The reflective layer and the light-guiding layer are manufactured integrally by a co-extrusion process so as to avoid possible existence of an air spacing between the reflective layer and the light-guiding layer.

Abstract: The present invention provides a Schmitt trigger-based FinFET static random access memory (SRAM) cell, which is an 8-FinFET structure. A FinFET has the functions of two independent gates. The new SRAM cell uses only 8 FinFET per cell, compared with the 10-FinFET structure in previous works. As a result, the cell structure of the present invention can save chip area and raise chip density. Furthermore, this new SRAM cell can effectively solve the conventional problem that the 6T SRAM cell is likely to have read errors at a low operating voltage.